Ley Foon Tan [Thu, 6 Nov 2014 07:19:57 +0000 (15:19 +0800)]
nios2: System calls handling
This patch adds support for system calls from userspaces. It uses the
asm-generic/unistd.h definitions with architecture spcific syscall.
The sys_call_table is just an array defined in a C file and it contains
pointers to the syscall functions.
Andy Shevchenko [Wed, 27 Aug 2014 13:49:44 +0000 (16:49 +0300)]
cifs: convert printk(LEVEL...) to pr_<level>
The useful macros embed message level in the name. Thus, it cleans up the code
a bit. In cases when it was plain printk() the conversion was done to info
level.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Steve French <steve.french@primarydata.com>
Andy Shevchenko [Wed, 27 Aug 2014 13:49:43 +0000 (16:49 +0300)]
cifs: convert to print_hex_dump() instead of custom implementation
This patch converts custom dumper to use native print_hex_dump() instead. The
cifs_dump_mem() will have an offsets per each line which differs it from the
original code.
In the dump_smb() we may use native print_hex_dump() as well. It will show
slightly different output in ASCII part when character is unprintable,
otherwise it keeps same structure.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Steve French <steve.french@primarydata.com>
Andy Shevchenko [Wed, 27 Aug 2014 13:49:42 +0000 (16:49 +0300)]
cifs: call strtobool instead of custom implementation
Meanwhile it cleans up the code, the behaviour is slightly changed. In case of
providing non-boolean value it will fails with corresponding error. In the
original code the attempt of an update was just ignored in such case.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jeff Layton <jlayton@poochiereds.net> Reviewed-by: Alexander Bokovoy <ab@samba.org> Signed-off-by: Steve French <steve.french@primarydata.com>
Steve French [Mon, 20 Oct 2014 00:18:05 +0000 (19:18 -0500)]
Add missing defines for ACL query support
Add missing defines needed for ACL query support.
For definitions of these security info type additionalinfo flags
and also the EA Flags see MS-SMB2 (2.2.37) or MS-DTYP
Signed-of-by: Steven French <smfrench@gmail.com> Reviewed-by: Shirish Pargaonkar <shirishpargaonkar@gmail.com>
Steve French [Sat, 18 Oct 2014 22:01:15 +0000 (17:01 -0500)]
Add support for original fallocate
In many cases the simple fallocate call is
a no op (since the file is already not sparse) or
can simply be converted from a sparse to a non-sparse
file if we are fallocating the whole file and keeping
the size.
Linus Torvalds [Sun, 7 Dec 2014 20:00:14 +0000 (12:00 -0800)]
Merge branch 'for-3.18-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata fixes from Tejun Heo:
"Three libata fixes for v3.18. Nothing too interesting. PCI ID ID and
quirk additions to ahci and an error handling path fix in sata_fsl"
* 'for-3.18-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
ahci: disable MSI on SAMSUNG 0xa800 SSD
sata_fsl: fix error handling of irq_of_parse_and_map
AHCI: Add DeviceIDs for Sunrise Point-LP SATA controller
Linus Torvalds [Sat, 6 Dec 2014 19:26:01 +0000 (11:26 -0800)]
Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"Here are two more driver bugfixes for I2C which would be good to have"
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: cadence: Set the hardware time-out register to maximum value
i2c: davinci: generate STP always when NACK is received
Borislav Petkov [Wed, 3 Dec 2014 16:21:41 +0000 (17:21 +0100)]
x86, microcode: Reload microcode on resume
Normally, we do reapply microcode on resume. However, in the cases where
that microcode comes from the early loader and the late loader hasn't
been utilized yet, there's no easy way for us to go and apply the patch
applied during boot by the early loader.
Thus, reuse the patch stashed by the early loader for the BSP.
Boris Ostrovsky [Mon, 1 Dec 2014 21:27:44 +0000 (16:27 -0500)]
x86, microcode: Don't initialize microcode code on paravirt
Paravirtual guests are not expected to load microcode into processors
and therefore it is not necessary to initialize microcode loading
logic.
In fact, under certain circumstances initializing this logic may cause
the guest to crash. Specifically, 32-bit kernels use __pa_nodebug()
macro which does not work in Xen (the code path that leads to this macro
happens during resume when we call mc_bp_resume()->load_ucode_ap()
->check_loader_disabled_ap())
Linus Torvalds [Fri, 5 Dec 2014 18:47:19 +0000 (10:47 -0800)]
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"Two final fixlets for 3.18:
- Prevent microcode reload wreckage on 32bit
- Unbreak cross compilation"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86, microcode: Limit the microcode reloading to 64-bit for now
x86: Use $(OBJDUMP) instead of plain objdump
This will enable use of physical arch timers on rk3288, where each
core comes out of reset with a different virtual offset. Using
physical timers will help with SMP booting on coreboot and older
u-boot and should also allow suspend-resume and cpu-hotplug to work on
all firmwares.
Firmware which does initialize the cpu registers properly at boot and
cpu-hotplug can remove this property from the device tree.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Guenter Roeck [Thu, 4 Dec 2014 17:58:15 +0000 (09:58 -0800)]
hwmon: (lm75) Strengthen detect function
A chip returning 0x00 in all registers is erroneously detected
as LM75. Check hysteresis and temperature limit registers and
abort if both are 0 to reduce the likelyhood for this to happen.
Reviewed-by: Rob Coulson <rob.coulson@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Jaegeuk Kim [Thu, 4 Dec 2014 04:47:26 +0000 (20:47 -0800)]
f2fs: call radix_tree_preload before radix_tree_insert
This patch tries to fix:
BUG: using smp_processor_id() in preemptible [00000000] code: f2fs_gc-254:0/384
(radix_tree_node_alloc+0x14/0x74) from [<c033d8a0>] (radix_tree_insert+0x110/0x200)
(radix_tree_insert+0x110/0x200) from [<c02e8264>] (gc_data_segment+0x340/0x52c)
(gc_data_segment+0x340/0x52c) from [<c02e8658>] (f2fs_gc+0x208/0x400)
(f2fs_gc+0x208/0x400) from [<c02e8a98>] (gc_thread_func+0x248/0x28c)
(gc_thread_func+0x248/0x28c) from [<c0139944>] (kthread+0xa0/0xac)
(kthread+0xa0/0xac) from [<c0105ef8>] (ret_from_fork+0x14/0x3c)
The reason is that f2fs calls radix_tree_insert under enabled preemption.
So, before calling it, we need to call radix_tree_preload.
Otherwise, we should use _GFP_WAIT for the radix tree, and use mutex or
semaphore to cover the radix tree operations.
Felipe Balbi [Tue, 18 Nov 2014 18:07:02 +0000 (12:07 -0600)]
ARM: omap2plus_defconfig: enable XHCI
AM437x devices have a DWC3 IP inside of them.
The host side implementation of DWC3 is XHCI
compliant. By enabling XHCI driver, we get
the USB host port on AM437x Starter Kit working
out of the box.
Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Ding Tianhong [Fri, 5 Dec 2014 08:39:46 +0000 (08:39 +0000)]
arm64: remove the unnecessary arm64_swiotlb_init()
The commit 3690951fc6d42f3a0903987677d0e592c49dd8db
(arm64: Use swiotlb late initialisation)
switches the DMA mapping code to swiotlb_tlb_late_init_with_default_size(),
the arm64_swiotlb_init() will not used anymore, so remove this function.
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Mark Brown [Fri, 5 Dec 2014 11:14:35 +0000 (11:14 +0000)]
Merge remote-tracking branches 'regulator/topic/anatop', 'regulator/topic/disable', 'regulator/topic/dummy' and 'regulator/topic/gpio' into regulator-next
mmc: queue: Improve error handling during allocation of bounce buffers
Allocation of previous bounce buffer in mmc_init_queue when the current
bounce buffer allocation fails was leading to a crash later in
__blk_segment_map_sg. Error handling is improved by allocating previous
bounce buffer only if the current bounce buffer allocation succeeds.
Signed-off-by: Bhuvanesh Surachari <bhuvanesh_surachari@mentor.com> Signed-off-by: Harish Jenny K N <harish_kandiga@mentor.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Olof Johansson [Fri, 5 Dec 2014 07:33:16 +0000 (23:33 -0800)]
Merge branch 'clocksource/physical-timers' into next/dt
These are a pre-req to get rk3288 SMP to work with some firmwares, so merge
it in here as well as in next/drivers.
* clocksource/physical-timers:
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
Olof Johansson [Fri, 5 Dec 2014 07:32:16 +0000 (23:32 -0800)]
Merge branch 'clocksource/physical-timers' into next/drivers
* clocksource/physical-timers:
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
Doug Anderson [Wed, 8 Oct 2014 07:33:47 +0000 (00:33 -0700)]
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset (CNTVOFF)
between the virtual and physical counters. Each core gets a
different random offset.
* The device boots in "Secure SVC" mode.
* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
CNTHCTL.PL1PCTEN (both default to 1 at reset)
On systems like the above, it doesn't make sense to use the virtual
counter. There's nobody managing the offset and each time a core goes
down and comes back up it will get reinitialized to some other random
value.
This adds an optional property which can inform the kernel of this
situation, and firmware is free to remove the property if it is going
to initialize the CNTVOFF registers when each CPU comes out of reset.
Currently, the best course of action in this case is to use the
physical timer, which is why it is important that CNTHCTL hasn't been
changed from its reset value and it's a reasonable assumption given
that the firmware has never entered HYP mode.
Note that it's been said that on ARMv8 systems the firmware and
kernel really can't be architected as described above. That means
using the physical timer like this really only makes sense for ARMv7
systems.
Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Sonny Rao [Mon, 24 Nov 2014 07:02:44 +0000 (23:02 -0800)]
clocksource: arch_timer: Fix code to use physical timers when requested
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false. It restores the
arch_counter_get_cntpct() function after removal in
0d651e4e "clocksource: arch_timer: use virtual counters"
We need this on certain ARMv7 systems which are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset between the
virtual and physical counters. Each core gets a different random
offset.
* The device boots in "Secure SVC" mode.
* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
CNTHCTL.PL1PCTEN (both default to 1 at reset)
One example of such as system is RK3288 where it is much simpler to
use the physical counter since there's nobody managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.
Fixes: 0d651e4e65e9 ("clocksource: arch_timer: use virtual counters") Cc: stable@vger.kernel.org Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Marc Zyngier [Tue, 2 Dec 2014 16:05:26 +0000 (16:05 +0000)]
ARM: imx6: fix bogus use of irq_get_irq_data
The imx6 PM code seems to be quite creative in its use of irq_data,
using something that is very much a hardware interrupt number where
we expect a virtual one. Yes, it worked so far, but that's only
luck, and it will definitely explode in 3.19.
Fix it by using a pair of helper functions that deal with the
actual hardware.
Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Marc Zyngier [Tue, 2 Dec 2014 16:05:25 +0000 (16:05 +0000)]
ARM: imx: irq: fix buggy usage of irq_data irq field
mach-imx directly references to the irq field in
struct irq_data, and uses this to directly poke hardware register.
But irq is the *virtual* irq number, something that has nothing
to do with the actual HW irq (stored in the hwirq field). And once
we put the stacked domain code in action, the whole thing explodes,
as these two values are *very* different.
Just replacing all instances of irq with hwirq fixes the issue.
Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Tyler Baker [Thu, 4 Dec 2014 21:24:24 +0000 (13:24 -0800)]
ARM: multi_v7_defconfig: enable MAX77686 PMIC drivers for exynos4412-prime based SoCs
This patch enables the MAX77686 PMIC drivers in the multi_v7_defconfig used
on exynos4412-prime family of SoCs [1]. The exynos4412-prime based boards
are producing the following runtime errors only on the multi_v7_defconfig [2]:
kern.err: deviceless supply vdd_arm not found, using dummy regulator
kern.err: exynos-cpufreq exynos-cpufreq: failed to set cpu voltage to 1287500
kern.err: cpufreq: __target_index: Failed to change cpu frequency: -22
I reviewed the exynos_defconfig, which does not produce these runtime
errors. It was obvious that the exynos_defconfig has the PMIC drivers
enabled, whereas the multi_v7_defconfig does not. This patch has been tested
on a odroid-u2 and a odroid-u3 board. It has resolved the runtime errors.
Therefore, I purpose we enabled these drivers in the multi_v7_defconfig.
Linus Torvalds [Fri, 5 Dec 2014 06:39:37 +0000 (22:39 -0800)]
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm intel fixes from Dave Airlie:
"Two intel stable fixes, that should be it from me for this round"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/i915: Unlock panel even when LVDS is disabled
drm/i915: More cautious with pch fifo underruns
Linus Torvalds [Fri, 5 Dec 2014 01:48:13 +0000 (17:48 -0800)]
Merge tag 'pm+acpi-3.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI backlight fix from Rafael Wysocki:
"This is a simple fix for an ACPI backlight regression introduced by a
recent commit that overlooked a corner case which should have been
taken into account"
* tag 'pm+acpi-3.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
ACPI / video: update condition to check if device is in _DOD list
Dave Airlie [Fri, 5 Dec 2014 01:12:29 +0000 (11:12 +1000)]
Merge tag 'drm-intel-fixes-2014-12-04' of git://anongit.freedesktop.org/drm-intel into drm-fixes
Silence some pch fifo underrun reports and panel locking backtraces,
both cc: stable.
* tag 'drm-intel-fixes-2014-12-04' of git://anongit.freedesktop.org/drm-intel:
drm/i915: Unlock panel even when LVDS is disabled
drm/i915: More cautious with pch fifo underruns
Linus Torvalds [Fri, 5 Dec 2014 00:06:02 +0000 (16:06 -0800)]
Merge tag 'media/v3.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
"A core fix and some driver fixes:
- regression fix in Remote Controller core affecting RC6 protocol
handling
- fix video buffer handling in cx23885
- race fix in solo6x10
- fix image selection in smiapp
- fix reported payload size on s2255drv
- two updates for MAINTAINERS file"
* tag 'media/v3.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
[media] rc-core: fix toggle handling in the rc6 decoder
MAINTAINERS: Update mchehab's addresses
[media] cx23885: use sg = sg_next(sg) instead of sg++
[media] s2255drv: fix payload size for JPG, MJPEG
[media] Update MAINTAINERS for solo6x10
[media] solo6x10: fix a race in IRQ handler
[media] smiapp: Only some selection targets are settable
Masahiro Yamada [Thu, 4 Dec 2014 22:42:25 +0000 (14:42 -0800)]
uapi: fix to export linux/vm_sockets.h
A typo "header=y" was introduced by commit 7071cf7fc435 ("uapi: add
missing network related headers to kbuild").
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Stephen Hemminger <stephen@networkplumber.org> Cc: David Miller <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Nishanth Menon [Thu, 4 Dec 2014 16:58:56 +0000 (10:58 -0600)]
hwmon: (gpio-fan) Add a shutdown handler to poweroff the fans
Poweroff the fans when shutting down the system. Else,
echo '1' > /sys/class/hwmon/hwmon0/fan1_target; poweroff leaves the
fan running if the System power off does not drive the gpio expander
which might control the fan power supply.
hwmon: (tmp401) Bail out from tmp401_probe() in case of write errors
The return value of i2c_smbus_read_byte_data() is checked in
tmp401_init_client(), but only a warning is printed and the device is
registered anyway. This leads to devices being registered even if they
cannot be physically detected.
Bail out from probe in case of write errors and notify the user.
Vishnu Motghare [Wed, 3 Dec 2014 12:35:25 +0000 (18:05 +0530)]
i2c: cadence: Set the hardware time-out register to maximum value
Cadence I2C controller has bug wherein it generates invalid read transactions
after timeout in master receiver mode. This driver does not use the HW
timeout and this interrupt is disabled but the feature itself cannot be
disabled. Hence, this patch writes the maximum value (0xFF) to this register.
This is one of the workarounds to this bug and it will not avoid the issue
completely but reduces the chances of error.
i2c: davinci: generate STP always when NACK is received
According to I2C specification the NACK should be handled as follows:
"When SDA remains HIGH during this ninth clock pulse, this is defined as the Not
Acknowledge signal. The master can then generate either a STOP condition to
abort the transfer, or a repeated START condition to start a new transfer."
[I2C spec Rev. 6, 3.1.6: http://www.nxp.com/documents/user_manual/UM10204.pdf]
Currently the Davinci i2c driver interrupts the transfer on receipt of a
NACK but fails to send a STOP in some situations and so makes the bus
stuck until next I2C IP reset (idle/enable).
For example, the issue will happen during SMBus read transfer which
consists from two i2c messages write command/address and read data:
S Slave Address Wr A Command Code A Sr Slave Address Rd A D1..Dn A P
<--- write -----------------------> <--- read --------------------->
The I2C client device will send NACK if it can't recognize "Command Code"
and it's expected from I2C master to generate STP in this case.
But now, Davinci i2C driver will just exit with -EREMOTEIO and STP will
not be generated.
Hence, fix it by generating Stop condition (STP) always when NACK is received.
This patch fixes Davinci I2C in the same way it was done for OMAP I2C
commit cda2109a26eb ("i2c: omap: query STP always when NACK is received").
Tejun Heo [Thu, 4 Dec 2014 18:13:28 +0000 (13:13 -0500)]
ahci: disable MSI on SAMSUNG 0xa800 SSD
Just like 0x1600 which got blacklisted by 66a7cbc303f4 ("ahci: disable
MSI instead of NCQ on Samsung pci-e SSDs on macbooks"), 0xa800 chokes
on NCQ commands if MSI is enabled. Disable MSI.
Arnd Bergmann [Thu, 4 Dec 2014 18:11:03 +0000 (19:11 +0100)]
Merge tag 'at91-cleanup5' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/cleanup
Pull "Fifth batch of cleanup/SoC for 3.19" from Nicolas Ferre:
- removal of now dead code and AT91-specific driver
- removal of !DT initialization in some core AT91 drivers
- simplification of Kconfig DT board file selection: now automatic
* tag 'at91-cleanup5' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: remove unused board.h file
ARM: at91: remove unneeded header files
ARM: at91/clocksource: remove !DT PIT initializations
ARM: at91: at91rm9200 ST initialization is now DT only
ARM: at91: remove old AT91-specific drivers
ARM: at91: cleanup initilisation code by removing dead code
ARM: at91/Kconfig: select board files automatically
Arnd Bergmann [Thu, 4 Dec 2014 18:09:18 +0000 (19:09 +0100)]
Merge tag 'at91-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/defconfig
Pull "First batch of defconfigs for AT91 / 3.19:" from Nicolas Ferre:
- use NEON for all C-A5, neon code handles the !NEON case
- add new XDMA driver
- add some useful drivers as we only have a single defconfig for all
AT91SAM9/RM9200
* tag 'at91-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/defconfig: add DM9000 to at91_dt
ARM: at91/defconfig: add QT1070 to at91_dt
ARM: at91/defconfig: add TCB PWM driver selection
ARM: at91/defconfig: add the XDMA driver
ARM: at91: sama5: update defconfig
Arnd Bergmann [Thu, 4 Dec 2014 16:33:02 +0000 (17:33 +0100)]
Merge tag 'v3.19-rockchip-dts4' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "last dts changes for 3.19" from Jason Cooper:
- rk3288 thermal driver that got accepted into the thermal tree
- mmc fifo sizes for Cortex-A9 SoCs
- labels for the leds on the RadxaRock
- core system supply for the Marsboard
* tag 'v3.19-rockchip-dts4' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard
ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188
ARM: dts: rockchip: add label property for leds on Radxa Rock
ARM: dts: rockchip: enable thermal on rk3288-evb board
ARM: dts: rockchip: add main thermal info to rk3288
ARM: dts: rockchip: add RK3288 Thermal data
ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
This commit adjusts the registration of the cpufreq-dt driver in the
mvebu platform to indicate to the cpufreq driver that the platform has
independent clocks for each CPU.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm64: amd-seattle: Fix PCI bus range due to SMMU limitation
Since PCIe is using SMMUv1 which only supports 15-bit stream ID,
only 7-bit PCI bus id is used to specify stream ID. Therefore,
we only limit the PCI bus range to 0x7f.
* tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller
This is a squash of several imx_v6_v7_defconfig update patches.
- Enable tlv320aic3x audio codec by default (Phytec PBAB01 board)
- Enable DS1307 rtc and gpio fan by default (TBS2910 board)
- Select thermal related drivers
- Add SNVS power off driver