Thomas Petazzoni [Tue, 15 Apr 2014 15:00:03 +0000 (17:00 +0200)]
ata: ahci_mvebu: new driver for Marvell Armada 380 AHCI interfaces
The Marvell Armada 380 SoC includes two AHCI compatible
interfaces. However, like all DMA-capable Marvell interface, they
require special handling to configure MBus windows. Therefore, this
commit adds a new ahci_mvebu driver, which relies on the
libahci_platform.c code recently introduced.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit a3464ed2f14d19ba923930f7c0c284499d64eb5b)
Thomas Petazzoni [Tue, 15 Apr 2014 15:00:02 +0000 (17:00 +0200)]
Documentation: dt-bindings: reformat and order list of ahci-platform compatibles
The ahci-platform.txt Device Tree binding documentation is gaining a
growing number of compatible strings, and it will gain one more with
the addition of the Marvell Armada 380 AHCI support. It is therefore
time to reformat this list into a proper bullet list, and more
importantly order it alphabetically;
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 5799d6d4cf86c11503aee909a1ec555453c7f22a)
Shawn Guo [Sun, 4 May 2014 13:48:06 +0000 (21:48 +0800)]
ahci: imx: software workaround for phy reset issue in resume
When suspending imx6q systems which have rootfs on SATA, the following
error will likely be seen in resume. The SATA link will fail to come
up, and it results in an unusable system across the suspend/resume
cycle.
$ echo mem > /sys/power/state
PM: Syncing filesystems ... done.
PM: Preparing system for mem sleep
Freezing user space processes ... (elapsed 0.002 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.002 seconds) done.
PM: Entering mem sleep
sd 0:0:0:0: [sda] Synchronizing SCSI cache
sd 0:0:0:0: [sda] Stopping disk
PM: suspend of devices complete after 61.914 msecs
PM: suspend devices took 0.070 seconds
PM: late suspend of devices complete after 4.906 msecs
PM: noirq suspend of devices complete after 4.521 msecs
Disabling non-boot CPUs ...
CPU1: shutdown
CPU2: shutdown
CPU3: shutdown
Enabling non-boot CPUs ...
CPU1: Booted secondary processor
CPU1 is up
CPU2: Booted secondary processor
CPU2 is up
CPU3: Booted secondary processor
CPU3 is up
PM: noirq resume of devices complete after 10.486 msecs
PM: early resume of devices complete after 4.679 msecs
sd 0:0:0:0: [sda] Starting disk
PM: resume of devices complete after 22.674 msecs
PM: resume devices took 0.030 seconds
PM: Finishing wakeup.
Restarting tasks ... done.
$ ata1: SATA link down (SStatus 1 SControl 300)
ata1: SATA link down (SStatus 1 SControl 300)
ata1: limiting SATA link speed to 1.5 Gbps
ata1: SATA link down (SStatus 1 SControl 310)
ata1.00: disabled
ata1: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen t4
ata1: irq_stat 0x00000040, connection status changed
ata1: SError: { CommWake DevExch }
ata1: hard resetting link
sd 0:0:0:0: rejecting I/O to offline device
sd 0:0:0:0: killing request
sd 0:0:0:0: rejecting I/O to offline device
Aborting journal on device sda2-8.
sd 0:0:0:0: rejecting I/O to offline device
EXT4-fs warning (device sda2): ext4_end_bio:317: I/O error writing to inode 132577 (offset 0 size 0 starting block 26235)
Buffer I/O error on device sda2, logical block 10169
...
It's caused by a silicon issue that SATA phy does not get reset by
controller when coming back from LPM. The patch adds a software
workaround for this issue. It enforces a software reset on SATA phy
in imx_sata_enable() function, so that we can ensure SATA link will
come up properly in both power-on and resume.
The software reset is implemented by writing phy reset register through
the phy control register bus interface. Functions
imx_phy_reg_[addressing|write|read]() implement this bus interface, while
imx_sata_phy_reset() performs the actually reset operation.
Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit e783c51cce94521c10e599e991acdcfd9a996c4a)
Paul Bolle [Sun, 4 May 2014 11:50:29 +0000 (13:50 +0200)]
libata-sff: remove dead code
Ever since v2.6.19 the code contains a check for CONFIG_NO_ATA_LEGACY.
But that macro has never been defined. Apparently no one ran into
problems on platforms that do not support compatibility mode. So remove
this code that has been dead for over seven years.
Keith Busch [Thu, 1 May 2014 17:12:03 +0000 (11:12 -0600)]
ata: SATL compliance for Inquiry Product Revision
The SCSI-to-ATA Translation standard says to use data words 25 and 26
unless they are spaces. For devices that use these words in the firmware
field, they are generally more useful anyway.
Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit c49a6bf5eecd31f335df1a3700c92be1a824c6f0)
ahci: Ensure "MSI Revert to Single Message" mode is not enforced
The AHCI specification allows hardware to choose to revert to
single MSI mode when fewer messages are allocated than requested.
Yet, at least ICH10 chipset reverts to single MSI mode even when
enough messages are allocated in some cases (see below).
This update forces the driver to not rely on initialization of
multiple MSIs mode alone and always check if "MSI Revert to
Single Message" (MRSM) mode was enforced by the controller and
fallback to the single MSI mode in case it did.
That prevents a situation when the driver configured multiple
per-port IRQ handlers, but the controller sends all port's
interrupts to a single IRQ, which could easily screw up the
interrupt handling and lead to delays and possibly crashes.
The fix was tested on a 6-port controller that successfully
reverted to the single MSI mode:
00:1f.2 SATA controller: Intel Corporation 82801JI (ICH10 Family) SATA
AHCI Controller (prog-if 01 [AHCI 1.0])
Subsystem: Super Micro Computer Inc Device 10a7
Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 101
I/O ports at f110 [size=8]
I/O ports at f100 [size=4]
I/O ports at f0f0 [size=8]
I/O ports at f0e0 [size=4]
I/O ports at f020 [size=32]
Memory at fbf00000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit-
Capabilities: [70] Power Management version 3
Capabilities: [a8] SATA HBA v1.0
Capabilities: [b0] PCI Advanced Features
Kernel driver in use: ahci
With 6 ports just 8 MSI vectors should be enough, but the adapter
enforces the MRSM mode when less than 16 vectors are written to
the Multiple Messages Enable PCI register. I instigated MRSM mode
by forcing @nvec to 8 in ahci_init_interrupts().
Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Cc: linux-ide@vger.kernel.org Cc: stable@vger.kernel.org Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit ab0f9e78b97f5193dd38b3757b42b6fbded05fb7)
AHCI_XGENE is only applicable on ARM64 but it can also be enabled for
compile testing; however, AHCI_XGENE selects PHY_XGENE which has other
arch specific dependencies. This leads to the following warning when
enabling it on other archs for compile testing.
warning: (AHCI_XGENE) selects PHY_XGENE which has unmet direct
dependencies (HAS_IOMEM && OF && (ARM64 || COMPILE_TEST))
Selecting a config option which itself has dependencies can easily
lead to broken configurations. For now, let's just make AHCI_XGENE
depend on PHY_XGENE which has all the necessary dependencies already.
Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Loc Ho <lho@apm.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 74c03eb63061c834893e7ebf8d298573bdccfd08)
Make pata_arasan_cf host driver depend on ARCH_SPEAR13XX config
option as ARASAN CompactFlash PATA support is specific to ST
SPEAr13xx SoCs and the driver to work requires suitable device
tree node (or platform device) to be defined. Additionally
allow the driver build if COMPILE_TEST config option is set.
ata: fix Calxeda Highbank SATA driver dependencies
Make sata_highbank host driver depend on ARCH_HIGHBANK config option
as Calxeda Highbank SATA support is specific to Calxeda Highbank
SoCs and the driver to work requires suitable device tree node to
be defined. Additionally allow the driver build if COMPILE_TEST
config option is set.
Cc: Mark Langsdorf <mark.langsdorf@calxeda.com> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 0b99f8648eb1814d787db3981ad93e6bc343b3f6)
Make sata_rcar host driver depend on ARCH_SHMOBILE config option as
Renesas R-Car SATA support is specific to Renesas SoCs and the driver
to work requires suitable device tree node (or platform device) to be
defined. Additionally allow the driver build if COMPILE_TEST config
option is set.
Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 7596d93d8dfa7a508ca52c7d9b7db763eb5b0715)
Platform changes needed to make DaVinci DA850 SATA AHCI support
fully functional are in the separate "ARM: davinci: da850: update
SATA AHCI support" commit.
Please note that this driver doesn't have the superfluous clock
control code as clock is already handled by the generic AHCI
platform library code.
Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit ae8723f8a9c8e804c2b906074d7d5f1265a385bb)
Paul Gortmaker [Tue, 21 Jan 2014 21:22:51 +0000 (16:22 -0500)]
ata: delete non-required instances of include <linux/init.h>
None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>. Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.
Cc: linux-ide@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 1bc18086231c130895b87ec049be8ddcdab552b8)
Looking at ST SPEAr1340 AHCI code (the only user of the deprecated
pdata->suspend and pdata->resume) it is obvious the we should return
after calling pdata->suspend() only if the function have returned
non-zero return value. The code has been broken since commit 1e70c2
("ata/ahci_platform: Add clock framework support"). Fix it.
Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 83b03fd67b9b3fa3795871169f3c08c35b3d6ea8)
Todd Brandt [Fri, 14 Mar 2014 20:52:54 +0000 (13:52 -0700)]
libata: async resume
Improve overall system resume time by making libata link recovery
actions asynchronous relative to other resume events.
Link resume operations are performed using the scsi_eh thread, so
commands, particularly the sd resume start/stop command, will be held
off until the device exits error handling. Libata already flushes eh
with ata_port_wait_eh() in the port teardown paths, so there are no
concerns with async operation colliding with the end-of-life of the
ata_port object. Also, libata-core is already careful to flush
in-flight pm operations before another round of pm starts on the given
ata_port.
Cc: Len Brown <len.brown@intel.com> Cc: Phillip Susi <psusi@ubuntu.com> Cc: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com>
[djbw: rebase on cleanup patch, changelog wordsmithing] Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 200421a80f6e0a9e39d698944cc35cba103eb6ce)
Dan Williams [Fri, 14 Mar 2014 20:52:48 +0000 (13:52 -0700)]
libata, libsas: kill pm_result and related cleanup
Tejun says:
"At least for libata, worrying about suspend/resume failures don't make
whole lot of sense. If suspend failed, just proceed with suspend. If
the device can't be woken up afterwards, that's that. There isn't
anything we could have done differently anyway. The same for resume, if
spinup fails, the device is dud and the following commands will invoke
EH actions and will eventually fail. Again, there really isn't any
*choice* to make. Just making sure the errors are handled gracefully
(ie. don't crash) and the following commands are handled correctly
should be enough."
The only libata user that actually cares about the result from a suspend
operation is libsas. However, it only cares about whether queuing a new
operation collides with an in-flight one. All libsas does with the
error is retry, but we can just let libata wait for the previous
operation before continuing.
Other cleanups include:
1/ Unifying all ata port pm operations on an ata_port_pm_ prefix
2/ Marking all ata port pm helper routines as returning void, only
ata_port_pm_ entry points need to fake a 0 return value.
3/ Killing ata_port_{suspend|resume}_common() in favor of calling
ata_port_request_pm() directly
4/ Killing the wrappers that just do a to_ata_port() conversion
5/ Clearly marking the entry points that do async operations with an
_async suffix.
Loc Ho [Fri, 14 Mar 2014 23:53:20 +0000 (17:53 -0600)]
ata: Add APM X-Gene SoC AHCI SATA host controller driver
This patch adds support for the APM X-Gene SoC AHCI SATA host controller
driver. It requires the corresponding APM X-Gene SoC PHY driver. This
initial version only supports Gen3 speed.
Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Tuan Phan <tphan@apm.com> Signed-off-by: Suman Tripathi <stripathi@apm.com> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 81d01bfa51300d14191e0013856a7b25f809468f)
ata: ahci_platform: fix devm_ioremap_resource() return value checking
devm_ioremap_resource() returns a pointer to the remapped memory or
an ERR_PTR() encoded error code on failure. Fix the check inside
ahci_platform_get_resources() accordingly.
struct ahci_platform_data is deprecated (please see comments in
<linux/ahci_platform.h> for details). Convert ahci_st driver to
use custom ->host_stop method instead.
* The config option for ahci_st driver was renamed from
CONFIG_SATA_AHCI_ST to CONFIG_AHCI_ST but Makefile was
not updated. Fix it (also while at it move the ahci_st
driver entry below ahci_imx and ahci_sunxi ones).
* Fix a few build issues in the ahci_st driver itself.
Jean Delvare [Fri, 14 Mar 2014 14:41:31 +0000 (15:41 +0100)]
ata: Fix SC1200 dependencies
The SC1200 is a SoC based on the Geode GX1 32-bit x86 processor, so
its drivers are only needed on this architecture, except for build
testing purpose.
Lee Jones [Wed, 12 Mar 2014 12:39:41 +0000 (12:39 +0000)]
ahci: st: Only build for ST-Micro h/w
This device is designed specifically to run on ST-Microelectronics'
hardware. To ensure no attempts are made to run on anything incompatible
we add a dependency on ST architecture
Suggested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 48c54df1305c4287cf8d8a344de6b70b1d56e234)
Lee Jones [Wed, 12 Mar 2014 12:39:40 +0000 (12:39 +0000)]
ahci: st: Utilise ata_platform_remove_one() call
ata_platform_remove_one() allows us to specify our own exit function
via platform data then goes off and removes ATA Host and Port in
preparation for device removal.
Suggested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit a82370842834875c81b482181af280353aa6be05)
Lee Jones [Wed, 12 Mar 2014 12:39:38 +0000 (12:39 +0000)]
ahci: st: Standardise naming conventions
Other devices have adopted similar naming conventions which have been
accepted as the standard. This patch brings any mention of the the ST
AHCI driver into line with them.
Suggested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 4a2e51234038fb8b24963a2f32e8b55980085a23)
Jean Delvare [Tue, 11 Mar 2014 11:55:24 +0000 (12:55 +0100)]
ata: Fix CS55xx dependencies
As far as I know, the CS5520 and CS5530 chipsets were only used with
32-bit x86 Geode processors, so I think their drivers are only needed
on this architecture, except for build testing purpose.
While we're here, simplify the dependencies for the CS5535 driver.
The CS5536 was used with the Geode processors, but also on MIPS
Loongson/Lemote 2 systems, so let its driver be built for these two
architectures only, except for build testing purpose.
Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org>
(cherry picked from commit 9236a76d9e978aaa7709b8ff3f03c1a8b66d9ea7)
Dan Williams [Fri, 7 Mar 2014 22:22:48 +0000 (14:22 -0800)]
libata: end the r-word
Prompted by the social effort in the US to discourage usage of the
adjective "retarded".
In this case we needlessly anthropomorphize hard drives. The
implication is that due to design deficiencies in the device reset
recovery time is negatively impacted. We can simply clearly state that
fact. "Exceptional devices cause outliers in reset recovery time." This
steers clear of any unintended comparison of such devices to humans with
cognitive disabilities.
Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 35bf88212b5e5d1f9145481bc15e8c1801da58dc)
Hans de Goede [Wed, 5 Mar 2014 19:17:49 +0000 (20:17 +0100)]
ahci_imx: Put #ifdef CONFIG_PM_SLEEP around suspend / resume functions
This fixes the following warnings when CONFIG_PM_SLEEP is not set:
drivers/ata/ahci_imx.c:284:12: warning: ‘imx_ahci_suspend’ defined but not used [-Wunused-function]
drivers/ata/ahci_imx.c:299:12: warning: ‘imx_ahci_resume’ defined but not used [-Wunused-function]
Reported-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 46ce6b74fdec1a8a8e9b45597e6c7989441682bf)
Hans de Goede [Sun, 23 Feb 2014 11:52:41 +0000 (12:52 +0100)]
ahci_sunxi: Use msleep instead of mdelay
ahci_sunxi_phy_init is called from the probe and resume code paths, and
sleeping is safe in both, so use msleep instead of mdelay.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit d2ec147a76d0e051db19d378cac3ee7721877717)
Hans de Goede [Sat, 22 Feb 2014 16:22:55 +0000 (17:22 +0100)]
ahci_platform: Drop unused ahci_platform_data members
These members are not used anywhere, and in the future we want
ahci_platform_data to go away entirely so there is no reason to keep these
around.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 6ef95e87763fd69889655f4f14e499377a54d066)
Hans de Goede [Sat, 22 Feb 2014 16:22:54 +0000 (17:22 +0100)]
ahci_platform: Drop support for imx53-ahci platform device type
Since the 3.13 release the ahci_imx driver has proper devicetree enabled
support for ahci on imx53 and that is used instead of the old board file
created imx53-ahci platform device.
Note this patch also complete drops the id-table, an id-table is not needed
for a single id platform driver, the name field in the driver struct suffices.
And the code already has an explicit "MODULE_ALIAS("platform:ahci");" so the
id-table is not needed for that either.
Cc: Marek Vasut <marex@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit c093e1d36e317c5ac2dc788f407119259fc260fe)
Hans de Goede [Sat, 22 Feb 2014 16:22:53 +0000 (17:22 +0100)]
ahci_platform: Drop support for ahci-strict platform device type
I've done a grep over the entire kernel tree and nothing is using this
(anymore?).
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit f1df8641e27b7edb978bdc7aaf50c235bc9e8be9)
Roger Quadros [Sat, 22 Feb 2014 15:53:41 +0000 (16:53 +0100)]
ata: ahci_platform: runtime resume the device before use
On OMAP platforms the device needs to be runtime resumed before it can
be accessed. The OMAP HWMOD framework takes care of enabling the
module and its resources based on the device's runtime PM state.
In this patch we runtime resume during .probe() and runtime suspend
after .remove().
We also update the runtime PM state during .resume().
CC: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit e708e46edac8ab2f31e7ee991aa3c5b87638e658)
Roger Quadros [Sat, 22 Feb 2014 15:53:40 +0000 (16:53 +0100)]
ata: ahci_platform: Manage SATA PHY
Some platforms have a PHY hooked up to the SATA controller. The PHY
needs to be initialized and powered up for SATA to work. We do that
using the PHY framework.
tj: Minor comment formatting updates.
CC: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo<tj@kernel.org>
(cherry picked from commit 21b5faeec229d4f70a7f60a7b0b065c98198f491)
Hans de Goede [Sat, 22 Feb 2014 15:53:37 +0000 (16:53 +0100)]
ahci-imx: Port to library-ised ahci_platform
This avoids the ugliness of creating a nested platform device from probe.
While moving it around anyways, move the mk6q phy init code from probe
to imx_sata_enable, as the phy needs to be re-initialized on resume too,
otherwise the drive won't be recognized after resume.
Tested on a wandboard i.mx6 quad.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 90870d79d4f28711610dd2e72d8fa616c922d110)
Olliver Schinagl [Sat, 22 Feb 2014 15:53:36 +0000 (16:53 +0100)]
ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform
This patch adds support for the ahci sata controler found on Allwinner A10
and A20 SoCs to the ahci_platform driver.
Orignally written by Olliver Schinagl using the approach of having a platform
device which probe method creates a new child platform device which gets
driven by ahci_platform.c, as done by ahci_imx.c .
Refactored by Hans de Goede to add most of the non sunxi specific functionality
to ahci_platform.c and use a platform_data pointer from of_device_id for the
sunxi specific bits.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit c5754b5220f01e8722799d35c04a76e82c62d7d8)
Split suspend / resume code into host suspend / resume functionality and
resource enable / disabling phases, and export the new suspend_ / resume_host
functions.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 648cb6fd83b97f0f772db783a280af300fa9f2bc)
ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence
This commit refactors step 1 and 3 into separate functions, so the platform
drivers for AHCI implementations which need a specific order in step 2,
and / or need to do some custom register poking at some time, can re-use
ahci-platform.c code without needing to copy and paste it.
Note that ahci_platform_init_host's prototype takes the 3 non function
members of ahci_platform_data as arguments, the idea is that drivers using
the new exported utility functions will not use ahci_platform_data at all,
and hopefully in the future ahci_platform_data can go away entirely.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 23b07d4cb3c0c850055cf968af44019b8da185fb)
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 96a01ba52c60fdd74dd6e8cf06645d06515b1396)
Hans de Goede [Sat, 22 Feb 2014 15:53:32 +0000 (16:53 +0100)]
ahci-platform: Add support for an optional regulator for sata-target power
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 4b3e603a298db26c6c37e8b08adcce24d014df13)
Hans de Goede [Sat, 22 Feb 2014 15:53:31 +0000 (16:53 +0100)]
ahci-platform: Add support for devices with more then 1 clock
The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the
imx AHCI controller needs 3 clocks to be enabled.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 156c5887948cd191417f18026aab9ce26e5a95da)
Hans de Goede [Sat, 22 Feb 2014 15:53:30 +0000 (16:53 +0100)]
libahci: Allow drivers to override start_engine
Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a
special register to be poked before starting the DMA engine.
This register gets reset on an ahci_stop_engine call, so there is no other
place then ahci_start_engine where this poking can be done.
This commit allows drivers to override ahci_start_engine behavior for use by
the Allwinner AHCI driver (and potentially other drivers in the future).
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 039ece38da45f5e6a94be3aa7611cf3634bc2461)
ARM: imx: fix register offset of pll7_usb_host gate clock
There is a copy&paste error on register offset of pll7_usb_host gate
clock introduced by i.MX6 PLL bypass support patches. The error breaks
the ENET function, because it overwrites the pll6_enet gate bit.
Axel Lin [Wed, 5 Mar 2014 10:02:43 +0000 (18:02 +0800)]
regulator: pfuze100: Add PFUZE200 support to Kconfig and module description
Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 2cee2121db44cfeee206d0854bedd52344eea444)
Axel Lin [Tue, 4 Mar 2014 10:20:14 +0000 (18:20 +0800)]
regulator: pfuze100: Add terminate entry for [i2c|of]_device_id tables
Also remove PFUZE_NUM to avoid below build warnings:
CC [M] drivers/regulator/pfuze100-regulator.o
drivers/regulator/pfuze100-regulator.c:86:2: warning: excess elements in array initializer [enabled by default]
drivers/regulator/pfuze100-regulator.c:86:2: warning: (near initialization for 'pfuze_device_id') [enabled by default]
drivers/regulator/pfuze100-regulator.c:93:2: warning: excess elements in array initializer [enabled by default]
drivers/regulator/pfuze100-regulator.c:93:2: warning: (near initialization for 'pfuze_dt_ids') [enabled by default]
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit e6c4c3378d82c5eeb136ed06b1a23651bcdaf739)
Robin Gong [Tue, 4 Mar 2014 09:40:36 +0000 (17:40 +0800)]
regulator: pfuze100: add pfuze200 support
support pfuze200 chip which remove SW1C and SW4 based on pfuze100.
Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f2518480c7b744296a5587990a54e3a284d932b8)
Fabio Estevam [Thu, 20 Feb 2014 16:47:02 +0000 (13:47 -0300)]
pfuze100-regulator: Return error on of_node_get() failure
If of_node_get() fails, we should return an error.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 6428789e11f056d58ed59c0c0aa7d381d0bf50f8)
Fabio Estevam [Wed, 19 Feb 2014 02:46:14 +0000 (23:46 -0300)]
pfuze100-regulator: Fix of_node_get() parameter
Since commit d7857c42 (regulator: pfuze100: Use of_get_child_by_name) we get
the following probe failure:
pfuze100-regulator 1-0008: Full layer: 1, Metal layer: 0
pfuze100-regulator 1-0008: FAB: 0, FIN: 0
pfuze100-regulator 1-0008: regulators node not found
pfuze100-regulator: probe of 1-0008 failed with error -22
Now that of_get_child_by_name() is used we should adjust the device_node pointer
'np' to not get the parent node anymore.
Suggested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 3e01c75a45740ef4a0ec657d7ca25ad0aa2f50e0)
Sachin Kamat [Fri, 14 Feb 2014 11:50:00 +0000 (17:20 +0530)]
regulator: pfuze100: Use of_get_child_by_name
of_find_node_by_name walks the allnodes list, and can thus walk
outside of the parent node. Use of_get_child_by_name instead.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit d7857c429475677a6a42d0dce7f870d6241edd41)
Thiago Farina [Sun, 26 Jan 2014 23:57:12 +0000 (21:57 -0200)]
regulator: Make use of rdev_get_id() function where possible.
Signed-off-by: Thiago Farina <tfarina@chromium.org> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit d55efa4d9bff20c98ca05e0bf458691e6869b5a1)
Shawn Guo [Tue, 26 Aug 2014 15:06:33 +0000 (23:06 +0800)]
ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver
Since ENABLE and BYPASS bits of PLLs are now implemented as separate
gate and mux clocks by clock drivers, the code handling these two bits
can be removed from clk-pllv3 driver.
This is the same change for imx6sx clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sx.
This is the same change for imx6sl clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sl.
The imx6q clock driver currently hard-codes all PLL clocks to source
from OSC24M without BYPASS support. The patch adds the missing lvds_in
clock which is mutually exclusive with lvds_gate, and implements BYPASS
and BYPASS_CLK_SRC selection for PLL clocks as per Figure 10-3. Primary
Clock Generation in IMX6DQRM, i.e. both BYPASS_CLK_SRC and BYPASS bits
are implemented as mux clocks, and ENABLE bit of PLL clocks is
implemented as a gate clock after BYPASS mux.
Shawn Guo [Tue, 26 Aug 2014 07:06:33 +0000 (15:06 +0800)]
ARM: imx: add an exclusive gate clock type
There are a couple of gate clocks are mutually exclusive on i.MX6, i.e.
LVDSCLK1_IBEN and LVDSCLK1_OBEN. They cannot be enabled simultaneously.
This patches adds an exclusive gate clock type specifically for such
case. The clock driver will need to call imx_clk_gate_exclusive() to
register a gate clock with parameter exclusive_mask indicating the mask
of gate bits which are mutually exclusive to this gate clock.
Right now, it only handles the exclusive gate clocks which are defined
in a single hardware register, which is the case we're running into
today. But it can be extended to handle exclusive gate clocks defined
in different registers later if needed.
Shengjiu Wang [Fri, 8 Aug 2014 07:02:47 +0000 (15:02 +0800)]
ARM: clk-imx6q: refine clock tree for ESAI
There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Rename
'esai' to 'esai_extal', 'esai_ahb' to 'esai_mem', and add 'esai_ipg'.
Make the clock for ESAI more clear and align them with imx6sx.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
(cherry-picked from commit d140d15ae366a002140dc46b73c7bd22ebe16489)
Some gpio-leds need retain the state even in suspend, such as charger led.
But this property missed in devicetree, add it.
(cooloney@gmail.com: fold DT binding updates into this patch)
Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Bryan Wu <cooloney@gmail.com>
(cherry picked from commit 4270a78d23eece0b25a13bff1e71d114ec547de4)
ENGR00330009-3 ARM: imx: change perclk to be from OSC
Change perclk to be from OSC for GPT on i.MX6SL, as ipg
clk may be scaled when system enters low bus mode, to make
system timer NOT drift, make perclk stay fixed.
ENGR00330009-2 ARM: imx: source gpt per clk from OSC for system timer
On i.MX6Q TO > 1.0, i.MX6DL and i.MX6SX, gpt per clock
can be from OSC instead of ipg_per, as ipg_per's rate
may be scaled when system enter low bus mode, to keep
system timer NOT drift, better to make gpt per clock
at fixed rate, here add support for gpt per clock to
be from OSC which is at fixed rate always.
There are some difference on this implementation of
gpt per clock source, see below for details:
i.MX6Q TO > 1.0: GPT_CR_CLKSRC, 3b'101 selects fix clock
of OSC / 8 for gpt per clk;
i.MX6DL and i.MX6SX: GPT_CR_CLKSRC, 3b'101 selects OSC
for gpt per clk, and we must enable GPT_CR_24MEM to
enable OSC clk source for gpt per, GPT_PR_PRESCALER24M
is for pre-scaling of this OSC clk, here set it to 8
to make gpt per clk is 3MHz;
i.MX6SL: ipg_per can be from OSC directly, so no need to
implement this new clk source for gpt per.
ENGR00330009-1 ARM: imx: add gpt_3m clk for i.mx6qdl and i.mx6sx
Add gpt_3m clock for i.mx6qdl, as gpt can source clock
from OSC, some i.MX6 series SOCs has fixed divider of
8 for gpt clock, so here add a fix clk of gpt_3m, register
this clk for system timer in MSL.
Shengjiu Wang [Tue, 9 Sep 2014 09:21:25 +0000 (17:21 +0800)]
ENGR00330403-4: ASoC: fsl_asrc: Add Memory to Memory support
ASRC M2M function is not able to put upstream due to its self-designed
ioctl protocol. So I just make a single patch for it and make it merge
into P2P driver as simply as possible.
The patch can only be maintained internally unless some one designs a
new protocol or implement the originally protocol by using some common
approach provided by Linux Kernel.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
ARM: dts: imx6sx: fix the pad setting for uart CTS_B
The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B'
IP port. Since uart IP port 'CTS_B' is output, and it don't need to
set 'SELECT_INPUT' bit.
projects / karo-tx-linux.git / log