Simon Glass [Sun, 25 Jan 2015 15:27:08 +0000 (08:27 -0700)]
dm: core: Allow the uclass to set up a device's child after binding
For buses, after a child is bound, allow the uclass to perform some
processing. This can be used to figure out the address of the child (e.g.
the chip select for SPI slaves) so that it is ready to be probed.
This avoids bus drivers having to repeat the same process, which really
should be done by the uclass, since it is common.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Simon Glass [Sun, 25 Jan 2015 15:27:06 +0000 (08:27 -0700)]
dm: core: Allow uclasses to specify private data for a device's children
In many cases the per-child private data for a device's children is defined
by the uclass rather than the individual driver. For example, a SPI bus
needs to store information about each of its children, but all SPI drivers
store the same information. It makes sense to allow the uclass to define
this data.
If the driver provides a size value for its per-child private data, then use
it. Failng that, fall back to that provided by the uclass.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Simon Glass [Sun, 25 Jan 2015 15:27:05 +0000 (08:27 -0700)]
dm: core: Add a flag to control sequence numbering
At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
neither I2C nor SPI use this feature, so drop it.
Some devices need us to look up an alias to number them within the uclass.
Add a flag to control this, so it is not done unless it is needed.
Adjust the tests to test this new behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Simon Glass [Sun, 25 Jan 2015 15:27:02 +0000 (08:27 -0700)]
dm: core: Allow uclasses to specify platdata for a device's children
In many cases the child platform data for a device's children is defined by
the uclass rather than the individual devices. For example, a SPI bus needs
to know the chip select and speed for each of its children. It makes sense
to allow this information to be defined the SPI uclass rather than each
individual driver.
If the device provides a size value for its child platdata, then use it.
Failng that, fall back to that provided by the uclass.
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 25 Jan 2015 15:27:01 +0000 (08:27 -0700)]
dm: core: Allow parents to have platform data for their children
For buses it is common for parents to need to know the address of the child
on the bus, the bus speed to use for that child, and other information. This
can be provided in platform data attached to each child.
Add driver model support for this, including auto-allocation which can be
requested using a new property to specify the size of the data.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Simon Glass [Sun, 25 Jan 2015 15:27:00 +0000 (08:27 -0700)]
dm: core: Allocate platform data when binding a device
When using allocated platform data, allocate it when we bind the device.
This makes it possible to fill in this information before the device is
probed.
This fits with the platform data model (when not using device tree),
since platform data exists at bind-time.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Simon Glass [Sun, 25 Jan 2015 15:26:55 +0000 (08:26 -0700)]
dm: i2c: Provide an offset length parameter where needed
Rather than assuming that the chip offset length is 1, allow it to be
provided. This allows chips that don't use the default offset length to
be used (at present they are only supported by the command line 'i2c'
command which sets the offset length explicitly).
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
Simon Glass [Tue, 13 Jan 2015 01:02:08 +0000 (18:02 -0700)]
dm: i2c: Add a compatbility layer
For boards which use multiple I2C devices, or for SOCs which support
multiple boards, we might want to convert these to driver model at different
times. At present this is difficult because we need to either use
CONFIG_DM_I2C for a board or not.
Add a compatibility layer which implements the old API, thus allowing a
board to move to driver model for I2C without requiring that everything it
uses is moved in the same commit.
Simon Glass [Tue, 13 Jan 2015 01:02:07 +0000 (18:02 -0700)]
dm: i2c: Rename driver model I2C functions to permit compatibility
Add a dm_ prefix to driver model I2C functions so that we can keep the old
ones around.
This is a little unfortunate, but on reflection it is too difficult to
change the API. We can undo this rename when most boards and drivers are
converted to use driver model for I2C.
Simon Glass [Tue, 6 Jan 2015 03:05:34 +0000 (20:05 -0700)]
dm: exynos: Add a GPIO translation function
This deals with the polarity bit. It also changes the GPIO devices so that
the correct device tree node is linked to each one. This allows us to use
the new uclass phandle functionality to implement a proper GPIO binding.
Simon Glass [Tue, 6 Jan 2015 03:05:31 +0000 (20:05 -0700)]
dm: demo: Add a simple GPIO demonstration
Add a new 'demo light' command which uses GPIOs to control imaginary lights.
Each light is assigned a bit number in the overall value. This provides an
example driver for using the new GPIO API.
Simon Glass [Tue, 6 Jan 2015 03:05:29 +0000 (20:05 -0700)]
dm: gpio: Add better functions to request GPIOs
At present U-Boot sort-of supports the standard way of reading GPIOs from
device tree nodes, but the support is incomplete, a bit clunky and only
works for GPIO bindings where #gpio-cells is 2.
Add new functions to request GPIOs, taking full account of the device
tree binding. These permit requesting a GPIO with a simple call like:
Simon Glass [Tue, 6 Jan 2015 03:05:28 +0000 (20:05 -0700)]
dm: gpio: Add a driver GPIO translation method
Only the GPIO driver knows about the full GPIO device tree binding used by
a device. Add a method to allow the driver to provide this information to the
uclass, including the GPIO offset within the device and flags such as the
polarity.
Simon Glass [Tue, 6 Jan 2015 03:05:27 +0000 (20:05 -0700)]
dm: gpio: Add a native driver model API
So far driver model's GPIO uclass just implements the existing GPIO API.
This has some limitations:
- it requires manual device tree munging to support GPIOs in device tree
(fdtdec_get_gpio() and friends)
- it does not understand polarity
- it is somewhat slower since we must scan for the GPIO device each time
- Global GPIO numbering can change if other GPIO drivers are probed
- it requires extra steps to set the GPIO direction and value
The new functions have a dm_ prefix where necessary to avoid name conflicts
but we can remove that when it is no-longer needed. The new struct gpio_desc
holds all required information about the GPIO. For now this is intended to
be stored by the client requesting the GPIO, but in future it might be
brought into the uclass in some way.
With these changes the old GPIO API still works, and uses the driver model
API underneath.
Simon Glass [Tue, 6 Jan 2015 03:05:26 +0000 (20:05 -0700)]
dm: fdt: Add a function to decode phandles with arguments
For GPIOs and other functions we want to look up a phandle and then decode
a list of arguments for that phandle. Each phandle can have a different
number of arguments, specified by a property in the target node. This is
the "#gpio-cells" property for GPIOs.
Add a function to provide this feature, taken modified from Linux 3.18.
Simon Glass [Tue, 6 Jan 2015 03:05:25 +0000 (20:05 -0700)]
dm: tegra: Bring in GPIO device tree binding
At present the tegra GPIO driver does not fully support the existing device
tree binding, but add the binding file to cover the existing partial support.
Simon Glass [Tue, 6 Jan 2015 03:05:24 +0000 (20:05 -0700)]
dm: exynos: Bring in GPIO device tree binding
At present the exynos GPIO driver does not fully support the existing device
tree binding, but add the binding file to cover the existing partial support.
Masahiro Yamada [Wed, 14 Jan 2015 08:07:05 +0000 (17:07 +0900)]
generic-board: show model name in board_init_f() too
The common/board_r.c has show_model_r() to display the model name
if the DTB has a "model" property. It sounds useful to have a similar
function in common/board_f.c too because most of the boards show
their board name before relocation.
Instead of implementing the same function in both common/board_f.c
and common/board_r.c, let's split it up into common/show_board_info.c.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Tue, 27 Jan 2015 15:45:09 +0000 (16:45 +0100)]
spl: Change printf to puts for "Unsupported boot-device"
Microblaze currently doesn't use printf in SPL. So this one line was the only
reference to it and resulted in the printf functionality to be pulled in.
Exceeding the 4k size limit. Lets change the printf back to puts so that
Microblaze is fixed again. The only drawback is that the detected boot-device
number will not be printed. But this message alone should be helpful enough
to get an idea where the boot process is broken.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Add USB lthor download protocol support
updated the zynq config to support the lthor
download protocol.
This lthor functionality helps us to load linux
images on to DDR/MMC and can boot linux using bootm.
In order to load images the user should run lthor
command run "thor_ram" from u-boot prompt and
then send the images from host using lthor utility.
Define g_dnl_bind_fixup for zynq so that correct vendor
and product ids assigned incase of DFU and lthor.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable DFU functionality in zynq.
This DFU functionality helps us to load linux
images on to DDR and can boot linux using bootm.
In order to load images the user should run dfu
command "dfu 0 ram 0" from u-boot prompt and then
send the images from host.
The malloc size has been increased to match the DFU
buffer requirements.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 5 Sep 2013 06:41:19 +0000 (08:41 +0200)]
ARM: zynq: ddrc: Setup half of memory only for ECC case
Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 23 Jan 2015 08:45:12 +0000 (09:45 +0100)]
ARM: zynq: Enable the Neon instructions
Added the lowlevel_init to enable the Neon instructions.
Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.
Also enable neon instructions for non-xilinx toolchain.
<INTERRUPT>
Marvell>> nand erase.part root
Marvell>> ubi part root
Marvell>> ubi remove rootfs
Marvell>> ubi create rootfs
Marvell>> usb reset
Marvell>> fatload usb 2:1 0x800000 guruplug/openwrt/openwrt-kirkwood-guruplug-rootfs.ubifs
Marvell>> ubi write 0x800000 rootfs ${filesize}
Marvell>> reset
Changes in v1:
- ADD generic board define
- ADD FDT support
- ADD HUSH interpreter
- Define new NAND partition mapping
Luka Perkov [Mon, 11 Nov 2013 06:27:53 +0000 (07:27 +0100)]
kirkwood: define empty CONFIG_MVGBE_PORTS by default
Each board with defines it's own set of values. If we do not define
CONFIG_MVGBE_PORTS we will hit following error:
mvgbe.c: In function 'mvgbe_initialize':
mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this function)
u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS;
This patch fixes above described problem.
Signed-off-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Simon Glass [Tue, 20 Jan 2015 05:16:14 +0000 (22:16 -0700)]
x86: Implement a cache for Memory Reference Code parameters
The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.
Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.
Simon Glass [Tue, 20 Jan 2015 05:16:13 +0000 (22:16 -0700)]
x86: dts: Add SPI flash MRC details for chromebook_link
Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.
Simon Glass [Tue, 20 Jan 2015 05:16:07 +0000 (22:16 -0700)]
net: Add a separate file for IP checksumming
Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.
Alison Wang [Fri, 26 Dec 2014 05:14:01 +0000 (13:14 +0800)]
ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are
only enabled in QSPI boot, and disabled in other boot modes.
IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot.
This patch will add fdt support for the above rules.
Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Alison Wang [Thu, 15 Jan 2015 09:29:29 +0000 (17:29 +0800)]
arm: ls102xa: Update snoop settings for CCI-400
CAAM is connected to CCI-400 S0 slave interface. Disable snooping for
S0 will cause CAAM self test failure. This patch is to enable snooping
for S0 slave interface. These CCI-400 operations are moved to
board_early_init_f() to be initialized earlier. For S4 slave interface,
issuing of snoop requests and DVM message requests are enabled.
Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
tang yuantian [Wed, 17 Dec 2014 04:58:04 +0000 (12:58 +0800)]
ARM: HYP/non-sec: Make variable gic_dist_addr as a local one
Defining variable gic_dist_addr as a globe one prevents some
functions, which use it, from being used before relocation
which is the case in the deep sleep resume process on Freescale
SoC platforms.
Besides, we can always get the GIC base address by calling
get_gicd_base_address() without referring gic_dist_addr.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Xiubo Li [Tue, 16 Dec 2014 06:50:33 +0000 (14:50 +0800)]
ls102xa: dcu: Add platform support for DCU on LS1021AQDS board
This patch adds the CH7301 HDMI options and the common configuration
for DCU on LS1021AQDS board.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Cc: Jason Jin <Jason.Jin@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Mon, 15 Dec 2014 06:00:36 +0000 (11:30 +0530)]
crypto/fsl: Add fixup for crypto node
Era property is added in the crypto node in device tree.
Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to
drivers/sec/sec.c so that it can be used across arm and
powerpc platforms having crypto node.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Fix commit message indentation] Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 10 Dec 2014 06:17:03 +0000 (11:47 +0530)]
arm: ls102xa: Add dummy gpio.h to enable CONFIG_OF_CONTROL
If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>. As a result, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they
do not support GPIO.
The right fix would be to split the lib/fdtdec.c to remove
dependency on GPIO.This commit adds a dummy <asm/arch/gpio.h>
to support OF_CONTROL for LS102x platform. This dummy header
will be removed after FDT-GPIO stuff is fixed correctly.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Alison Wang [Tue, 9 Dec 2014 09:38:23 +0000 (17:38 +0800)]
ls102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as default
This patch reverts to use ge0_clk125 for eTSEC clock muxing. For SAI and
CAN which are pin multiplexed with RGMII1 in EC1 of RCW, ge2_clk125 will
be used via hwconfig.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Sjoerd Simons [Tue, 20 Jan 2015 17:06:53 +0000 (18:06 +0100)]
pci: tegra: Fix port information parsing
commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
new fdtdec pci helpers. To get the device index of the root port, the
"reg" property should be parsed from the dtb (as was previously the
case).
With this patch i can successfully network boot my jetson tk1
projects / karo-tx-uboot.git / log