Will Deacon [Tue, 9 Aug 2011 11:24:07 +0000 (12:24 +0100)]
ARM: versatile: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Will Deacon [Tue, 9 Aug 2011 11:21:36 +0000 (12:21 +0100)]
ARM: ux500: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 9 Aug 2011 11:13:53 +0000 (12:13 +0100)]
ARM: shmobile: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the SCU in the SMP
boot path for sh73a0.
Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 9 Aug 2011 11:02:27 +0000 (12:02 +0100)]
ARM: msm: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Tested-and-acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 9 Aug 2011 10:29:19 +0000 (11:29 +0100)]
ARM: exynos4: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Cc: Kukjin Kim <kgene.kim@samsung.com> Tested-and-acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Sachin Prabhu [Tue, 11 Oct 2011 12:43:50 +0000 (13:43 +0100)]
cifs: Display strictcache mount option in /proc/mounts
Commit d39454ffe4a3c85428483b8a8a8e5e797b6363d5 adds a strictcache mount
option. This patch allows the display of this mount option in
/proc/mounts when listing shares mounted with the strictcache mount
option.
Signed-off-by: Sachin Prabhu <sprabhu@redhat.com> Reviewed-by: Jeff Layton <jlayton@redhat.com> Signed-off-by: Steve French <smfrench@gmail.com>
Shawn Guo [Fri, 19 Aug 2011 04:56:59 +0000 (05:56 +0100)]
arm/imx: use Kconfig choice for low-level debug UART selection
Now that the DEBUG_LL UART can be selected by a Kconfig choice,
simplify the #ifdefery in debug-macro.S and add entries to the
top-level Kconfig.debug instead.
Will Deacon [Tue, 16 Aug 2011 21:30:28 +0000 (22:30 +0100)]
ARM: realview: use Kconfig choice for debug UART selection
Now that the DEBUG_LL UART can be selected by a Kconfig choice, simplify
the #ifdefery in debug-macro.S and add entries to the top-level
Kconfig.debug instead.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Mon, 3 Oct 2011 17:29:03 +0000 (18:29 +0100)]
ARM: 7116/1: debug: provide dummy default option for DEBUG_LL UART choice
Defaulting to DEBUG_ICEDCC will cause systems to hang during boot unless
a hardware debugger is listening to the debug comms. channel.
This patch adds a dummy UART option as the default DEBUG_LL choice which
requires the platform to do the right thing.
Acked-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Stephen Boyd [Thu, 22 Sep 2011 19:28:36 +0000 (20:28 +0100)]
ARM: 7097/1: debug: Move DEBUG_ICEDCC into the DEBUG_LL choice
DEBUG_ICEDCC support is just another DEBUG_LL choice and
selecting it along with other DEBUG_LL options doesn't make
much sense. Put it into the DEBUG_LL choice to avoid confusion.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Stephen Boyd [Thu, 22 Sep 2011 19:28:35 +0000 (20:28 +0100)]
ARM: 7096/1: debug: Add UART1 config choices
ARM patch 7072/1 (debug: use kconfig choice for selecting
DEBUG_LL UART) didn't notice that the Kconfigs relied on being
unselected to configure a different serial port. Since there is
no NONE option in a choice menu, explicitly add the other option
so that both serial ports can be selected.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Thu, 1 Sep 2011 18:04:44 +0000 (19:04 +0100)]
ARM: 7073/1: debug: augment DEBUG_LL Kconfig help to clarify behaviour
Enabled DEBUG_LL hardcodes the UART address into the kernel and results
in a non-portable kernel image. Since this option is only intended for
use when debugging early boot failures, supporting multiple platforms
in such a configuration is not the intended use-case.
This patch documents this limitation in the DEBUG_LL Kconfig help text,
so that users are aware of the portability restrictions that are associated
with enabling low-level debugging support.
Reported-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Thu, 1 Sep 2011 17:58:51 +0000 (18:58 +0100)]
ARM: 7072/1: debug: use kconfig choice for selecting DEBUG_LL UART
Enabling CONFIG_DEBUG_LL (which is required for earlyprintk) hardwires
the debug UART address into the kernel, so that we can print before the
platform is initialised.
If the user inadvertently selects multiple platforms with DEBUG_LL
enabled, the UART address may not be correct and will likely cause the
kernel to hang in the very early stages of boot.
This patch, based on a skeleton from Russell, uses a Kconfig choice for
selecting the DEBUG_LL UART, therefore allowing the user to make a
choice about the supported platform when DEBUG_LL is enabled.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Vincent Guittot [Mon, 8 Aug 2011 12:21:59 +0000 (13:21 +0100)]
ARM: 7011/1: Add ARM cpu topology definition
The affinity between ARM processors is defined in the MPIDR register.
We can identify which processors are in the same cluster,
and which ones have performance interdependency. We can define the
cpu topology of ARM platform, that is then used by sched_mc and sched_smt.
The default state of sched_mc and sched_smt config is disable.
When enabled, the behavior of the scheduler can be modified with
sched_mc_power_savings and sched_smt_power_savings sysfs interfaces.
Changes since v4 :
* Remove unnecessary parentheses and blank lines
Changes since v3 :
* Update the format of printk message
* Remove blank line
Changes since v2 :
* Update the commit message and some comments
Changes since v1 :
* Update the commit message
* Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h
* Modify header of arch/arm/kernel/topology.c
* Modify tests and manipulation of MPIDR's bitfields
* Modify the place and dependancy of the config
* Modify Noop functions
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
mscan: too much data copied to CAN frame due to 16 bit accesses
Due to the 16 bit access to mscan registers there's too much data copied to
the zero initialized CAN frame when having an odd number of bytes to copy.
This patch ensures that only the requested bytes are copied by using an
8 bit access for the remaining byte.
Reported-by: Andre Naujoks <nautsch@gmail.com> Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Dmitry Kravkov [Sun, 9 Oct 2011 23:57:36 +0000 (23:57 +0000)]
bnx2x: fix cl_id allocation for non-eth clients for NPAR mode
There are some consolidations of NPAR configuration
when FCoE and iSCSI L2 clients will get the same id,
in this case FCoE ring will be non-functional.
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
In debugging the failure of the glibc tst-cond18 test on parisc, I realized
that futexes need to use the same locks the lws calls. This fixes all the
pthread 'cond' tests. Sadly, there are still problems with thread cancellation.
[jejb: checkpatch fixes] Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
The doorbell register was being unconditionally swapped. In x86, that
meant it was being swapped to BE and written to the descriptor and to
memory, depending on the case of blue frame support or writing to
doorbell register. On PPC, this meant it was being swapped to LE and
then swapped back to BE while writing to the register. But in the blue
frame case, it was being written as LE to the descriptor.
The fix is not to swap doorbell unconditionally, write it to the
register as BE and convert it to BE when writing it to the descriptor.
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com> Reported-by: Richard Hendrickson <richhend@us.ibm.com> Cc: Eli Cohen <eli@dev.mellanox.co.il> Cc: Yevgeny Petrilin <yevgenyp@mellanox.co.il> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Olof Johansson [Mon, 10 Oct 2011 04:57:04 +0000 (21:57 -0700)]
ARM: tegra: cpu-tegra: unexport two functions
Two static functions that are not exported:
arch/arm/mach-tegra/cpu-tegra.c:59:5: warning: symbol 'tegra_verify_speed' was not declared. Should it be static?
arch/arm/mach-tegra/cpu-tegra.c:64:14: warning: symbol 'tegra_getspeed' was not declared. Should it be static?
Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Olof Johansson [Mon, 10 Oct 2011 04:31:23 +0000 (21:31 -0700)]
ARM: tegra: cpu-tegra: sparse type fix
Type fix:
arch/arm/mach-tegra/cpu-tegra.c:144:14: warning: incorrect type in argument 5 (different signedness)
arch/arm/mach-tegra/cpu-tegra.c:144:14: expected unsigned int *index
arch/arm/mach-tegra/cpu-tegra.c:144:14: got int *<noident>
Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Olof Johansson [Fri, 9 Sep 2011 01:09:54 +0000 (18:09 -0700)]
ARM: tegra: pcie: don't cast __iomem pointers
Fixes a lot of:
arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression
arch/arm/mach-tegra/pcie.c:678:8: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/pcie.c:678:8: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/pcie.c:678:8: got unsigned int
arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression
Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Olof Johansson [Fri, 9 Sep 2011 01:02:50 +0000 (18:02 -0700)]
ARM: tegra: tegra2_clocks: 0 -> NULL changes
Fixes a lot of:
arch/arm/mach-tegra/tegra2_clocks.c:921:34: warning: Using plain integer as NULL pointer
arch/arm/mach-tegra/tegra2_clocks.c:1462:4: warning: Using plain integer as NULL pointer
arch/arm/mach-tegra/tegra2_clocks.c:1864:4: warning: Using plain integer as NULL pointer
Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/tegra2_clocks.c:180:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/tegra2_clocks.c:180:2: got unsigned int
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression
Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Olof Johansson [Fri, 9 Sep 2011 00:49:13 +0000 (17:49 -0700)]
ARM: tegra: timer: don't cast __iomem pointers
Fixes a lot of:
arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression
arch/arm/mach-tegra/timer.c:75:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/timer.c:75:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/timer.c:75:2: got unsigned int
arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression
Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Olof Johansson [Mon, 10 Oct 2011 04:05:44 +0000 (21:05 -0700)]
ARM: tegra: annotate IO_*_VIRT pointers
Provide __iomem annotation for IO_*_VIRT pointers, which will propagate
up through IO_TO_VIRT(). Also fixes a 0 to NULL conversion of the base
case to silence sparse.
Unfortunately map_desc takes an unsigned long for the pointer instead of
a void __iomem *. For now, cast explicitly for those cases.
Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Ralf Baechle [Wed, 22 Jun 2011 10:14:58 +0000 (11:14 +0100)]
MIPS: MSP71xx: Fix build error.
After the recent cleanup of the register_*_smp_ops() functions msp71xx
wasn't fixed to include the now necessary header resulting in:
/home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c: In function ‘prom_init’:
/home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c:231:2: error: implicit declaration of function ‘register_vsmp_smp_ops’ [-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
Jayachandran C [Tue, 21 Jun 2011 20:06:33 +0000 (01:36 +0530)]
MIPS: Netlogic: Specify architecture CFLAGS
Use -march=xlr if available, otherwise fallback to mips64. This allows
us to support compilation with MIPS toolchains which are not customized
for XLR.
[ralf@linux-mips.org: And more importantly it works around a gas bug in
binutils 2.21 which otherwise may result in an assertion failure building
arch/mips/kernel/genex.S. See
http://sourceware.org/bugzilla/show_bug.cgi?id=12915 for details.]
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2534/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Turns out this patch is producing many build errors with gcc 4.2. Based
on further testing with a test case extracted from the build errors found
further build errors and suboptimal generation even in violation of the
"R" constraint.
To make matters worse, the binutils changes also don't work quite as
intended so revert this patch for now.
Ralf Baechle [Mon, 27 Jun 2011 08:45:42 +0000 (09:45 +0100)]
MIPS: SNI: Fix conflicting wrapper symbols for headers.
If Open Firmware / Device Tree support is enabled on a SNI RM kernel both
<asm/mipsprom.h> and <asm/prom.h> will be included into some .c files.
Since both headers use the same wrapper symbol only the inclusion of the
first file will have an effect but the 2nd file will be ignored resulting
in a build error.
Ralf Baechle [Wed, 22 Jun 2011 09:13:17 +0000 (10:13 +0100)]
MIPS: PNX8550: Fix section mismatch
Triggered by pnx8550-jbs_defconfig and pnx8550-stb810_defconfig:
WARNING: vmlinux.o(.text+0xc0c): Section mismatch in reference from the function prom_getcmdline() to the variable .init.data:arcs_cmdline
The function prom_getcmdline() references
the variable __initdata arcs_cmdline.
This is often because prom_getcmdline lacks a __initdata
annotation or the annotation of arcs_cmdline is wrong.
Ralf Baechle [Wed, 22 Jun 2011 08:29:40 +0000 (09:29 +0100)]
MIPS: IP27: Sort out section mismatch.
WARNING: vmlinux.o(.text+0x3059f8): Section mismatch in reference from the function pcibios_plat_dev_init() to the function .devinit.text:request_bridge_irq()
The function pcibios_plat_dev_init() references
the function __devinit request_bridge_irq().
This is often because pcibios_plat_dev_init lacks a __devinit
annotation or the annotation of request_bridge_irq is wrong.
Fixing this one leads to:
WARNING: vmlinux.o(.text+0x1790): Section mismatch in reference from the function request_bridge_irq() to the function .devinit.text:register_bridge_irq()
The function request_bridge_irq() references
the function __devinit register_bridge_irq().
This is often because request_bridge_irq lacks a __devinit
annotation or the annotation of register_bridge_irq is wrong.
Ralf Baechle [Fri, 17 Jun 2011 15:20:28 +0000 (16:20 +0100)]
MIPS: cache: Provide cache flush operations for XFS
Until now flush_kernel_vmap_range() and invalidate_kernel_vmap_range() did
not exist on MIPS resulting in heavy cache corruption on XFS filesystems.
Left for the post-3.0 time: optimization and make this work with highmem,
too. Since the combination of highmem + cache aliases atm doesn't work
this isn't a regression.
Carsten Otte [Mon, 10 Oct 2011 14:59:15 +0000 (16:59 +0200)]
[S390] take mmap_sem when walking guest page table
gmap_fault needs to walk the guest page table. However, parts of
that may change if some other thread does munmap. In that case
gmap_unmap_notifier will also unmap the corresponding parts from
the guest page table. We need to take mmap_sem in order to serialize
these operations.
do_exception now calls __gmap_fault with mmap_sem held which does
not get exported to modules. The exported function, which is called
from KVM, now takes mmap_sem.
Carsten Otte [Mon, 10 Oct 2011 14:59:13 +0000 (16:59 +0200)]
[S390] fix possible deadlock in gmap_map_segment
Fix possible deadlock reported by lockdep:
qemu-system-s39/2963 is trying to acquire lock:
(&mm->mmap_sem){++++++}, at: gmap_alloc_table+0x9c/0x120
but task is already holding lock:
(&mm->mmap_sem){++++++}, at: gmap_map_segment+0xa6/0x27c
Actually gmap_alloc_table is the only called in gmap_map_segment with
mmap_sem held, thus it's safe to simply remove the inner lock.
Signed-off-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Carsten Otte [Mon, 10 Oct 2011 14:59:12 +0000 (16:59 +0200)]
[S390] load user asce on sie_fault
On sie_fault we need to switch back to user ASCE. Otherwise we get
interresting effects when exiting to "userspace" while the guest
space is still active.
Signed-off-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Use a sigp sense running to decide which signal processor order to use
for an ipi. If the target cpu is running use external call, if the target
cpu is not running use emergency signal.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Stefan Haberland [Mon, 10 Oct 2011 14:59:10 +0000 (16:59 +0200)]
[S390] dasd: re-initialize read_conf buffer for retries
The buffer for read configuration data has to be initialized with an
EBCDIC string to show support for extended UIDs to z/VM.
If this read configuration data CQR needs to be retried, the buffer
may have changed in between. So re-initialize the buffer to get a
correct extended UID under z/VM.
Signed-off-by: Stefan Haberland <stefan.haberland@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Stefan Haberland [Mon, 10 Oct 2011 14:59:09 +0000 (16:59 +0200)]
[S390] dasd: wait for terminated request
After terminating a request in the dasd_sleep_on_immediatly function,
wait for the clear interrupt to be received before starting the
new request. This prevents the requests from getting mixed up.
Signed-off-by: Stefan Haberland <stefan.haberland@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Sebastian Ott [Mon, 10 Oct 2011 14:59:05 +0000 (16:59 +0200)]
[S390] ccwgroup: move attributes to attribute group
Put sysfs attributes of ccwgroup devices in an attribute group to
ensure that these attributes are actually present when userspace
is notified via uevents.
Cc: stable@kernel.org Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The user space program can change its addressing mode between the
24-bit, 31-bit and the 64-bit mode if the kernel is 64 bit. Currently
the kernel always forces the standard amode on signal delivery and
signal return and on ptrace: 64-bit for a 64-bit process, 31-bit for
a compat process and 31-bit kernels. Change the signal and ptrace code
to allow the full range of addressing modes. Signal handlers are
run in the standard addressing mode for the process.
One caveat is that even an 31-bit compat process can switch to the
64-bit mode. The next signal will switch back into the 31-bit mode
and there is no room in the 31-bit compat signal frame to store the
information that the program came from the 64-bit mode.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Split out addressing mode bits from PSW_BASE_BITS, rename PSW_BASE_BITS
to PSW_MASK_BASE, get rid of psw_user32_bits, remove unused function
enabled_wait(), introduce PSW_MASK_USER, and drop PSW_MASK_MERGE macros.
Change psw_kernel_bits / psw_user_bits to contain only the bits that
are always set in the respective mode.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
[S390] addressing mode limits and psw address wrapping
An instruction with an address right below the adress limit for the
current addressing mode will wrap. The instruction restart logic in
the protection fault handler and the signal code need to follow the
wrapping rules to find the correct instruction address.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>