The merge with renesas-pinmux2-for-v3.10 was made to provide
run-time dependencies for the following changes:
ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
* tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (307 commits)
ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
ARM: shmobile: mackerel: add interrupt names for SDHI0
ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio
ARM: shmobile: mackerel: remove OCR masks, where regulators are used
ARM: shmobile: mackerel: SDHI resources do not have to be numbered
ARM: shmobile: Initial r8a7790 Lager board support
ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
ARM: shmobile: APE6EVM base support
ARM: shmobile: kzm9g-reference: add ethernet support
ARM: shmobile: add R-Car M1A Bock-W platform support
sh-pfc: r8a73a4: Remove unused GPIO bias data
ARM: shmobile: r8a73a4: Remove all GPIO enums
sh-pfc: r8a73a4: Remove function GPIOs
ARM: shmobile: r8a73a4: Remove IRQC function GPIOs
ARM: shmobile: r8a73a4: Remove SCIF function GPIOs
sh-pfc: r8a73a4: Remove IRQC function GPIOS
sh-pfc: r8a73a4: Remove SCIF function GPIOS
sh-pfc: r8a73a4: Add IRQC pin groups and functions
sh-pfc: r8a73a4: Add SCIF pin groups and functions
...
ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
MMCIF and SDHI1 share the same slot on mackerel. One of them is selected
by a jumper, which cannot be queried from software. Currently in software
one of the two interfaces is selected, depending whether or not the MMCIF
driver is enabled. This is not optimal, since the kernel has to be rebuilt
to switch from one interface to another. Still, so far there isn't a
better option. At least make this selection consistent.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 29 Mar 2013 08:00:21 +0000 (17:00 +0900)]
ARM: shmobile: APE6EVM LAN9220 support
Add LAN9220 support to the APE6EVM board using C and DT.
At this point the PFC driver lacks DT bindings so to
configure the PFC we use PINCTRL in C board code.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Wed, 3 Apr 2013 01:49:18 +0000 (10:49 +0900)]
Merge tag 'renesas-pinmux2-for-v3.10' into boards-base
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10
Highlights:
* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC
This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
This merge is made to supply run-time dependencies for the following
patches that will bea added on top:
ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
Magnus Damm [Tue, 26 Mar 2013 13:50:09 +0000 (22:50 +0900)]
sh-pfc: r8a73a4: GPIO IRQ support
V2 of code to add GPIO -> IRQ mappings to the
PFC table for the r8a73a4 SoC. Requires the IRQs
to be mapped at a fixed location in Linux IRQ
space. The actual IRQs are not handled by the
PFC, instead IRQC is used on r8a73a4.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 13:49:59 +0000 (22:49 +0900)]
sh-pfc: r8a73a4: Support sparse GPIO numbers
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers
in the PFC SoC data. Pin numbers shall be used with the GPIO API from
this point on.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 13:49:49 +0000 (22:49 +0900)]
sh-pfc: Add r8a73a4 pinmux support
Add initial PFC support for the r8a73a4 SoC.
At this point only GPIO interface is supported, move to newer interfaces
planned as incremental changes.
Original authors are Morimoto-san with help from Yoshii-san, thanks to
them for the heavy lifting. Adjusted by Magnus to work together with
updated code in drivers/pinctrl.
Laurent Pinchart [Sun, 10 Mar 2013 16:30:25 +0000 (17:30 +0100)]
sh-pfc: Configure pins as GPIOs at request time when handled externally
When a GPIO is handled by a separate driver the pinmux
gpio_set_direction() handler won't be called. The pin mux type then need
to be configured to GPIO at request time.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Laurent Pinchart [Sun, 10 Mar 2013 02:19:44 +0000 (03:19 +0100)]
sh-pfc: Skip gpiochip registration when no GPIO resource is found
Boards/platforms that register dedicated GPIO devices will not supply a
memory resource for GPIOs. Try to locate the GPIO memory resource at
initialization time, and skip registration of the gpiochip if the
resource can't be found.
This is a temporary modification to ease the transition to separate GPIO
drivers. It should be reverted when all boards and platforms will have
been moved.
Laurent Pinchart [Sun, 10 Mar 2013 02:19:44 +0000 (03:19 +0100)]
sh-pfc: Make GPIO support optional
When implemented as a separate IP block, GPIOs should be handled by a
separate driver. To make this possible GPIO support needs to be optional
in the sh-pfc driver.
If no GPIO data registers are supplied in the SoC information structure
skip registration of the gpiochip.
The target is to get rid of function GPIOs completely. To reach this,
make function GPIOs support optional by skipping the function GPIO chip
registration if no function GPIOS are defined in SoC data.
Magnus Damm [Wed, 13 Mar 2013 11:32:13 +0000 (20:32 +0900)]
gpio: Renesas R-Car GPIO driver V3
This patch is V3 of a GPIO driver for the R-Car series of
SoCs from Renesas. This driver is designed to be reusable
between multiple SoCs that share the same basic building block,
but so far it has only been used on R-Car H1 (r8a7779).
Each driver instance handles 32 GPIOs with individually
maskable IRQs. The driver operates on a single I/O memory
range and the 32 GPIOs are hooked up a single interrupt.
In the case of R-Car H1 either external IRQ pins or GPIOs
with interrupts can be used for on-board interupts. For
external IRQs 4 pins are supported, and in the case of GPIO
there are 202 GPIOS as 202 interrupts hooked up via 6 driver
instances and to the GIC and the Cortex-A9 Quad.
At this point this driver is interfacing as a regular
platform device driver. In the future DT support will be
submitted as an incremental feature patch.
Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7779.h header.
Laurent Pinchart [Tue, 26 Mar 2013 00:44:52 +0000 (01:44 +0100)]
sh-pfc: Fix compiler warning when BUG()
The sh_pfc_phys_to_virt() function ends with a BUG() statement without a
return. When CONFIG_BUG isn't set the function will thus have no return
value. Fix it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 2 Apr 2013 02:08:34 +0000 (11:08 +0900)]
Merge branch 'soc' into pinmux-base
Conflicts:
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
This merge is to provide r8a73a4 SoC files, which are added in the
soc branch and depended on by r8a73a4 pfc-changes which are to
be added to the pinmux branch.
Magnus Damm [Wed, 27 Mar 2013 15:49:54 +0000 (00:49 +0900)]
ARM: shmobile: r8a7790 IRQC support
Add IRQC interrupt controller support to r8a7790 by
hooking up a single IRQC instances to handle 4 external
IRQ signals. The IRQC controller is tied to SPIs of
the GIC. On r8a7790 the external IRQ pins routing is
handled by the PFC which is excluded from this patch.
Both platform devices and DT devices are added in this
patch. The platform device versions are used to provide
a static interrupt map configuration for board code
written in C.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 27 Mar 2013 15:49:44 +0000 (00:49 +0900)]
ARM: shmobile: r8a7790 SCIF support
Add SCIF serial port support to the r8a7790 SoC by
adding platform devices for SCIFA0 -> SCIFA2 as well
as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF1 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 27 Mar 2013 15:49:34 +0000 (00:49 +0900)]
ARM: shmobile: Initial r8a7790 SoC support
Add initial support for the r8a7790 SoC including:
- Single Cortex-A15 CPU Core
- GIC
- Architecture timer
No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7779: remove DIV4 clocks and use fixed ratio clock
R-Car H1 has many clocks, and it is possible to read/use clock ratio
of these clocks from FRQMRx as DIV4 clocks.
But, these ratio are fixed value and these are decided
by MD pin status.
This means that we can use fixed ratio clock via MD pin status,
instead of DIV4 clocks.
This patch reads MD pin status, and sets PLLA clock (= root clock),
and used fixed ratio clock for other clocks.
It was tesed on marzen board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: add struct clk_ratio and fixed ratio clock macro
Renesas chip has many clocks inside,
and some of them are using fixed ratio via parent clock.
Current shmobile clock code is using own divX_recalc function
and divX_clk_ops.
This patch can reduce these code
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bastian Hecht [Wed, 27 Mar 2013 13:54:04 +0000 (14:54 +0100)]
ARM: shmobile: r8a7740: Migrate from INTC to GIC
With the added capabilty of the intc_irqpin driver to handle shared
external IRQs, all prerequisites are fulfilled and we are ready to
migrate completely to GIC. This includes the following steps:
- Kconfig: select ARM_GIC and RENESAS_INTC_IRQPIN
- intc-r8a7740: Throw out all legacy INTC code and init the GIC. We need
to mask out all shared IRQs as it is needed by the
shared intc_irqpin driver.
- setup-r8a7740: Add 4 irqpin devices to handle external IRQs and update
all IRQ numbers to point to the GIC SPI.
- board-armadillo: Update all IRQ numbers to point to the GIC SPI.
- pfc-r8a7740: Update all IRQ numbers of the GPIOs to point to the GIC
SPI.
Magnus Damm [Mon, 18 Mar 2013 13:58:18 +0000 (22:58 +0900)]
ARM: shmobile: Disallow PINCTRL without GPIOLIB
Modify mach-shmobile to only select PINCTRL in case of
ARCH_WANT_OPTIONAL_GPIOLIB is set.
This fixes a build error triggered when adding a new SoC
lacking GPIO software support (ARCH_WANT_OPTIONAL_GPIOLIB=n):
CC drivers/tty/vt/keyboard.o
In file included from drivers/pinctrl/core.c:30:0:
include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep':
include/asm-generic/gpio.h:270:2: error: implicit declaration of function '__gpio_get_value'
include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep':
include/asm-generic/gpio.h:276:2: error: implicit declaration of function '__gpio_set_value'
drivers/pinctrl/core.c: In function 'pinctrl_ready_for_gpio_range':
drivers/pinctrl/core.c:297:9: error: implicit declaration of function 'gpio_to_chip'
drivers/pinctrl/core.c:297:27: warning: initialization makes pointer from integer without a cast
drivers/pinctrl/core.c:304:45: error: dereferencing pointer to incomplete type
drivers/pinctrl/core.c:305:26: error: dereferencing pointer to incomplete type
drivers/pinctrl/core.c:305:39: error: dereferencing pointer to incomplete type
make[2]: *** [drivers/pinctrl/core.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make[1]: *** Waiting for unfinished jobs....
LD drivers/sh/built-in.o
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT nodes for the 4 irqpin interrupt controllers on sh73a0. We add them
to sh73a0.dtsi, which is also used by configurations, doing all their
device instantiation from board the .c code. We rely on the fact, that
such configurations don't instantiate devices from the device-tree.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SCIF serial port support to the r8a7778 SoC by
adding platform devices together with clock bindings.
DT device description is excluded at this point since
such bindings are still under development.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add initial support for the R8A7778 R-Car M1A SoC.
No static virtual mappings are used, all the components
make use of ioremap().
DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
It is based on v1.0 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: sh73a0: wait for completion when kicking the clock
To reconfigure clocks, controlled by FRQCRA and FRQCRB, a kick bit has to
be set and to make sure the setting has taken effect, it has to be read
back repeatedly until it is cleared by the hardware. This patch adds the
waiting part, that was missing until now.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Magnus Damm <damm@opensource.se Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 01:34:42 +0000 (10:34 +0900)]
ARM: shmobile: r8a73a4 IRQC support V2
Add IRQC interrupt controller support to r8a73a4 by
hooking up two IRQC instances to handle 58 external
IRQ signals. There IRQC controllers are tied to SPIs
of the GIC. On r8a73a4 exact IRQ pin routing is handled
by the PFC which is excluded from this patch.
Both platform devices and DT devices are added in this
patch. The platform device versions are used to provide
a static interrupt map configuration for board code
written in C.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 01:34:33 +0000 (10:34 +0900)]
ARM: shmobile: r8a73a4 SCIF support V3
V3 of SCIF serial port support for the r8a73a4 SoC.
This is done by adding platform devices for SCIFA0
-> SCIFA1 as well as SCIFB0 -> SCIFB3 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 01:34:24 +0000 (10:34 +0900)]
ARM: shmobile: Initial r8a73a4 SoC support V3
V3 of initial support for the r8a73a4 SoC including:
- Single Cortex-A15 CPU Core
- GIC
- Architecture timer
No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 2 Apr 2013 01:55:57 +0000 (10:55 +0900)]
Merge tag 'renesas-intc-external-irq2-for-v3.10' into soc-base
Update for Renesas INTC External IRQ pin driver for v3.10
This adds support for shared interrupt lines to the
Renesas INTC External IRQ pin driver which has already
been queued up for v3.10 (tag renesas-intc-external-irq-for-v3.10).
The patch "irqchip: intc-irqpin: Add support for shared interrupt lines"
in renesas-intc-external-irq2-for-v3.10 is a dependency for
"ARM: shmobile: r8a7740: Migrate from INTC to GIC". That dependency is
the reason for this merge.
Bastian Hecht [Wed, 27 Mar 2013 13:54:03 +0000 (14:54 +0100)]
irqchip: intc-irqpin: Add support for shared interrupt lines
On some hardware we don't have a 1-1 mapping from the external
interrupts coming from INTC to the GIC SPI pins. We can however
share lines to demux incoming IRQs on these SoCs.
This patch enables the intc_irqpin driver to detect requests for shared
interrupt lines and demuxes them properly by querying the INTC INTREQx0A
registers.
If you need multiple shared intc_irqpin device instances, be sure to mask
out all interrupts on the INTC that share the one line before you start
to register them. Else you run into IRQ floods that would be caused by
interrupts for which no handler has been set up yet when the first
intc_irqpin device is registered.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull SCSI target fixes from Nicholas Bellinger:
"These are mostly minor fixes this time around. The iscsi-target CHAP
big-endian bugfix and bump FD_MAX_SECTORS=2048 default patch to allow
1MB sized I/Os for FILEIO backends on >= v3.5 code are both CC'ed to
stable.
Also, there is a persistent reservations regression that has recently
been reported for >= v3.8.x code, that is currently being tracked down
for v3.9."
* git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
target/pscsi: Reject cross page boundary case in pscsi_map_sg
target/file: Bump FD_MAX_SECTORS to 2048 to handle 1M sized I/Os
tcm_vhost: Flush vhost_work in vhost_scsi_flush()
tcm_vhost: Add missed lock in vhost_scsi_clear_endpoint()
target: fix possible memory leak in core_tpg_register()
target/iscsi: Fix mutual CHAP auth on big-endian arches
target_core_sbc: use noop for SYNCHRONIZE_CACHE
Linus Torvalds [Sat, 23 Mar 2013 22:49:49 +0000 (15:49 -0700)]
Merge tag 'md-3.9-fixes' of git://neil.brown.name/md
Pull md fixes from NeilBrown:
"A few bugfixes for md
- recent regressions in raid5
- recent regressions in dmraid
- a few instances of CONFIG_MULTICORE_RAID456 linger
Several tagged for -stable"
* tag 'md-3.9-fixes' of git://neil.brown.name/md:
md: remove CONFIG_MULTICORE_RAID456 entirely
md/raid5: ensure sync and DISCARD don't happen at the same time.
MD: Prevent sysfs operations on uninitialized kobjects
MD RAID5: Avoid accessing gendisk or queue structs when not available
md/raid5: schedule_construction should abort if nothing to do.
Linus Torvalds [Sat, 23 Mar 2013 19:33:36 +0000 (12:33 -0700)]
Merge tag 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
Pull libata updates from Jeff Garzik:
"Simple stuff. See one-line summaries."
* tag 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
pata_samsung_cf: use module_platform_driver_probe()
[libata] Avoid specialized TLA's in ZPODD's Kconfig
libata-acpi.c: fix copy and paste mistake in ata_acpi_register_power_resource
sata_fsl: Remove redundant NULL check before kfree
ahci: Add Device IDs for Intel Wellsburg PCH
ata_piix: Add MODULE_PARM_DESC to prefer_ms_hyperv
Linus Torvalds [Sat, 23 Mar 2013 19:32:14 +0000 (12:32 -0700)]
Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"One bugfix for the tegra driver. Two updates regarding email
addresses and MAINTAINERS which I like to have up-to-date so people
can be reached immediately. While we are here, there is on PCI_ID
addition."
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
MAINTAINERS: add maintainer entry for atmel i2c driver
i2c: Fix my e-mail address in drivers and documentation
i2c: iSMT: add Intel Avoton DeviceIDs
i2c: tegra: check the clk_prepare_enable() return value
Linus Torvalds [Sat, 23 Mar 2013 19:30:39 +0000 (12:30 -0700)]
Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog fixes from Wim Van Sebroeck:
"Fix a boot issues and correct the AcpiMmioSel bitmask in the
sp5100_tco watchdog device driver"
* git://www.linux-watchdog.org/linux-watchdog:
watchdog: sp5100_tco: Set the AcpiMmioSel bitmask value to 1 instead of 2
watchdog: sp5100_tco: Remove code that may cause a boot failure
Torsten Duwe [Sat, 23 Mar 2013 14:39:34 +0000 (15:39 +0100)]
KMS: fix EDID detailed timing frame rate
When KMS has parsed an EDID "detailed timing", it leaves the frame rate
zeroed. Consecutive (debug-) output of that mode thus yields 0 for
vsync. This simple fix also speeds up future invocations of
drm_mode_vrefresh().
While it is debatable whether this qualifies as a -stable fix I'd apply
it for consistency's sake; drm_helper_probe_single_connector_modes()
does the same thing already for all probed modes.
Torsten Duwe [Sat, 23 Mar 2013 14:38:22 +0000 (15:38 +0100)]
KMS: fix EDID detailed timing vsync parsing
EDID spreads some values across multiple bytes; bit-fiddling is needed
to retrieve these. The current code to parse "detailed timings" has a
cut&paste error that results in a vsync offset of at most 15 lines
instead of 63.
See
http://en.wikipedia.org/wiki/EDID
and in the "EDID Detailed Timing Descriptor" see bytes 10+11 show why
that needs to be a left shift.
Pull NVMe driver update from Matthew Wilcox:
"These patches have mostly been baking for a few months; sorry I didn't
get them in during the merge window. They're all bug fixes, except
for the addition of the SMART log and the addition to MAINTAINERS."
* git://git.infradead.org/users/willy/linux-nvme:
NVMe: Add namespaces with no LBA range feature
MAINTAINERS: Add entry for the NVMe driver
NVMe: Initialize iod nents to 0
NVMe: Define SMART log
NVMe: Add result to nvme_get_features
NVMe: Set result from user admin command
NVMe: End queued bio requests when freeing queue
NVMe: Free cmdid on nvme_submit_bio error
Linus Torvalds [Fri, 22 Mar 2013 23:41:44 +0000 (16:41 -0700)]
Merge branch 'akpm' (fixes from Andrew)
Merge misc fixes from Andrew Morton.
* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
mqueue: sys_mq_open: do not call mnt_drop_write() if read-only
mm/hotplug: only free wait_table if it's allocated by vmalloc
dma-debug: update DMA debug API to better handle multiple mappings of a buffer
dma-debug: fix locking bug in check_unmap()
drivers/rtc/rtc-at91rm9200.c: use a variable for storing IMR
drivers/video/ep93xx-fb.c: include <linux/io.h> for devm_ioremap()
drivers/rtc/rtc-da9052.c: fix for rtc device registration
mm: zone_end_pfn is too small
poweroff: change orderly_poweroff() to use schedule_work()
mm/hugetlb: fix total hugetlbfs pages count when using memory overcommit accouting
printk: Provide a wake_up_klogd() off-case
irq_work.h: fix warning when CONFIG_IRQ_WORK=n
Vladimir Davydov [Fri, 22 Mar 2013 22:04:51 +0000 (15:04 -0700)]
mqueue: sys_mq_open: do not call mnt_drop_write() if read-only
mnt_drop_write() must be called only if mnt_want_write() succeeded,
otherwise the mnt_writers counter will diverge.
mnt_writers counters are used to check if remounting FS as read-only is
OK, so after an extra mnt_drop_write() call, it would be impossible to
remount mqueue FS as read-only. Besides, on umount a warning would be
printed like this one:
=====================================
[ BUG: bad unlock balance detected! ]
3.9.0-rc3 #5 Not tainted
-------------------------------------
a.out/12486 is trying to release lock (sb_writers) at:
mnt_drop_write+0x1f/0x30
but there are no more locks to release!
Signed-off-by: Vladimir Davydov <vdavydov@parallels.com> Cc: Doug Ledford <dledford@redhat.com> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Alexander Duyck [Fri, 22 Mar 2013 22:04:49 +0000 (15:04 -0700)]
dma-debug: update DMA debug API to better handle multiple mappings of a buffer
There were reports of the igb driver unmapping buffers without calling
dma_mapping_error. On closer inspection issues were found in the DMA
debug API and how it handled multiple mappings of the same buffer.
The issue I found is the fact that the debug_dma_mapping_error would
only set the map_err_type to MAP_ERR_CHECKED in the case that the was
only one match for device and device address. However in the case of
non-IOMMU, multiple addresses existed and as a result it was not setting
this field once a second mapping was instantiated. I have resolved this
by changing the search so that it instead will now set MAP_ERR_CHECKED
on the first buffer that matches the device and DMA address that is
currently in the state MAP_ERR_NOT_CHECKED.
A secondary side effect of this patch is that in the case of multiple
buffers using the same address only the last mapping will have a valid
map_err_type. The previous mappings will all end up with map_err_type
set to MAP_ERR_CHECKED because of the dma_mapping_error call in
debug_dma_map_page. However this behavior may be preferable as it means
you will likely only see one real error per multi-mapped buffer, versus
the current behavior of multiple false errors mer multi-mapped buffer.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Reviewed-by: Shuah Khan <shuah.khan@hp.com> Tested-by: Shuah Khan <shuah.khan@hp.com> Cc: Jakub Kicinski <kubakici@wp.pl> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Alexander Duyck [Fri, 22 Mar 2013 22:04:48 +0000 (15:04 -0700)]
dma-debug: fix locking bug in check_unmap()
In check_unmap() it is possible to get into a dead-locked state if
dma_mapping_error is called. The problem is that the bucket is locked in
check_unmap, and locked again by debug_dma_mapping_error which is called
by dma_mapping_error. To resolve that we must release the lock on the
bucket before making the call to dma_mapping_error.
[akpm@linux-foundation.org: restore 80-col trickery to be consistent with the rest of the file] Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Reviewed-by: Shuah Khan <shuah.khan@hp.com> Tested-by: Shuah Khan <shuah.khan@hp.com> Cc: Jakub Kicinski <kubakici@wp.pl> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Nicolas Ferre [Fri, 22 Mar 2013 22:04:47 +0000 (15:04 -0700)]
drivers/rtc/rtc-at91rm9200.c: use a variable for storing IMR
On some revisions of AT91 SoCs, the RTC IMR register is not working.
Instead of elaborating a workaround for that specific SoC or IP version,
we simply use a software variable to store the Interrupt Mask Register
and modify it for each enabling/disabling of an interrupt. The overhead
of this is negligible anyway.
The interrupt mask register (IMR) for the RTC is broken on the AT91SAM9x5
sub-family of SoCs (good overview of the members here:
http://www.eewiki.net/display/linuxonarm/AT91SAM9x5 ). The "user visible
effect" is the RTC doesn't work.
That sub-family is less than two years old and only has devicetree (DT)
support and came online circa lk 3.7 . The dust is yet to settle on the
DT stuff at least for AT91 SoCs (translation: lots of stuff is still
broken, so much that it is hard to know where to start).
The fix in the patch is pretty simple: just shadow the silicon IMR
register with a variable in the driver. Some older SoCs (pre-DT) use the
the rtc-at91rm9200 driver (e.g. obviously the AT91RM9200) and they should
not be impacted by the change. There shouldn't be a large volume of
interrupts associated with a RTC.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reported-by: Douglas Gilbert <dgilbert@interlog.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
drivers/video/ep93xx-fb.c: include <linux/io.h> for devm_ioremap()
Commit be8678149701 ("drivers/video/ep93xx-fb.c: use devm_ functions")
introduced a build error:
drivers/video/ep93xx-fb.c: In function 'ep93xxfb_probe':
drivers/video/ep93xx-fb.c:532: error: implicit declaration of function 'devm_ioremap'
drivers/video/ep93xx-fb.c:533: warning: assignment makes pointer from integer without a cast
Include <linux/io.h> to pickup the declaration of 'devm_ioremap'.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Acked-by: Ryan Mallon <rmallon@gmail.com> Cc: Damien Cassou <damien.cassou@lifl.fr> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Oleg Nesterov [Fri, 22 Mar 2013 22:04:41 +0000 (15:04 -0700)]
poweroff: change orderly_poweroff() to use schedule_work()
David said:
Commit 6c0c0d4d1080 ("poweroff: fix bug in orderly_poweroff()")
apparently fixes one bug in orderly_poweroff(), but introduces
another. The comments on orderly_poweroff() claim it can be called
from any context - and indeed we call it from interrupt context in
arch/powerpc/platforms/pseries/ras.c for example. But since that
commit this is no longer safe, since call_usermodehelper_fns() is not
safe in interrupt context without the UMH_NO_WAIT option.
orderly_poweroff() can be used from any context but UMH_WAIT_EXEC is
sleepable. Move the "force" logic into __orderly_poweroff() and change
orderly_poweroff() to use the global poweroff_work which simply calls
__orderly_poweroff().
While at it, remove the unneeded "int argc" and change argv_split() to
use GFP_KERNEL.
We use the global "bool poweroff_force" to pass the argument, this can
obviously affect the previous request if it is pending/running. So we
only allow the "false => true" transition assuming that the pending
"true" should succeed anyway. If schedule_work() fails after that we
know that work->func() was not called yet, it must see the new value.
This means that orderly_poweroff() becomes async even if we do not run
the command and always succeeds, schedule_work() can only fail if the
work is already pending. We can export __orderly_poweroff() and change
the non-atomic callers which want the old semantics.
Signed-off-by: Oleg Nesterov <oleg@redhat.com> Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reported-by: David Gibson <david@gibson.dropbear.id.au> Cc: Lucas De Marchi <lucas.demarchi@profusion.mobi> Cc: Feng Hong <hongfeng@marvell.com> Cc: Kees Cook <keescook@chromium.org> Cc: Serge Hallyn <serge.hallyn@canonical.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Wanpeng Li [Fri, 22 Mar 2013 22:04:40 +0000 (15:04 -0700)]
mm/hugetlb: fix total hugetlbfs pages count when using memory overcommit accouting
hugetlb_total_pages is used for overcommit calculations but the current
implementation considers only the default hugetlb page size (which is
either the first defined hugepage size or the one specified by
default_hugepagesz kernel boot parameter).
If the system is configured for more than one hugepage size, which is
possible since commit a137e1cc6d6e ("hugetlbfs: per mount huge page
sizes") then the overcommit estimation done by __vm_enough_memory()
(resp. shown by meminfo_proc_show) is not precise - there is an
impression of more available/allowed memory. This can lead to an
unexpected ENOMEM/EFAULT resp. SIGSEGV when memory is accounted.
Testcase:
boot: hugepagesz=1G hugepages=1
the default overcommit ratio is 50
before patch:
wake_up_klogd() is useless when CONFIG_PRINTK=n because neither printk()
nor printk_sched() are in use and there are actually no waiter on
log_wait waitqueue. It should be a stub in this case for users like
bust_spinlocks().
Otherwise this results in this warning when CONFIG_PRINTK=n and
CONFIG_IRQ_WORK=n:
kernel/built-in.o In function `wake_up_klogd':
(.text.wake_up_klogd+0xb4): undefined reference to `irq_work_queue'
To fix this, provide an off-case for wake_up_klogd() when
CONFIG_PRINTK=n.
There is much more from console_unlock() and other console related code
in printk.c that should be moved under CONFIG_PRINTK. But for now,
focus on a minimal fix as we passed the merged window already.
[akpm@linux-foundation.org: include printk.h in bust_spinlocks.c] Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Reported-by: James Hogan <james.hogan@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Takahisa Tanaka [Sun, 3 Mar 2013 05:48:00 +0000 (14:48 +0900)]
watchdog: sp5100_tco: Set the AcpiMmioSel bitmask value to 1 instead of 2
The AcpiMmioSel bit is bit 1 in the AcpiMmioEn register, but the current
sp5100_tco driver is using bit 2.
See 2.3.3 Power Management (PM) Registers page 150 of the
AMD SB800-Series Southbridges Register Reference Guide [1].
AcpiMmioEn - RW – 8/16/32 bits - [PM_Reg: 24h]
Field Name Bits Default Description
AcpiMMioDecodeEn 0 0b Set to 1 to enable AcpiMMio space.
AcpiMMIoSel 1 0b Set AcpiMMio registers to be memory-mapped or IO-mapped space.
0: Memory-mapped space
1: I/O-mapped space
The sp5100_tco driver expects zero as a value of AcpiMmioSel (bit 1).
Fortunately, no problems were caused by this typo, because the default
value of the undocumented misused bit 2 seems to be zero.
However, the sp5100_tco driver should use the correct bitmask value.
Takahisa Tanaka [Sun, 3 Mar 2013 05:52:07 +0000 (14:52 +0900)]
watchdog: sp5100_tco: Remove code that may cause a boot failure
A problem was found on PC's with the SB700 chipset: The PC fails to
load BIOS after running the 3.8.x kernel until the power is completely
cut off. It occurs in all 3.8.x versions and the mainline version as of
2/4. The issue does not occur with the 3.7.x builds.
There are two methods for accessing the watchdog registers.
1. Re-programming a resource address obtained by allocate_resource()
to chipset.
2. Use the direct memory-mapped IO access.
The method 1 can be used by all the chipsets (SP5100, SB7x0, SB8x0 or
later). However, experience shows that only PC with the SB8x0 (or
later) chipsets can use the method 2.
This patch removes the method 1, because the critical problem was found.
That's why the watchdog timer was able to be used on SP5100 and SB7x0
chipsets until now.
projects / karo-tx-linux.git / log