]> git.karo-electronics.de Git - karo-tx-linux.git/log
karo-tx-linux.git
10 years agoENGR00287278 mxc: mlb: Enable the clock when open MLB device.
Luwei Zhou [Mon, 11 Nov 2013 08:56:57 +0000 (16:56 +0800)]
ENGR00287278 mxc: mlb: Enable the clock when open MLB device.

The driver enalbe/disable the clock in probe()/remove().
It should be done in open()/close() hook function in fact.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00287512 net:fec: fix WARNING caused by lack of calling dma_mapping_error()
Fugang Duan [Tue, 12 Nov 2013 02:00:43 +0000 (10:00 +0800)]
ENGR00287512 net:fec: fix WARNING caused by lack of calling dma_mapping_error()

Enable CONFIG_HAVE_DMA_API_DEBUG, the kernel dump warning:

------------[ cut here ]------------
WARNING: at lib/dma-debug.c:937 check_unmap+0x43c/0x7d8()
fec 2188000.ethernet: DMA-API: device driver failed to check map
error[device address=0x00000000383a8040] [size=2048 bytes] [mapped as single]

Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.17-16827-g9cdb0ba-dirty #188
[<80013c4c>] (unwind_backtrace+0x0/0xf8) from [<80011704>] (show_stack+0x10
[<80011704>] (show_stack+0x10/0x14) from [<80025614>] (warn_slowpath_common
[<80025614>] (warn_slowpath_common+0x4c/0x6c) from [<800256c8>] (warn_slowp
[<800256c8>] (warn_slowpath_fmt+0x30/0x40) from [<8026bfdc>] (check_unmap+0
[<8026bfdc>] (check_unmap+0x43c/0x7d8) from [<8026c584>] (debug_dma_unmap_p
[<8026c584>] (debug_dma_unmap_page+0x6c/0x78) from [<8038049c>] (fec_enet_r
[<8038049c>] (fec_enet_rx_napi+0x254/0x8a8) from [<804dc8c0>] (net_rx_actio
[<804dc8c0>] (net_rx_action+0x94/0x160) from [<8002c758>] (__do_softirq+0xe
[<8002c758>] (__do_softirq+0xe8/0x1d0) from [<8002c8e8>] (do_softirq+0x4c/0
[<8002c8e8>] (do_softirq+0x4c/0x58) from [<8002cb50>] (irq_exit+0x90/0xc8)
[<8002cb50>] (irq_exit+0x90/0xc8) from [<8000ea88>] (handle_IRQ+0x3c/0x94)
[<8000ea88>] (handle_IRQ+0x3c/0x94) from [<8000855c>] (gic_handle_irq+0x28/
[<8000855c>] (gic_handle_irq+0x28/0x5c) from [<8000de00>] (__irq_svc+0x40/0
Exception stack(0x815a5f38 to 0x815a5f80)
5f20:                                                       815a5f80 3b9aca
5f40: 0fe52383 00000002 0dd8950e 00000002 81e7b080 00000000 00000000 815ac4
5f60: 806032ec 00000000 00000017 815a5f80 80059028 8041fc4c 60000013 ffffff
[<8000de00>] (__irq_svc+0x40/0x50) from [<8041fc4c>] (cpuidle_enter_state+0
[<8041fc4c>] (cpuidle_enter_state+0x50/0xf0) from [<8041fd94>] (cpuidle_idl
[<8041fd94>] (cpuidle_idle_call+0xa8/0x14c) from [<8000edac>] (arch_cpu_idl
[<8000edac>] (arch_cpu_idle+0x10/0x4c) from [<800582f8>] (cpu_startup_entry
[<800582f8>] (cpu_startup_entry+0x60/0x130) from [<80bc7a48>] (start_kernel
[<80bc7a48>] (start_kernel+0x2d0/0x328) from [<10008074>] (0x10008074)
---[ end trace c6edec32436e0042 ]---

Because dma-debug add new interfaces to debug dma mapping errors, pls refer
to: http://lwn.net/Articles/516640/

After dma mapping, it must call dma_mapping_error() to check mapping error,
otherwise the map_err_type alway is MAP_ERR_NOT_CHECKED, check_unmap() define
the mapping is not checked and dump the error msg.

So, and dma_mapping_error() checking to fix the WARNING.

Signed-off-by: Fugang Duan <B38611@freescale.com>
10 years agoENGR00287256 mxc: mlb: Fix the SYNC mode hang issue when connected with MITB
Luwei Zhou [Mon, 11 Nov 2013 08:03:59 +0000 (16:03 +0800)]
ENGR00287256 mxc: mlb: Fix the SYNC mode hang issue when connected with MITB

This patch fixes the hang and crash issue of MLB SYNC mode in the driver.
The MITB will casue Sabreauto to hang and crash when testing the SYNC mode.
It is because MITB will cause something error on MLB bus when stopping the
SYNC test. The Sabreauto will keep entering error ISR and hang. Since we
don't know the details about MITB, we make drivers provide IO_CTRL
interface to disable the interrupt in SYNC mode.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agomtd: gpmi: only scan two chips for imx6
Huang Shijie [Thu, 7 Nov 2013 09:46:37 +0000 (17:46 +0800)]
mtd: gpmi: only scan two chips for imx6

We cannot scan two chips for imx23 and imx28:
  imx23: the Ready-Busy1 line is not connected for some board.
  imx28: we do not set the pinctrl for Ready-Busy1

So we only scan two chips for imx6.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: fix kernel BUG due to racing DMA operations
Huang Shijie [Mon, 11 Nov 2013 04:13:45 +0000 (12:13 +0800)]
mtd: gpmi: fix kernel BUG due to racing DMA operations

[1] The gpmi uses the nand_command_lp to issue the commands to NAND chips.
    The gpmi issues a DMA operation with gpmi_cmd_ctrl when it handles
    a NAND_CMD_NONE control command. So when we read a page(NAND_CMD_READ0)
    from the NAND, we may send two DMA operations back-to-back.

    If we do not serialize the two DMA operations, we will meet a bug when

    1.1) we enable CONFIG_DMA_API_DEBUG, CONFIG_DMADEVICES_DEBUG,
         and CONFIG_DEBUG_SG.

    1.2) Use the following commands in an UART console and a SSH console:
         cmd 1: while true;do dd if=/dev/mtd0 of=/dev/null;done
         cmd 1: while true;do dd if=/dev/mmcblk0 of=/dev/null;done

    The kernel log shows below:
    -----------------------------------------------------------------
    kernel BUG at lib/scatterlist.c:28!
    Unable to handle kernel NULL pointer dereference at virtual address 00000000
      .........................
    [<80044a0c>] (__bug+0x18/0x24) from [<80249b74>] (sg_next+0x48/0x4c)
    [<80249b74>] (sg_next+0x48/0x4c) from [<80255398>] (debug_dma_unmap_sg+0x170/0x1a4)
    [<80255398>] (debug_dma_unmap_sg+0x170/0x1a4) from [<8004af58>] (dma_unmap_sg+0x14/0x6c)
    [<8004af58>] (dma_unmap_sg+0x14/0x6c) from [<8027e594>] (mxs_dma_tasklet+0x18/0x1c)
    [<8027e594>] (mxs_dma_tasklet+0x18/0x1c) from [<8007d444>] (tasklet_action+0x114/0x164)
    -----------------------------------------------------------------

    1.3) Assume the two DMA operations is X (first) and Y (second).

         The root cause of the bug:
   Assume process P issues DMA X, and sleep on the completion
 @this->dma_done. X's tasklet callback is dma_irq_callback. It firstly
 wake up the process sleeping on the completion @this->dma_done,
 and then trid to unmap the scatterlist S. The waked process P will
 issue Y in another ARM core. Y initializes S->sg_magic to zero
 with sg_init_one(), while dma_irq_callback is unmapping S at the same
 time.

 See the diagram:

                   ARM core 0              |         ARM core 1
 -------------------------------------------------------------
         (P issues DMA X, then sleep)  --> |
                                           |
         (X's tasklet wakes P)         --> |
                                           |
                                           | <-- (P begin to issue DMA Y)
                                           |
         (X's tasklet unmap the            |
      scatterlist S with dma_unmap_sg) --> | <-- (Y calls sg_init_one() to init
                                           |      scatterlist S)
                                           |

[2] This patch serialize both the X and Y in the following way:
     Unmap the DMA scatterlist S firstly, and wake up the process at the end
     of the DMA callback, in such a way, Y will be executed after X.

     After this patch:

                   ARM core 0              |         ARM core 1
 -------------------------------------------------------------
         (P issues DMA X, then sleep)  --> |
                                           |
         (X's tasklet unmap the            |
      scatterlist S with dma_unmap_sg) --> |
                                           |
         (X's tasklet wakes P)         --> |
                                           |
                                           | <-- (P begin to issue DMA Y)
                                           |
                                           | <-- (Y calls sg_init_one() to init
                                           |     scatterlist S)
                                           |

Cc: stable@vger.kernel.org # 3.2
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agoENGR00174886-2 - EPDC fb: Don't register EPDC unless "epdc" kernel option set
Danny Nold [Wed, 22 Feb 2012 18:59:59 +0000 (12:59 -0600)]
ENGR00174886-2 - EPDC fb: Don't register EPDC unless "epdc" kernel option set

- EPDC firmware build was breaking due to binary build pre-empting
the conversion from .fw.ihex->.fw.  Resolve this by forcing
firmware objects to be built in order.

Signed-off-by: Danny Nold <dannynold@freescale.com>
(cherry picked from commit 7b6cb73b0a86a1d274633830fed5c65c1a0dd7d8)

10 years agoENGR00279944 ath6kl: sdio: fix system panic when doing wifi stress test
Jason Liu [Mon, 11 Nov 2013 06:29:01 +0000 (14:29 +0800)]
ENGR00279944 ath6kl: sdio: fix system panic when doing wifi stress test

When did the wifi test, meet one following kernel panic:

Unable to handle kernel paging request at virtual address 1a480000
pgd = 80004000
[1a480000] *pgd=00000000
Internal error: Oops: 805 [#1] SMP ARM
Modules linked in: ath6kl_sdio ath6kl_core [last unloaded: ath6kl_core]
CPU: 0 PID: 1953 Comm: kworker/u4:0 Not tainted 3.10.9-1.0.0_alpha+dbf364b #1
Workqueue: ath6kl ath6kl_sdio_write_async_work [ath6kl_sdio]
task: dcc9a680 ti: dc9ae000 task.ti: dc9ae000
PC is at v7_dma_clean_range+0x20/0x38
LR is at dma_cache_maint_page+0x50/0x54
pc : [<8001a6f8>]    lr : [<800170fc>]    psr: 20000093
sp : dc9afcf8  ip : 8001a748  fp : 00000004
r10: 00000000  r9 : 00000001  r8 : 00000000
r7 : 00000001  r6 : 00000000  r5 : 80cb7000  r4 : 03f9a480
r3 : 0000001f  r2 : 00000020  r1 : 1a480000  r0 : 1a480000
Flags: nzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7d  Table: 6cc5004a  DAC: 00000015
Process kworker/u4:0 (pid: 1953, stack limit = 0xdc9ae238)
Stack: (0xdc9afcf8 to 0xdc9b0000)
fce0:                                                       80c9b29c 00000000
fd00: 00000000 80017134 8001a748 dc302ac0 00000000 00000000 dc454a00 80c12ed8
fd20: dc115410 80017238 00000000 dc454a10 00000001 80017588 00000001 00000000
fd40: 00000000 dc302ac0 dc9afe38 dc9afe68 00000004 80c12ed8 00000000 dc454a00
fd60: 00000004 80436f88 00000000 00000000 00000600 0000ffff 0000000c 80c113c4
fd80: 80c9b29c 00000001 00000004 dc115470 60000013 dc302ac0 dc46e000 dc302800
fda0: dc9afe10 dc302b78 60000013 dc302ac0 dc46e000 00000035 dc46e5b0 80438c90
fdc0: dc9afe10 dc302800 dc302800 dc9afe68 dc9afe38 80424cb4 00000005 dc9afe10
fde0: dc9afe20 80424de8 dc9afe10 dc302800 dc46e910 80424e90 dc473c00 dc454f00
fe00: 000001b5 7f619d64 dcc7c830 00000000 00000000 dc9afe38 dc9afe68 00000000
fe20: 00000000 00000000 dc9afe28 dc9afe28 80424d80 00000000 00000035 9cac0034
fe40: 00000000 00000000 00000000 00000000 000001b5 00000000 00000000 00000000
fe60: dc9afe68 dc9afe10 3b9aca00 00000000 00000080 00000034 00000000 00000100
fe80: 00000000 00000000 dc9afe10 00000004 dc454a00 00000000 dc46e010 dc46e96c
fea0: dc46e000 dc46e964 00200200 00100100 dc46e910 7f619ec0 00000600 80c0e770
fec0: dc15a900 dcc7c838 00000000 dc46e954 8042d434 dcc44680 dc46e954 dc004400
fee0: dc454500 00000000 00000000 dc9ae038 dc004400 8003c450 dcc44680 dc004414
ff00: dc46e954 dc454500 00000001 dcc44680 dc004414 dcc44698 dc9ae000 dc9ae030
ff20: 00000001 dc9ae000 dc004400 8003d158 8003d020 00000000 00000000 80c53941
ff40: dc9aff64 dcb71ea0 00000000 dcc44680 8003d020 00000000 00000000 00000000
ff60: 00000000 80042480 00000000 00000000 000000f8 dcc44680 00000000 00000000
ff80: dc9aff80 dc9aff80 00000000 00000000 dc9aff90 dc9aff90 dc9affac dcb71ea0
ffa0: 800423cc 00000000 00000000 8000e018 00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
...
---[ end trace 0c038f0b8e0b67a3 ]---

The kernel panic is caused by the sg_buf is not set correctly with the
following code when compiled with Yocto GCC 4.8.1:

drivers/net/wireless/ath/ath6kl/hif.h:
struct hif_scatter_req {
        struct list_head list;
        /* address for the read/write operation */
        u32 addr;
...

        /* bounce buffer for upper layers to copy to/from */
        u8 *virt_dma_buf;

        struct hif_scatter_item scat_list[1];

        u32 scat_q_depth;
};

(Note: the scat_req.scat_list[] will dynamiclly grow with run-time)

drivers/net/wireless/ath/ath6kl/sdio.c: ath6kl_sdio_setup_scat_data(...)
/* assemble SG list */
for (i = 0; i < scat_req->scat_entries; i++, sg++) {
ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
   i, scat_req->scat_list[i].buf,
   scat_req->scat_list[i].len);

sg_set_buf(sg, scat_req->scat_list[i].buf,
   scat_req->scat_list[i].len);
}

The GCC 4.8.1 compiler will not do the for-loop till scat_entries, instead,
it only run one round loop. This may be caused by that the GCC 4.8.1 thought
that the scat_list only have one item and then no need to do full iteration,
but this is simply wrong by looking at the assebly code. This will cause the
sg buffer not get set when scat_entries > 1 and thus lead to kernel panic.

This patch is a workaround to the GCC 4.8.1 complier issue by passing the
entry address of the scat_req->scat_list to the for-loop and interate it,
then, GCC 4.8.1 will do the full for-loop correctly.
(Note: This issue not observed with GCC 4.7.2, only found on the GCC 4.8.1)

This patch does not change any function logic and no any performance downgrade.

Signed-off-by: Jason Liu <r64343@freescale.com>
10 years agoENGR00287331-3 sdhci-esdhc-imx: do not need disable clock during remove function
Dong Aisheng [Mon, 11 Nov 2013 08:44:19 +0000 (16:44 +0800)]
ENGR00287331-3 sdhci-esdhc-imx: do not need disable clock during remove function

Since the clock is managed by runtime pm currently, we do not need
disable it again during driver remove function, or it will cause
clock disable count mismatch issue since the clocks have already been disabled.

mx6slevk:/sys/bus/platform/drivers/sdhci-esdhc-imx# echo 2194000.usdhc > unbind
mmc1: card aaaa removed
------------[ cut here ]------------
WARNING: at drivers/clk/clk.c:780 clk_disable+0x18/0x24()
....

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00287331-2 sdhci-esdhc-imx: use bus freq in runtime pm
Dong Aisheng [Mon, 11 Nov 2013 06:53:58 +0000 (14:53 +0800)]
ENGR00287331-2 sdhci-esdhc-imx: use bus freq in runtime pm

Request BUS_FREQ_HIGH when bus is busy and then release BUS_FREQ_HIGH
when bus becomes idle.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00287331-1 mmc: add delay after CMD6 befoer sending CMD13 for sandisk
Ryan QIAN [Wed, 16 Jan 2013 02:23:28 +0000 (10:23 +0800)]
ENGR00287331-1 mmc: add delay after CMD6 befoer sending CMD13 for sandisk

- Some sandisk emmc cards need certain delay befor sending cmd13 after cmd6.
Original CR: ENGR174296 (commit: fd031f9)

Acked-by: Aisheng Dong <b29396@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
(cherry picked from commit f942bf1db36355d46f38792601594949f3f2c71b)

10 years agoENGR00286960-2 arm: imx: improve status check of clock gate
Anson Huang [Fri, 8 Nov 2013 19:59:05 +0000 (14:59 -0500)]
ENGR00286960-2 arm: imx: improve status check of clock gate

For ccm clock gate, both 2b'11 and 2b'01 should be treated
as clock enabled, see below description in CCM:

2b'00: clock is off during all modes;
2b'01: clock is on in run mode, but off in wait and stop mode;
2b'10: Not applicable;
2b'11: clock is on during all modes, except stop mode.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00286960-1 arm: imx: initialize clock gate status
Anson Huang [Fri, 8 Nov 2013 19:54:31 +0000 (14:54 -0500)]
ENGR00286960-1 arm: imx: initialize clock gate status

Some clocks gates need to be set to 2b'01 to allow CCM
auto disabling them when system enters WAIT mode, this
setting can save many runtime power. These clock gates
are normally always enabled, so no need to add another
status for clk gate enable function, just set them to
right status when system boot up is good enough.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00286744-3 arm: imx: optimize power number for busfreq
Anson Huang [Thu, 7 Nov 2013 20:38:20 +0000 (15:38 -0500)]
ENGR00286744-3 arm: imx: optimize power number for busfreq

i.MX6DL's axi clock is sourcing from pfd540 by default,
need to switch axi clock from pfd540 to periph when system
enters low bus mode, this is to allow pfd540 to be disabled,
and it also keeps clk tree correct.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00286744-2 arm: dts: imx6dl: add clks for busfreq
Anson Huang [Thu, 7 Nov 2013 19:11:44 +0000 (14:11 -0500)]
ENGR00286744-2 arm: dts: imx6dl: add clks for busfreq

Need to switch axi clock from pfd540 to periph when
system enters low bus mode, so add necessary clks for
bufreq driver.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00286744-1 arm: imx: add necessary interface for pfd
Anson Huang [Thu, 7 Nov 2013 19:06:00 +0000 (14:06 -0500)]
ENGR00286744-1 arm: imx: add necessary interface for pfd

Common clk framework will disable unused clks only if
they are enabled by default, so we need to add is_enabled
callback for clk framework to get clks' status.

pfd clocks are enabled by default, so we need to add this
interface for common clk framework to disable unused pfds.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00287081 [iMX6SL] - Make sure MMDC clocks are enabled at boot
Ranjani Vaidyanathan [Fri, 8 Nov 2013 18:37:10 +0000 (12:37 -0600)]
ENGR00287081 [iMX6SL] - Make sure MMDC clocks are enabled at boot

Need to enable MMDC clocks to maintain the correct usecount, else
PLL2 can get disabled incorrectly thus hanging the system.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
10 years agoENGR00286345 [iMX6DL] Fixed random hang bug in bus freq driver
Ranjani Vaidyanathan [Tue, 5 Nov 2013 20:44:20 +0000 (14:44 -0600)]
ENGR00286345 [iMX6DL] Fixed random hang bug in bus freq driver

Incorrect clock disable of PLL2 caused random hangs during
DDR freq change in iMX6DL.
Remove PERCLK freq change code as this is not required for TO1.1
and later.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
10 years agommc: sdhci: fix ctrl_2 on super-speed selection
Giuseppe CAVALLARO [Thu, 13 Jun 2013 14:41:28 +0000 (16:41 +0200)]
mmc: sdhci: fix ctrl_2 on super-speed selection

This patch fixes the HC ctrl_2 programming where, in case of
SDR104 and HS200, we have to write 100b in the the UHS Mode
bits. We wrote 101b that is reserved from Arasan Specs.

Reported-by: Youssef Triki <youssef.triki@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 599115686d8f62999a871f7d7ee87de3b939b258)

10 years agommc: sdhci: fix caps2 for HS200
Giuseppe CAVALLARO [Wed, 12 Jun 2013 06:16:38 +0000 (08:16 +0200)]
mmc: sdhci: fix caps2 for HS200

Although the HC supports HS200 (eMMC) the caps2 are always zero; this
means there's no way to use the super speed mode (when init the card).

If the HC support SDR104, for SD3.0, so it also supports HS200 for eMMC
and this patch just sets the MMC_CAP2_HS200 in the host caps2 field.

Reported-by: Youssef Triki <youssef.triki@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Reviewed-by: Philip Rakity <prakity@nvidia.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 156e14b126ffb6f040bc6f1aff3c51077e42a744)

10 years agommc: sdhci: add ability to stay runtime-resumed if the card is powered up
Adrian Hunter [Mon, 6 May 2013 09:17:32 +0000 (12:17 +0300)]
mmc: sdhci: add ability to stay runtime-resumed if the card is powered up

If card power is dependent on SD bus power then the host controller
must not be runtime suspended while the card is powered up.  Add
the ability to stay runtime-resumed in that case and enable it with a new
quirk SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit f0710a557cb17746b09234f01073a2cdafe4f4a5)

10 years agoENGR00286971-4 Revert "ENGR00278504-1 mmc: sdhci: add quirk for broken acmd23"
Dong Aisheng [Fri, 8 Nov 2013 10:50:07 +0000 (18:50 +0800)]
ENGR00286971-4 Revert "ENGR00278504-1 mmc: sdhci: add quirk for broken acmd23"

The ACMD23 unwork issue is fixed now. so the former quirk to disable
ACMD23 can be removed.

This reverts commit fd27fce042bfd289eab6dbb7c98ab3adb48ca25b.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286971-3 Revert "ENGR00278504-2 sdhci-esdhc-imx: add broken auto cmd23"
Dong Aisheng [Fri, 8 Nov 2013 10:49:41 +0000 (18:49 +0800)]
ENGR00286971-3 Revert "ENGR00278504-2 sdhci-esdhc-imx: add broken auto cmd23"

This reverts commit 7b725c102e1ddfbaca5856af7c286bfd626363ea.

Conflicts:

drivers/mmc/host/sdhci-esdhc-imx.c

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286971-2 dts: imx6-sabreauto: disabled flexcan when max7310 is gone
Dong Aisheng [Fri, 8 Nov 2013 07:51:10 +0000 (15:51 +0800)]
ENGR00286971-2 dts: imx6-sabreauto: disabled flexcan when max7310 is gone

Flexcan transceiver is using GPIOs from max7310 on i2c3.
Since max7310 is gone on below dts files, so there's no reason
to keep flexcan alive in those dts files.

Note: since flexcan1 is disabled by default, so did not need
to add it.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286971-1 imx6q: add sanity check for getting gpio for flexcan
Dong Aisheng [Fri, 8 Nov 2013 07:48:23 +0000 (15:48 +0800)]
ENGR00286971-1 imx6q: add sanity check for getting gpio for flexcan

This is used to avoid a warning:
WARNING: at /home/b29397/work/projects/linux-2.6-imx/drivers/gpio/gpiolib.c:126
gpio_to_desc+0x30/0x44()
invalid GPIO -517
Modules linked in:
....
gpiod_request: invalid GPIO

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286926 usb: chipidea: imx: add release_bus_freq at failure path
Peter Chen [Fri, 8 Nov 2013 02:14:18 +0000 (10:14 +0800)]
ENGR00286926 usb: chipidea: imx: add release_bus_freq at failure path

If not, the request{release}_bus_freq will be mismatch if
fail occurs.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agommc: sdhci: Avoid needless loop while handling SDIO interrupts in sdhci_irq()
Alexey Neyman [Wed, 6 Nov 2013 03:40:36 +0000 (19:40 -0800)]
mmc: sdhci: Avoid needless loop while handling SDIO interrupts in sdhci_irq()

Ignore Card Interrupt bit in the interrupt status if we already know that
mmc_signal_sdio_irq() is going to be called at the end of sdhci_irq(). This
avoids a needless loop in sdhci_irq() repeatedly reading interrupt status
and doing nothing.

Signed-off-by: Alexey Neyman <stilor@att.net>
Acked-by: Dong Aisheng <b29396@freescale.com>
10 years agommc: sdhci-esdhc-imx: add runtime pm support
Dong Aisheng [Wed, 30 Oct 2013 13:13:26 +0000 (21:13 +0800)]
mmc: sdhci-esdhc-imx: add runtime pm support

The root clock will be disabled in runtime pm which can be used to save power.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
10 years agommc: sdhci-esdhc-imx: fix runtime pm unblance issue
Dong Aisheng [Thu, 7 Nov 2013 07:12:48 +0000 (15:12 +0800)]
mmc: sdhci-esdhc-imx: fix runtime pm unblance issue

Since we're using common esdhc_send_command for tuning commands and
the core code will call pm_runtime_put after command is finished.
So we add a pm_runtime_get_sync here to get the blance.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
10 years agommc: sdhci-esdhc-imx: clear SDHCI_CTRL_EXEC_TUNING should not affect other bits
Dong Aisheng [Wed, 30 Oct 2013 10:48:52 +0000 (18:48 +0800)]
mmc: sdhci-esdhc-imx: clear SDHCI_CTRL_EXEC_TUNING should not affect other bits

Current code will clear all turning related bits like ESDHC_STD_TUNING_EN
and ESDHC_MIX_CTRL_FBCLK_SEL when clear SDHCI_CTRL_EXEC_TUNING.
This may cause the card which has already passed the turning to become
unwork since the turning status lost.
We observed this failure when enable runtime pm.

BTW, imx needs to enable ESDHC_MIX_CTRL_FBCLK_SEL bit for turned clock.
The FBCLK_SEL will be cleared when SDHCI_CTRL_TUNED_CLK is cleared
and SDHCI_CTRL_EXEC_TUNING is not set.
This is used in case we change to another normal card from a UHS card
in the same slot. FBCLK_SEL is not needed for normal card.

After that, SDHCI_CTRL_EXEC_TUNING will only affect ESDHC_MIX_CTRL_EXE_TUNE.
Clearing it does not affect the turned card to remain working on UHS mode.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
10 years agommc: sdhci-esdhc-imx: tuning bits should not be cleared during reset
Dong Aisheng [Wed, 30 Oct 2013 08:54:09 +0000 (16:54 +0800)]
mmc: sdhci-esdhc-imx: tuning bits should not be cleared during reset

We should not clear tuning bits during reset or the SD3.0/eMMC4.5 card
working on UHS mode may not work after reset since the former tuning
settings was lost.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
10 years agommc: sdhci-pltfm: export pltfm suspend/resume api
Dong Aisheng [Thu, 7 Nov 2013 07:11:00 +0000 (15:11 +0800)]
mmc: sdhci-pltfm: export pltfm suspend/resume api

It is helpful for platforms code to use to elimiate duplicated code.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
10 years agommc: sdhci-esdhc-imx: add eMMC HS200 mode support
Dong Aisheng [Mon, 21 Oct 2013 13:38:30 +0000 (21:38 +0800)]
mmc: sdhci-esdhc-imx: add eMMC HS200 mode support

Add support for eMMC 4.5 cards to work on hs200 mode.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
10 years agommc: core: mmc DDR mode should not depend on UHS_DDR50
Dong Aisheng [Wed, 16 Oct 2013 08:48:39 +0000 (16:48 +0800)]
mmc: core: mmc DDR mode should not depend on UHS_DDR50

The MMC_CAP_UHS_DDR50 must work on 1.8v.
However, the eMMC DDR mode can work on either 1.8v or 3.3v and
should not depend on UHS_DDR50.
So get rid of this limitation to let controller without 1.8v
signal voltage support can also work for eMMC DDR mode if it claims.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
10 years agommc: sdhci-esdhc-imx: add MMC_CAP_1_8V_DDR for mx6
Dong Aisheng [Thu, 7 Nov 2013 07:08:34 +0000 (15:08 +0800)]
mmc: sdhci-esdhc-imx: add MMC_CAP_1_8V_DDR for mx6

The i.MX6 supports 1.8v/3.3v eMMC DDR mode, so add this flag.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
10 years agommc: sdhci-esdhc-imx: fix cpas over write issue
Dong Aisheng [Thu, 17 Oct 2013 06:29:32 +0000 (14:29 +0800)]
mmc: sdhci-esdhc-imx: fix cpas over write issue

We should use '|=' instead '=', or it may over write
the original caps assigned before this line.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
10 years agommc: sdhci-esdhc-imx: add SDHCI_TRANSFER_MODE read function
Dong Aisheng [Fri, 18 Oct 2013 11:38:25 +0000 (19:38 +0800)]
mmc: sdhci-esdhc-imx: add SDHCI_TRANSFER_MODE read function

Used to read out the correct value of SDHCI_TRANSFER_MODE register
for upper layer.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
10 years agommc: sdhci: clear auto cmd setting bits for no data cmds
Dong Aisheng [Fri, 18 Oct 2013 11:36:50 +0000 (19:36 +0800)]
mmc: sdhci: clear auto cmd setting bits for no data cmds

The auto cmd settings bits should be cleared before sending new commands
or we may receive command timeout error for normal commands due to wrongly
pre-sent auto cmd.

e.g. we receive CMD13 timeout error due to ACMD23 is wrongly enabled
by former data commands.

mmc2: new high speed DDR MMC card at address 0001
mmcblk1: mmc2:0001 SEM08G 7.39 GiB
mmcblk1boot0: mmc2:0001 SEM08G partition 1 2.00 MiB
mmcblk1boot1: mmc2:0001 SEM08G partition 2 2.00 MiB
mmcblk1rpmb: mmc2:0001 SEM08G partition 3 128 KiB
 mmcblk1: p1 p2 p3 p4 < p5 p6 p7 >
mmc2: Timeout waiting for hardware interrupt.
 mmcblk1boot1: unknown partition table
mmc2: Timeout waiting for hardware interrupt.
 mmcblk1boot0: unknown partition table

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
10 years agoENGR00286724-11 imx_v7_defconfig: add flexcan support
Dong Aisheng [Thu, 7 Nov 2013 08:10:06 +0000 (16:10 +0800)]
ENGR00286724-11 imx_v7_defconfig: add flexcan support

Add flexcan support.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-10 dts: sabreauto: add new dts for flexcan1 support
Dong Aisheng [Wed, 6 Nov 2013 11:37:38 +0000 (19:37 +0800)]
ENGR00286724-10 dts: sabreauto: add new dts for flexcan1 support

The flexcan1 is pin conflict with fec. So we add a new dts file with
flexcan1 enabled with fec disabled for user to use.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-9 dts: imx6qdl: add properties for flexcan to support wakeup
Dong Aisheng [Wed, 6 Nov 2013 11:14:08 +0000 (19:14 +0800)]
ENGR00286724-9 dts: imx6qdl: add properties for flexcan to support wakeup

According to binding doc, add missed properties for remote wakeup
support.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-8 can: flexcan: add self wakeup support
Dong Aisheng [Wed, 6 Nov 2013 11:10:28 +0000 (19:10 +0800)]
ENGR00286724-8 can: flexcan: add self wakeup support

If wakeup is enabled, enter stop mode, else enter disabled mode.
Self wake can only work on stop mode.
For imx6q, the stop request has to be mannually assert on
IOMUX GPR13[28:29] register, we use syscon to control that bit.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-7 ARM: dts: sabreauto: add flexcan support
Dong Aisheng [Wed, 6 Nov 2013 02:50:09 +0000 (10:50 +0800)]
ENGR00286724-7 ARM: dts: sabreauto: add flexcan support

The flexcan1 is disabled by default since it's conflict with fec.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-6 ARM: imx6q: use auxdata to pass flexcan_switch function hook
Dong Aisheng [Wed, 6 Nov 2013 02:46:35 +0000 (10:46 +0800)]
ENGR00286724-6 ARM: imx6q: use auxdata to pass flexcan_switch function hook

Before we have a common can tranceiver binding to handle gpios
operations, we use auxdata to pass flexcan_switch function first.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-5 can: flexcan: add tranceiver gpios binding
Dong Aisheng [Mon, 10 Dec 2012 12:14:01 +0000 (20:14 +0800)]
ENGR00286724-5 can: flexcan: add tranceiver gpios binding

Add gpios for tranceiver control.

Before we have a common tranceiver binding, we use this way first.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-4 ARM: dts: imx6q: complement of can properties
Dong Aisheng [Mon, 4 Nov 2013 09:33:07 +0000 (17:33 +0800)]
ENGR00286724-4 ARM: dts: imx6q: complement of can properties

Add missed properties.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-3 ARM: dts: imx6q: change to generic name for flexcan
Dong Aisheng [Mon, 4 Nov 2013 09:22:43 +0000 (17:22 +0800)]
ENGR00286724-3 ARM: dts: imx6q: change to generic name for flexcan

As following the device tree naming rule, we change the device node
name to a more generic one and use phandle name specificly.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-2 ARM: clk-imx6q: fix the wrong parent of can_root clock
Dong Aisheng [Mon, 10 Dec 2012 02:36:27 +0000 (10:36 +0800)]
ENGR00286724-2 ARM: clk-imx6q: fix the wrong parent of can_root clock

From the clock tree defined in i.MX6Q Reference Mannual, the parent of can_root
clock should be pll3_60m.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00286724-1 net: flexcan: using per clock for clock rate calculation
Dong Aisheng [Mon, 10 Dec 2012 02:32:56 +0000 (10:32 +0800)]
ENGR00286724-1 net: flexcan: using per clock for clock rate calculation

The per clock is used for the output clock.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agomtd: nand: use a local variable to simplify the nand_scan_tail
Huang Shijie [Fri, 18 Oct 2013 06:20:53 +0000 (14:20 +0800)]
mtd: nand: use a local variable to simplify the nand_scan_tail

There are too many "chip->ecc" in the nand_scan_tail() which makes the eyes
sore.

This patch uses a local variable "ecc" to replace the "chip->ecc" to
make the code more graceful.

Do the code change with "s/chip->ecc\./ecc->/g" in the nand_scan_tail,
and also change some lines by hand.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: Use devm_kzalloc()
Fabio Estevam [Tue, 5 Nov 2013 02:07:05 +0000 (00:07 -0200)]
mtd: gpmi: Use devm_kzalloc()

Using devm_kzalloc() can make the code simpler.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agoASoC: generic-dmaengine-pcm: Use SNDRV_DMA_TYPE_DEV_IRAM as default
Nicolin Chen [Thu, 7 Nov 2013 06:45:16 +0000 (14:45 +0800)]
ASoC: generic-dmaengine-pcm: Use SNDRV_DMA_TYPE_DEV_IRAM as default

When allocating memory space for DMA buffer, use on-chip internal SRAM
as default choice to save power. Since the core would allocate memory
from traditional external memory if iram allocation failed, we don't
need to worry about any side effect.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
(cherry picked from commit ca2b029515b4a81bbedcffc69a5d9574bb5ba475)

10 years agoENGR00286459 usb: chipidea: imx: add request{release}_bus_freq
Peter Chen [Wed, 6 Nov 2013 08:38:18 +0000 (16:38 +0800)]
ENGR00286459 usb: chipidea: imx: add request{release}_bus_freq

When the usb in idle, it calls release_bus_req.
When the usb is going to use, it calls request_bus_req.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286273-3 arm: dtsi: imx6sl: add iram property to support internal SRAM
Nicolin Chen [Tue, 5 Nov 2013 11:46:51 +0000 (19:46 +0800)]
ENGR00286273-3 arm: dtsi: imx6sl: add iram property to support internal SRAM

By doing this, we can allow SDMA driver to allocate its memory from iram
when using i.MX6 SoloLite SoC.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00286273-2 misc: sram: Set default alignment to 4Kbytes
Nicolin Chen [Tue, 5 Nov 2013 11:23:58 +0000 (19:23 +0800)]
ENGR00286273-2 misc: sram: Set default alignment to 4Kbytes

As Kernel 3.0.35 does, we set the default iram alignment to 4Kbytes,
although it would waste few memory space.

We here try to do this as an expediency because currently we couldn't
find a perfect solution for 4Kbytes alignment requirement from SDMA.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00286273-1 dma: imx-sdma: allocate memory from iram
Nicolin Chen [Tue, 5 Nov 2013 11:19:07 +0000 (19:19 +0800)]
ENGR00286273-1 dma: imx-sdma: allocate memory from iram

We try to allocate memory from SoC internal SRAM so that we can turn off
voltage of external DDR to save power. Surely, if we failed to get the
iram DT node or allocate memory due to no enough SRAM space, we would
allow SDMA driver to allocate memory in a traditional way.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00286462 mx6sl fb: fix runtime pm not work at probe time
Robby Cai [Wed, 6 Nov 2013 08:21:08 +0000 (16:21 +0800)]
ENGR00286462 mx6sl fb: fix runtime pm not work at probe time

For mxsfb, the lcdif controller is enabled (with clock enabled as well)
at probe time, but pm_runtime_enable() is called after its enablement,
thus runtime pm function only works at next enablement. The root cause
is that pm_runtime_get_sync() function need to be called after
pm_runtime_enable(). This patch fixes the problem by moving the
position of pm_runtime_enable() ahead.

For epdc fb, runtime pm may not work at probe time if DEFAULT_PANEL_HW_INIT
is turned on (off by default). Fix it for safety.

Signed-off-by: Robby Cai <R63905@freescale.com>
10 years agoENGR00286426-22 usb: chipidea: imx: Enable CI_HDRC_IMX_EHCI_QUIRK
Peter Chen [Fri, 11 Oct 2013 03:04:16 +0000 (11:04 +0800)]
ENGR00286426-22 usb: chipidea: imx: Enable CI_HDRC_IMX_EHCI_QUIRK

Enable CI_HDRC_IMX_EHCI_QUIRK for controllers who use mxs-phy.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-21 usb: chipidea: host: add ehci quirk for imx controller
Peter Chen [Sun, 29 Sep 2013 02:52:43 +0000 (10:52 +0800)]
ENGR00286426-21 usb: chipidea: host: add ehci quirk for imx controller

When the port goes to suspend or finishes resme, it needs to
notify PHY, it is not a standard EHCI operation, so we add a
quirk for it.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-20 usb: chipidea: host: add quirk for ehci operation
Peter Chen [Sun, 29 Sep 2013 03:07:23 +0000 (11:07 +0800)]
ENGR00286426-20 usb: chipidea: host: add quirk for ehci operation

For chipidea controller, it does not follow ehci spec strictly.
Taking resume signal as an example, it will stop resume signal about
20-21ms later automatically, but standard ehci spec says, the resume
signal is controlled by software (clear portsc.PORT_RESUME).

This operation causes some remote wakeup problems for high speed
devices due to host controller does not send SOF in time since
software can't guarantee set run/stop bit in time (run/stop bit
was cleared at the ehci suspend routine).

When software sets run/stop bit, it needs 1 SoF time to make it effect.
If we close the PHY clock just after setting run/stop bit, it does
not be set in practice, so a software delay is needed.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-19 usb: chipidea: imx: Enable runtime pm support for imx6
Peter Chen [Mon, 21 Oct 2013 08:50:35 +0000 (16:50 +0800)]
ENGR00286426-19 usb: chipidea: imx: Enable runtime pm support for imx6

Currently, only imx6 SoC series add wakeup logic, so only enable
runtime pm for imx6.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-18 usb: chipidea: imx: call set_wakeup when necessary
Peter Chen [Fri, 27 Sep 2013 09:10:58 +0000 (17:10 +0800)]
ENGR00286426-18 usb: chipidea: imx: call set_wakeup when necessary

- Disable wakeup after probe
- Enable wakeup during the suspend
- Disable wakeup after controller is active

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-17 usb: chipidea: usbmisc_imx: add set_wakup API
Peter Chen [Fri, 27 Sep 2013 08:40:33 +0000 (16:40 +0800)]
ENGR00286426-17 usb: chipidea: usbmisc_imx: add set_wakup API

It is used to enable USB wakeup, currently only imx6 SoC series
usb's wakeup is enabled.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-16 usb: chipidea: usbmisc_imx: remove the controller's clock info
Peter Chen [Tue, 22 Oct 2013 06:17:10 +0000 (14:17 +0800)]
ENGR00286426-16 usb: chipidea: usbmisc_imx: remove the controller's clock info

Currently, the usbmisc is just an API supplier for controller
driver, the controller calls related APIs to handle different
things among the SoCs, before calling it, the clock must
be on. So the clock operation is useless for usbmisc, it also
increases the difficulties to manage the clock, especially at
runtime power management situation.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-15 usb: chipidea: add wakeup interrupt handler
Peter Chen [Tue, 22 Oct 2013 06:15:50 +0000 (14:15 +0800)]
ENGR00286426-15 usb: chipidea: add wakeup interrupt handler

When the controller is at suspend mode, it can be waken up by
external events (like vbus, dp/dm or id change). Once we receive
the wakeup interrupt, we need to resume the controller first, eg
open clocks, disable some wakeup settings, etc. After that, the
controller can receive the normal USB interrupts.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-14 usb: chipidea: imx: add power management support
Peter Chen [Fri, 27 Sep 2013 06:03:30 +0000 (14:03 +0800)]
ENGR00286426-14 usb: chipidea: imx: add power management support

Add system and runtime power management support for imx gluy layer.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-13 usb: chipidea: Add power management support
Peter Chen [Thu, 26 Sep 2013 07:45:23 +0000 (15:45 +0800)]
ENGR00286426-13 usb: chipidea: Add power management support

This commit adds runtime and system power management support for
chipidea core. The runtime pm support is controlled by glue
layer, it can be enabled by flag CI_HDRC_SUPPORTS_RUNTIME_PM.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-12 usb: phy-mxs: Add system suspend/resume API
Peter Chen [Thu, 26 Sep 2013 13:10:53 +0000 (21:10 +0800)]
ENGR00286426-12 usb: phy-mxs: Add system suspend/resume API

We need this to keep PHY's power on or off during the system
suspend mode. If we need to enable USB wakeup, then we
must keep PHY's power being on during the system suspend mode.
Otherwise, we need to keep PHY's power being off to save power.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-11 usb: phy-mxs: Add implementation of set_wakeup
Peter Chen [Mon, 16 Sep 2013 05:52:16 +0000 (13:52 +0800)]
ENGR00286426-11 usb: phy-mxs: Add implementation of set_wakeup

When we need the PHY can be waken up by external signals,
we can call this API. Besides, we call mxs_phy_disconnect_line
at this API to close the connection between USB PHY and
controller, after that, the line state from controller is SE0.
Once the PHY is out of power, without calling mxs_phy_disconnect_line,
there are unknown wakeups due to dp/dm floating at device mode.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-10 usb: phy: Add set_wakeup API
Peter Chen [Wed, 18 Sep 2013 06:19:28 +0000 (14:19 +0800)]
ENGR00286426-10 usb: phy: Add set_wakeup API

This API is used to set wakeup enable at PHY registers, in that
case, the PHY can be waken up from suspend due to external events,
like vbus change, dp/dm change and id change.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-9 usb: phy-mxs: Enable IC fixes for related SoCs
Peter Chen [Fri, 11 Oct 2013 05:51:48 +0000 (13:51 +0800)]
ENGR00286426-9 usb: phy-mxs: Enable IC fixes for related SoCs

Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-8 usb: phy-mxs: Add implementation of nofity_suspend{resume}
Peter Chen [Wed, 18 Sep 2013 05:57:59 +0000 (13:57 +0800)]
ENGR00286426-8 usb: phy-mxs: Add implementation of nofity_suspend{resume}

Implementation of notify_suspend and notify_resume will be different
according to mxs_phy_data->flags.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-7 usb: phy: add notify suspend and resume callback
Peter Chen [Mon, 16 Sep 2013 08:31:24 +0000 (16:31 +0800)]
ENGR00286426-7 usb: phy: add notify suspend and resume callback

They are used to notify PHY that the controller enters suspend
or finishes resume.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-6 usb: phy-mxs: Add anatop regmap
Peter Chen [Mon, 16 Sep 2013 04:57:27 +0000 (12:57 +0800)]
ENGR00286426-6 usb: phy-mxs: Add anatop regmap

It is needed by imx6 SoC series, but not for imx23 and imx28.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-5 ARM: dts: imx6: add anatop phandle for usbphy
Peter Chen [Mon, 16 Sep 2013 04:09:21 +0000 (12:09 +0800)]
ENGR00286426-5 ARM: dts: imx6: add anatop phandle for usbphy

Add anatop phandle for usbphy

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-4 usb: doc: phy-mxs: update binding for adding anatop phandle
Peter Chen [Fri, 11 Oct 2013 03:11:05 +0000 (11:11 +0800)]
ENGR00286426-4 usb: doc: phy-mxs: update binding for adding anatop phandle

Add anatop phandle which is used to access anatop registers to
control PHY's power and other USB operations.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-3 usb: phy-mxs: Add auto clock and power setting
Peter Chen [Wed, 4 Sep 2013 06:14:47 +0000 (14:14 +0800)]
ENGR00286426-3 usb: phy-mxs: Add auto clock and power setting

With the auto setting, the PHY's clock and power can be
recovered correctly from low power mode, it is ganranteed by IC logic.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-2 usb: phy-mxs: Add platform judgement code
Peter Chen [Mon, 9 Sep 2013 03:25:46 +0000 (11:25 +0800)]
ENGR00286426-2 usb: phy-mxs: Add platform judgement code

The mxs-phy has several bugs and features at different
versions, the driver code can get it through of_device_id.data.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286426-1 usb: doc: phy-mxs: Add more compatible strings
Peter Chen [Tue, 5 Nov 2013 06:56:24 +0000 (14:56 +0800)]
ENGR00286426-1 usb: doc: phy-mxs: Add more compatible strings

Add "fsl,imx6q-usbphy" for imx6dq and imx6dl, add
"fsl,imx6sl-usbphy" for imx6sl.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoUSB: EHCI: export ehci_handshake for ehci-hcd sub-drivers
Manjunath Goudar [Thu, 13 Jun 2013 17:24:09 +0000 (11:24 -0600)]
USB: EHCI: export ehci_handshake for ehci-hcd sub-drivers

In order to split ehci-hcd.c into separate modules, handshake() must be
exported. Rename the symbol to add an ehci_ prefix, to avoid any naming
clashes.

Signed-off-by: Manjunath Goudar <manjunath.goudar@linaro.org>
[swarren, split Manjunath's patches more logically, limit this change
to export just handshake()]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agoARM: 7851/1: check for number of arguments in syscall_get/set_arguments()
AKASHI Takahiro [Wed, 9 Oct 2013 14:58:29 +0000 (15:58 +0100)]
ARM: 7851/1: check for number of arguments in syscall_get/set_arguments()

commit 3c1532df5c1b54b5f6246cdef94eeb73a39fe43a upstream.

In ftrace_syscall_enter(),
    syscall_get_arguments(..., 0, n, ...)
        if (i == 0) { <handle ORIG_r0> ...; n--;}
        memcpy(..., n * sizeof(args[0]));
If 'number of arguments(n)' is zero and 'argument index(i)' is also zero in
syscall_get_arguments(), none of arguments should be copied by memcpy().
Otherwise 'n--' can be a big positive number and unexpected amount of data
will be copied. Tracing system calls which take no argument, say sync(void),
may hit this case and eventually make the system corrupted.
This patch fixes the issue both in syscall_get_arguments() and
syscall_set_arguments().

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 4a402463a7a4a4243c9c66600fd01ae800f959e3)

10 years agoENGR00286416 net:fec: Pinctrl PM: add net device running status check
Fugang Duan [Wed, 6 Nov 2013 05:36:23 +0000 (13:36 +0800)]
ENGR00286416 net:fec: Pinctrl PM: add net device running status check

In below case:
ifconfig eth0 down
echo mem > /sys/power/state

After resume, fec pin status set to default, which is not expected
and cost unnecessary power. So, add net device running status check
before calling Pinctrl PM APIs.

Signed-off-by: Fugang Duan <B38611@freescale.com>
10 years agoENGR00286181 ARM: i.MX6: add more chip revision support
Jason Liu [Tue, 5 Nov 2013 04:03:18 +0000 (12:03 +0800)]
ENGR00286181 ARM: i.MX6: add more chip revision support

With the new tap-out of i.MX6DQ(TO1.5) and i.MX6DL/SOLO(TO1.2), we need add
more chip revision support in order to report the chip revision correctly.

Signed-off-by: Jason Liu <r64343@freescale.com>
10 years agoENGR00286418 usb: chipidea: host: fix below build error
Peter Chen [Wed, 6 Nov 2013 05:50:52 +0000 (13:50 +0800)]
ENGR00286418 usb: chipidea: host: fix below build error

/drivers/usb/chipidea/host.c: In function 'host_start':
/drivers/usb/chipidea/host.c:67:6: error: 'struct ehci_hcd'
has no member named 'has_tdi_phy_lpm'

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agousb: phy: phy-mxs-usb: Check the return value from stmp_reset_block()
Fabio Estevam [Wed, 3 Jul 2013 19:34:13 +0000 (16:34 -0300)]
usb: phy: phy-mxs-usb: Check the return value from stmp_reset_block()

stmp_reset_block() may fail, so let's check its return value and propagate it
in the case of error.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
10 years agoENGR00286159-3 Revert "ENGR00278097-1"
Peter Chen [Tue, 5 Nov 2013 07:16:53 +0000 (15:16 +0800)]
ENGR00286159-3 Revert "ENGR00278097-1"

This reverts commit 5748c4f997399584691559332997cfc5177ad232.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
10 years agousb: hcd: move controller wakeup setting initialization to individual driver
Peter Chen [Tue, 5 Nov 2013 06:45:38 +0000 (14:45 +0800)]
usb: hcd: move controller wakeup setting initialization to individual driver

Individual controller driver has different requirement for wakeup
setting, so move it from core to itself. In order to align with
current etting the default wakeup setting is enabled (except for
chipidea host). Since too many differences between upstream with
our internal tree, I only pick the hcd change.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286159-2 usb: chipidea: imx: set CI_HDRC_IMX28_WRITE_FIX for imx28
Peter Chen [Wed, 23 Oct 2013 07:51:30 +0000 (15:51 +0800)]
ENGR00286159-2 usb: chipidea: imx: set CI_HDRC_IMX28_WRITE_FIX for imx28

Due to imx28 needs ARM swp instruction for writing, we set
CI_HDRC_IMX28_WRITE_FIX for imx28.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00286159-1 usb: chipidea: add freescale imx28 special write register method
Peter Chen [Wed, 23 Oct 2013 07:47:49 +0000 (15:47 +0800)]
ENGR00286159-1 usb: chipidea: add freescale imx28 special write register method

According to Freescale imx28 Errata, "ENGR119653 USB: ARM to USB
register error issue", All USB register write operations must
use the ARM SWP instruction. So, we implement special hw_write
and hw_test_and_clear for imx28.

Discussion for it at below:
http://marc.info/?l=linux-usb&m=137996395529294&w=2

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agousb: ehci: add freescale imx28 special write register method
Peter Chen [Wed, 23 Oct 2013 07:41:08 +0000 (15:41 +0800)]
usb: ehci: add freescale imx28 special write register method

According to Freescale imx28 Errata, "ENGR119653 USB: ARM to USB
register error issue", All USB register write operations must
use the ARM SWP instruction. So, we implement a special ehci_write
for imx28.

Discussion for it at below:
http://marc.info/?l=linux-usb&m=137996395529294&w=2

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
10 years agousb: chipidea: only get vbus regulator for non-peripheral mode
Peter Chen [Wed, 30 Oct 2013 01:19:29 +0000 (09:19 +0800)]
usb: chipidea: only get vbus regulator for non-peripheral mode

If the user chooses peripheral mode for this controller, the vbus
regulator doesn't need to get, since the host will supply the vbus,
it can save one vbus pin for other usage.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Tested-by: Frank Li <frank.li@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agousb: chipidea: host: more enhancement when ci->hcd is NULL
Peter Chen [Tue, 22 Oct 2013 03:13:41 +0000 (11:13 +0800)]
usb: chipidea: host: more enhancement when ci->hcd is NULL

Like http://marc.info/?l=linux-usb&m=138200449428874&w=2 said:
two more things are needed to be done:

- If host_start fails, the host_stop should not be called, so we
add check that ci->hcd is not NULL.
- if the host_start fails at the beginning, we need to consider
regulator mismatch issue.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agoARM: dts: imx6q-arm2: enable USB OTG
Peter Chen [Mon, 28 Oct 2013 06:05:02 +0000 (14:05 +0800)]
ARM: dts: imx6q-arm2: enable USB OTG

Enable USB OTG controller at imx6q-arm2 board

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
10 years agosound/core/memalloc.c: use gen_pool_dma_alloc() to allocate iram buffer
Nicolin Chen [Tue, 5 Nov 2013 06:07:11 +0000 (17:07 +1100)]
sound/core/memalloc.c: use gen_pool_dma_alloc() to allocate iram buffer

Since gen_pool_dma_alloc() is introduced, we implement it to simplify code.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
Acked-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
10 years agoALSA: memalloc: Yet another ifdef CONFIG_GENERIC_ALLOCATOR protection
Takashi Iwai [Mon, 28 Oct 2013 15:08:27 +0000 (16:08 +0100)]
ALSA: memalloc: Yet another ifdef CONFIG_GENERIC_ALLOCATOR protection

I obviously forgot to merge the right version...

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoALSA: Add ifdef CONFIG_GENERIC_ALLOCATOR for SNDRV_DMA_TYPE_IRAM code
Takashi Iwai [Thu, 24 Oct 2013 12:25:32 +0000 (14:25 +0200)]
ALSA: Add ifdef CONFIG_GENERIC_ALLOCATOR for SNDRV_DMA_TYPE_IRAM code

It turned out that we can't use gen_pool_*() functions on archs
without CONFIG_GENERIC_ALLOCATOR (resulting in missing symbols), since
linux/genalloc.h doesn't provide dummy functions for all.  We'd be
able to fix linux/genalloc.h size, but I take an easier path for
now...

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agolib/genalloc: add a helper function for DMA buffer allocation
Nicolin Chen [Tue, 5 Nov 2013 05:56:48 +0000 (16:56 +1100)]
lib/genalloc: add a helper function for DMA buffer allocation

When using pool space for DMA buffer, there might be duplicated calling of
gen_pool_alloc() and gen_pool_virt_to_phys() in each implementation.

Thus it's better to add a simple helper function, a compatible one to the
common dma_alloc_coherent(), to save some code.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
Cc: "Hans J. Koch" <hjk@hansjkoch.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mauro Carvalho Chehab <m.chehab@samsung.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
10 years agousb/chipidea: fix oops on memory allocation failure
Russell King - ARM Linux [Wed, 16 Oct 2013 12:45:15 +0000 (13:45 +0100)]
usb/chipidea: fix oops on memory allocation failure

When CMA fails to initialize in v3.12-rc4, the chipidea driver oopses
the kernel while trying to remove and put the HCD which doesn't exist:

WARNING: CPU: 0 PID: 6 at /home/rmk/git/linux-rmk/arch/arm/mm/dma-mapping.c:511
__dma_alloc+0x200/0x240()
coherent pool not initialised!
Modules linked in:
CPU: 0 PID: 6 Comm: kworker/u2:0 Tainted: G        W    3.12.0-rc4+ #56
Workqueue: deferwq deferred_probe_work_func
Backtrace:
[<c001218c>] (dump_backtrace+0x0/0x10c) from [<c0012328>] (show_stack+0x18/0x1c)
 r6:c05fd9cc r5:000001ff r4:00000000 r3:df86ad00
[<c0012310>] (show_stack+0x0/0x1c) from [<c05f3a4c>] (dump_stack+0x70/0x8c)
[<c05f39dc>] (dump_stack+0x0/0x8c) from [<c00230a8>] (warn_slowpath_common+0x6c/0x8c)
 r4:df883a60 r3:df86ad00
[<c002303c>] (warn_slowpath_common+0x0/0x8c) from [<c002316c>] (warn_slowpath_fmt+0x38/0x40)
 r8:ffffffff r7:00001000 r6:c083b808 r5:00000000 r4:df2efe80
[<c0023134>] (warn_slowpath_fmt+0x0/0x40) from [<c00196bc>] (__dma_alloc+0x200/0x240)
 r3:00000000 r2:c05fda00
[<c00194bc>] (__dma_alloc+0x0/0x240) from [<c001982c>] (arm_dma_alloc+0x88/0xa0)
[<c00197a4>] (arm_dma_alloc+0x0/0xa0) from [<c03e2904>] (ehci_setup+0x1f4/0x438)
[<c03e2710>] (ehci_setup+0x0/0x438) from [<c03cbd60>] (usb_add_hcd+0x18c/0x664)
[<c03cbbd4>] (usb_add_hcd+0x0/0x664) from [<c03e89f4>] (host_start+0xf0/0x180)
[<c03e8904>] (host_start+0x0/0x180) from [<c03e7c34>] (ci_hdrc_probe+0x360/0x670
)
 r6:df2ef410 r5:00000000 r4:df2c3010 r3:c03e8904
[<c03e78d4>] (ci_hdrc_probe+0x0/0x670) from [<c0311044>] (platform_drv_probe+0x20/0x24)
[<c0311024>] (platform_drv_probe+0x0/0x24) from [<c030fcac>] (driver_probe_device+0x9c/0x234)
...
---[ end trace c88ccaf3969e8422 ]---
Unable to handle kernel NULL pointer dereference at virtual address 00000028
pgd = c0004000
[00000028] *pgd=00000000
Internal error: Oops: 17 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 6 Comm: kworker/u2:0 Tainted: G        W    3.12.0-rc4+ #56
Workqueue: deferwq deferred_probe_work_func
task: df86ad00 ti: df882000 task.ti: df882000
PC is at usb_remove_hcd+0x10/0x150
LR is at host_stop+0x1c/0x3c
pc : [<c03cacec>]    lr : [<c03e88e4>]    psr: 60000013
sp : df883b50  ip : df883b78  fp : df883b74
r10: c11f4c54  r9 : c0836450  r8 : df30c400
r7 : fffffff4  r6 : df2ef410  r5 : 00000000  r4 : df2c3010
r3 : 00000000  r2 : 00000000  r1 : df86b0a0  r0 : 00000000
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7d  Table: 2f29404a  DAC: 00000015
Process kworker/u2:0 (pid: 6, stack limit = 0xdf882240)
Stack: (0xdf883b50 to 0xdf884000)
...
Backtrace:
[<c03cacdc>] (usb_remove_hcd+0x0/0x150) from [<c03e88e4>] (host_stop+0x1c/0x3c)
 r6:df2ef410 r5:00000000 r4:df2c3010
[<c03e88c8>] (host_stop+0x0/0x3c) from [<c03e8aa0>] (ci_hdrc_host_destroy+0x1c/0x20)
 r5:00000000 r4:df2c3010
[<c03e8a84>] (ci_hdrc_host_destroy+0x0/0x20) from [<c03e7c80>] (ci_hdrc_probe+0x3ac/0x670)
[<c03e78d4>] (ci_hdrc_probe+0x0/0x670) from [<c0311044>] (platform_drv_probe+0x20/0x24)
[<c0311024>] (platform_drv_probe+0x0/0x24) from [<c030fcac>] (driver_probe_device+0x9c/0x234)
[<c030fc10>] (driver_probe_device+0x0/0x234) from [<c030ff28>] (__device_attach+0x44/0x48)
...
---[ end trace c88ccaf3969e8423 ]---

Fix this so at least we can continue booting and get to a shell prompt.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agousb: chipidea: udc: Fix calling spin_lock_irqsave at sleep context
Peter Chen [Tue, 8 Oct 2013 02:30:17 +0000 (10:30 +0800)]
usb: chipidea: udc: Fix calling spin_lock_irqsave at sleep context

Fixing the below dump:

root@freescale ~$ modprobe g_serial
g_serial gadget: Gadget Serial v2.4
g_serial gadget: g_serial ready
BUG: sleeping function called from invalid context at /home/b29397/work/projects/upstream/usb/usb/drivers/base/power/runtime.c:952
in_atomic(): 1, irqs_disabled(): 128, pid: 805, name: modprobe
2 locks held by modprobe/805:
 #0:  (udc_lock){+.+.+.}, at: [<7f000a74>] usb_gadget_probe_driver+0x44/0xb4 [udc_core]
 #1:  (&(&ci->lock)->rlock){......}, at: [<7f033488>] ci_udc_start+0x94/0x110 [ci_hdrc]
irq event stamp: 3878
hardirqs last  enabled at (3877): [<806b6720>] _raw_spin_unlock_irqrestore+0x40/0x6c
hardirqs last disabled at (3878): [<806b6474>] _raw_spin_lock_irqsave+0x2c/0xa8
softirqs last  enabled at (3872): [<8002ec0c>] __do_softirq+0x1c8/0x2e8
softirqs last disabled at (3857): [<8002f180>] irq_exit+0xbc/0x110
CPU: 0 PID: 805 Comm: modprobe Not tainted 3.11.0-next-20130910+ #85
[<80016b94>] (unwind_backtrace+0x0/0xf8) from [<80012e0c>] (show_stack+0x20/0x24)
[<80012e0c>] (show_stack+0x20/0x24) from [<806af554>] (dump_stack+0x9c/0xc4)
[<806af554>] (dump_stack+0x9c/0xc4) from [<8005940c>] (__might_sleep+0xf4/0x134)
[<8005940c>] (__might_sleep+0xf4/0x134) from [<803a04a4>] (__pm_runtime_resume+0x94/0xa0)
[<803a04a4>] (__pm_runtime_resume+0x94/0xa0) from [<7f0334a4>] (ci_udc_start+0xb0/0x110 [ci_hdrc])
[<7f0334a4>] (ci_udc_start+0xb0/0x110 [ci_hdrc]) from [<7f0009b4>] (udc_bind_to_driver+0x5c/0xd8 [udc_core])
[<7f0009b4>] (udc_bind_to_driver+0x5c/0xd8 [udc_core]) from [<7f000ab0>] (usb_gadget_probe_driver+0x80/0xb4 [udc_core])
[<7f000ab0>] (usb_gadget_probe_driver+0x80/0xb4 [udc_core]) from [<7f008618>] (usb_composite_probe+0xac/0xd8 [libcomposite])
[<7f008618>] (usb_composite_probe+0xac/0xd8 [libcomposite]) from [<7f04b168>] (init+0x8c/0xb4 [g_serial])
[<7f04b168>] (init+0x8c/0xb4 [g_serial]) from [<800088e8>] (do_one_initcall+0x108/0x16c)
[<800088e8>] (do_one_initcall+0x108/0x16c) from [<8008e518>] (load_module+0x1b00/0x20a4)
[<8008e518>] (load_module+0x1b00/0x20a4) from [<8008eba8>] (SyS_init_module+0xec/0x100)
[<8008eba8>] (SyS_init_module+0xec/0x100) from [<8000ec40>] (ret_fast_syscall+0x0/0x48)

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agousb: chipidea: udc: Fix spinlock recursion during bus reset
Peter Chen [Wed, 9 Oct 2013 06:39:52 +0000 (14:39 +0800)]
usb: chipidea: udc: Fix spinlock recursion during bus reset

After configuration, the host also possible sends bus reset
at any time, at such situation, it will trigger below spinlock
recursion dump. This commit unlocks the spinlock before calling
gadget's disconnect.

BUG: spinlock recursion on CPU#0, swapper/0/0
 lock: 0xbf128014, .magic: dead4ead, .owner: swapper/0/0, .owner_cpu: 0
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.11.0-next-20130910+ #106
[<80014e20>] (unwind_backtrace+0x0/0xec) from [<80011a6c>] (show_stack+0x10/0x14)
[<80011a6c>] (show_stack+0x10/0x14) from [<805c143c>] (dump_stack+0x94/0xbc)
[<805c143c>] (dump_stack+0x94/0xbc) from [<80282cf8>] (do_raw_spin_lock+0x16c/0x18c)
[<80282cf8>] (do_raw_spin_lock+0x16c/0x18c) from [<805c77e0>] (_raw_spin_lock_irqsave+0x50/0x5c)
[<805c77e0>] (_raw_spin_lock_irqsave+0x50/0x5c) from [<803cff88>] (ep_disable+0x24/0x110)
[<803cff88>] (ep_disable+0x24/0x110) from [<7f015d50>] (gserial_disconnect+0xa0/0x15c [u_serial])
[<7f015d50>] (gserial_disconnect+0xa0/0x15c [u_serial]) from [<7f01c06c>] (acm_disable+0xc/0x30 [usb_f_acm])
[<7f01c06c>] (acm_disable+0xc/0x30 [usb_f_acm]) from [<7f001478>] (reset_config.isra.10+0x34/0x5c [libcomposite])
[<7f001478>] (reset_config.isra.10+0x34/0x5c [libcomposite]) from [<7f0014d4>] (composite_disconnect+0x34/0x5c [libcomposite])
[<7f0014d4>] (composite_disconnect+0x34/0x5c [libcomposite]) from [<803d1024>] (udc_irq+0x770/0xce4)
[<803d1024>] (udc_irq+0x770/0xce4) from [<803cdcc0>] (ci_irq+0x98/0x164)
[<803cdcc0>] (ci_irq+0x98/0x164) from [<8007edfc>] (handle_irq_event_percpu+0x50/0x17c)
[<8007edfc>] (handle_irq_event_percpu+0x50/0x17c) from [<8007ef64>] (handle_irq_event+0x3c/0x5c)
[<8007ef64>] (handle_irq_event+0x3c/0x5c) from [<80081e98>] (handle_fasteoi_irq+0x98/0x168)
[<80081e98>] (handle_fasteoi_irq+0x98/0x168) from [<8007e598>] (generic_handle_irq+0x28/0x3c)
[<8007e598>] (generic_handle_irq+0x28/0x3c) from [<8000edf4>] (handle_IRQ+0x4c/0xb4)
[<8000edf4>] (handle_IRQ+0x4c/0xb4) from [<800085bc>] (gic_handle_irq+0x28/0x5c)
[<800085bc>] (gic_handle_irq+0x28/0x5c) from [<800125c0>] (__irq_svc+0x40/0x54)
Exception stack(0x8083bf68 to 0x8083bfb0)
bf60:                   81533b80 00000000 00096234 8001d760 8088e12c 00000000
bf80: 8083a000 8083a000 8084290c 805cb414 808428ac 8083a000 00000001 8083bfb0
bfa0: 8000f138 8000f13c 60000013 ffffffff
[<800125c0>] (__irq_svc+0x40/0x54) from [<8000f13c>] (arch_cpu_idle+0x30/0x3c)
[<8000f13c>] (arch_cpu_idle+0x30/0x3c) from [<8005eb94>] (cpu_startup_entry+0xf4/0x148)
[<8005eb94>] (cpu_startup_entry+0xf4/0x148) from [<807f1a2c>] (start_kernel+0x2c4/0x318)
BUG: spinlock lockup suspected on CPU#0, swapper/0/0
 lock: 0xbf128014, .magic: dead4ead, .owner: swapper/0/0, .owner_cpu: 0
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.11.0-next-20130910+ #106
[<80014e20>] (unwind_backtrace+0x0/0xec) from [<80011a6c>] (show_stack+0x10/0x14)
[<80011a6c>] (show_stack+0x10/0x14) from [<805c143c>] (dump_stack+0x94/0xbc)
[<805c143c>] (dump_stack+0x94/0xbc) from [<80282c94>] (do_raw_spin_lock+0x108/0x18c)
[<80282c94>] (do_raw_spin_lock+0x108/0x18c) from [<805c77e0>] (_raw_spin_lock_irqsave+0x50/0x5c)
[<805c77e0>] (_raw_spin_lock_irqsave+0x50/0x5c) from [<803cff88>] (ep_disable+0x24/0x110)
[<803cff88>] (ep_disable+0x24/0x110) from [<7f015d50>] (gserial_disconnect+0xa0/0x15c [u_serial])
[<7f015d50>] (gserial_disconnect+0xa0/0x15c [u_serial]) from [<7f01c06c>] (acm_disable+0xc/0x30 [usb_f_acm])
[<7f01c06c>] (acm_disable+0xc/0x30 [usb_f_acm]) from [<7f001478>] (reset_config.isra.10+0x34/0x5c [libcomposite])
[<7f001478>] (reset_config.isra.10+0x34/0x5c [libcomposite]) from [<7f0014d4>] (composite_disconnect+0x34/0x5c [libcomposite])
[<7f0014d4>] (composite_disconnect+0x34/0x5c [libcomposite]) from [<803d1024>] (udc_irq+0x770/0xce4)
[<803d1024>] (udc_irq+0x770/0xce4) from [<803cdcc0>] (ci_irq+0x98/0x164)
[<803cdcc0>] (ci_irq+0x98/0x164) from [<8007edfc>] (handle_irq_event_percpu+0x50/0x17c)
[<8007edfc>] (handle_irq_event_percpu+0x50/0x17c) from [<8007ef64>] (handle_irq_event+0x3c/0x5c)
[<8007ef64>] (handle_irq_event+0x3c/0x5c) from [<80081e98>] (handle_fasteoi_irq+0x98/0x168)
[<80081e98>] (handle_fasteoi_irq+0x98/0x168) from [<8007e598>] (generic_handle_irq+0x28/0x3c)
[<8007e598>] (generic_handle_irq+0x28/0x3c) from [<8000edf4>] (handle_IRQ+0x4c/0xb4)
[<8000edf4>] (handle_IRQ+0x4c/0xb4) from [<800085bc>] (gic_handle_irq+0x28/0x5c)
[<800085bc>] (gic_handle_irq+0x28/0x5c) from [<800125c0>] (__irq_svc+0x40/0x54)
Exception stack(0x8083bf68 to 0x8083bfb0)
bf60:                   81533b80 00000000 00096234 8001d760 8088e12c 00000000
bf80: 8083a000 8083a000 8084290c 805cb414 808428ac 8083a000 00000001 8083bfb0
bfa0: 8000f138 8000f13c 60000013 ffffffff
[<800125c0>] (__irq_svc+0x40/0x54) from [<8000f13c>] (arch_cpu_idle+0x30/0x3c)
[<8000f13c>] (arch_cpu_idle+0x30/0x3c) from [<8005eb94>] (cpu_startup_entry+0xf4/0x148)
[<8005eb94>] (cpu_startup_entry+0xf4/0x148) from [<807f1a2c>] (start_kernel+0x2c4/0x318)

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agousb: gadget: zero: Add flexible auto remote wakeup test method
Peter Chen [Mon, 9 Sep 2013 08:48:29 +0000 (16:48 +0800)]
usb: gadget: zero: Add flexible auto remote wakeup test method

In order to increase test coverage, we can change the interval between
two remote wakeups every time, and the interval can be any user defined
value. This change will no affect current behavior if the user does not
use two introduced module paramters.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>