make shi [Mon, 26 Mar 2012 06:04:36 +0000 (14:04 +0800)]
ENGR00177884-1 mx6q sabresd: config USB pin according to board
- Configure USB pin and power control for mx6q sd board
- keep USB host1 VBUS always on for mx6q sd board
- set default USB OTG VBUS off for solo ARD board
Peter Chen [Wed, 14 Mar 2012 05:54:17 +0000 (13:54 +0800)]
ENGR00177589 USB: fix two USB common bug for i.MX6
- Without host wakeup enable, after doing system suspend/resume,
plug in usb cable(both host/device) with no response, the reason is
usb wakeup is not enable after suspend resume.
- clock refcount will not be 0 after usb enters low power mode,the
reason is OTG ID wake up not do recover hcd.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Anson Huang [Mon, 19 Mar 2012 03:26:19 +0000 (11:26 +0800)]
ENGR00176177-2 Add irq count mechanism to interactive governor
Add irq count to CPUFreq as a freq change condition.
Because some devices' working mode is unable to issue
CPUFreq change because of low CPU loading, but the cpu
freq will impact these devices' performace significantly.
Interactive govervor will sample the cpu loading as well
as the irq count which is registered. If the
loading or the irq count exceed the threshold we set,
governor will issue an CPUFreq change request.
These devices' irq threshold and enable/disable can be modified
via /sys/devices/system/cpu/cpufreq/interactive/irq_scaling
echo 0xAABBBC to change the default setting as below
AA : irq number
BBB: threshold
C :enable or disable
Currently only enable USDHC3, USDHC4, GPU, SATA and
USB by default, we can add device to the init struct which is
located in arch/arm/mach-mx6/irq.c.
Anson Huang [Mon, 19 Mar 2012 02:41:10 +0000 (10:41 +0800)]
ENGR00176177-1 Add irq count mechanism to interactive governor
Add irq count to CPUFreq as a freq change condition.
Because some devices' working mode is unable to issue
CPUFreq change because of low CPU loading, but the cpu
freq will impact these devices' performace significantly.
Interactive govervor will sample the cpu loading as well
as the irq count which is registered. If the
loading or the irq count exceed the threshold we set,
governor will issue an CPUFreq change request.
These devices' irq threshold and enable/disable can be modified
via /sys/devices/system/cpu/cpufreq/interactive/irq_scaling
echo 0xAABBBC to change the default setting as below
AA : irq number
BBB: threshold
C :enable or disable
Currently only enable USDHC3, USDHC4, GPU, SATA and
USB by default, we can add device to the init struct which is
located in arch/arm/mach-mx6/irq.c.
Anson Huang [Fri, 23 Mar 2012 03:21:30 +0000 (11:21 +0800)]
ENGR00177745-2 Add interactive cpufreq governor
cpufreq: interactive: New 'interactive' governor
This governor is designed for latency-sensitive workloads, such as
interactive user interfaces. The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.
Existing governors sample CPU load at a particular rate, typically
every X ms. This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.
The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle. When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks. If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.
If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.
A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.
The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
The minimum amount of time to spend at the current frequency before
ramping down. This is to ensure that the governor has seen enough
historic CPU load data to determine the appropriate workload.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
The CPU load at which to ramp to max speed.
Anson Huang [Mon, 19 Mar 2012 01:55:46 +0000 (09:55 +0800)]
ENGR00177745-1 Add interactive cpufreq governor
cpufreq: interactive: New 'interactive' governor
This governor is designed for latency-sensitive workloads, such as
interactive user interfaces. The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.
Existing governors sample CPU load at a particular rate, typically
every X ms. This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.
The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle. When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks. If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.
If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.
A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.
The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
The minimum amount of time to spend at the current frequency before
ramping down. This is to ensure that the governor has seen enough
historic CPU load data to determine the appropriate workload.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
The CPU load at which to ramp to max speed.
Robin Gong [Fri, 23 Mar 2012 05:59:10 +0000 (13:59 +0800)]
ENGR00177748 pfuze100 mx6q_sabreSD: keep VGEN4 and VGEN5 always on
To enable regulator_has_full_constraints when kernel boot, some regulator
be kept on always, from SabreSD schematic, VGEN4 and VGEN5 of pfuze100 should
be on forever.
Lily Zhang [Fri, 23 Mar 2012 10:02:40 +0000 (18:02 +0800)]
ENGR00177780 mx6dl sabresd: add USB support for RevB board
- Configure USB_OTG_PWR_EN PIN as GPIO
- Configure GPR1 bit 13 to select "usb_otg_id" as
ENET_RX_ER
- To make USBOTG work on RevB board, HW rework is required.
Signed-off-by: Lily Zhang <r58066@freescale.com> Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Hake Huang [Fri, 23 Mar 2012 02:57:37 +0000 (10:57 +0800)]
ENGR00177737-2: add HDMI sii902x support in mx6q-arm2
test with
video=mxcfb0:dev=sii902x_hdmi,1024x768M@60,if=RGB24 disable_mipi_dsi
Note:
1. currently we use the same ipu setting port with on chip HDMI,
if we need coexist need change the on chip HDMI ipu settings.
2. need remove MIPI DSI initial with 'disable_mipi_dsi' in kernel command line,
as mipi dsi reset will reset on board sii902x as well.
3. change the I2C2 work at 100K not 400K, to be compatible with EDID spec.
4. the side effect is that Sii902x will have to use "sii902x_hdmi",
instead of "hdmi" as before
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177310-3 v4l2 capture: enable mclk when open function
Enable mclk when opening v4l2 capture device and disable
mclk when closing v4l2 capture device.
If mclk is disabled when operating MIPI camera, the test
is failed.
Danny Nold [Wed, 21 Mar 2012 04:01:53 +0000 (23:01 -0500)]
ENGR00177359 - EPDC fb: Add EPDC support to SabreSD board
- Change EPDC pad groups to have one for EPDC enable and one
for EPDC disable.
- Add EPDC and Maxim 17135 structures and functions to SabreSD
board file. Code pulled in with minimal change from ARM2 board
file.
One exception: Had to remove regulator_has_full_constraints()
from max17135_regulator_init() to prevent PFUZE from disabling
regulators and removing power from the board at the end of
kernel initialization.
Signed-off-by: Danny Nold <dannynold@freescale.com>
Tony LIU [Wed, 7 Mar 2012 07:53:56 +0000 (15:53 +0800)]
ENGR00176299-1 usb host suspend/resume can't work randomly
MSL part
- after suspend bit is set, we need to set PWD bit and
clear it right now to let PHY know the state change
- after suspend bit is set, disconnect detection should be
clear
- after set resume bit, disconnect detection should be set
after 30 ms
- IC issue PDM refer to
TKT092876
TKT092872
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Lily Zhang [Tue, 13 Mar 2012 08:42:34 +0000 (16:42 +0800)]
ENGR00177083-1 i.mx6: sabresd: remove the prefix MX6Q from gpio definition
Since i.mx6q and i.mx6sdl share the same sabreauto board, the
gpio is the same. Remove the MX6Q_ prefix from gpio defintion to
avoid the confusion which may think it is MX6Q specific.
Robby Cai [Fri, 16 Mar 2012 03:40:02 +0000 (11:40 +0800)]
ENGR00177046: Add the platform dependency for PXP in Kconfig
If there's no dependency, build will be broken when do
`make ARCH=arm CROSS_COMPILE=<cross-compiler path> allmodconfig'
`make'
because PXP module will be turned on. This patch fixed it.
Lin Fuzhen [Thu, 1 Mar 2012 10:52:09 +0000 (18:52 +0800)]
ENGR00175884 System resume failed when the power key was pressed shortly
Some platform like Android needs to get the power key event to
reume the other devcies such as FB, TS. System resume failed when
the gpio power key was pressed shortly sometime, but can resume the
by long press the power key.
The root cause of this issue is that the GPIO IRQ is registered as device
IRQ, but device IRQs will just be enabled after early resume finished,
so when the power key press shortly, the gpio-irq may still disabled in that
time, and the ISR will be ignored and could not detect the key down event.
To fix this bug, add the IRQF_EARLY_RESUME flag to the irq if platform
has specified that the button can wake up the system , in this way, this
irq will be enabled during syscore resume, so that the power key press
can be handled and reported as early as possible.
Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
Remove the followinig section mismatch warning
WARNING: vmlinux.o(.text+0x1bdf8): Section mismatch in
reference from the function gpmi_nand_platform_init() to
the (unknown reference) .init.data:(unknown)
The function gpmi_nand_platform_init() references
the (unknown reference) __initdata (unknown).
This is often because gpmi_nand_platform_init lacks a __initdata
annotation or the annotation of (unknown) is wrong.
Lily Zhang [Mon, 12 Mar 2012 12:58:54 +0000 (20:58 +0800)]
ENGR00176812-10 mx6solo sabreauto: change display for single IPU
mx6solo only supports single IPU, up to 2 display
by default. So (ARRAY_SIZE(sabr_fb_data) + 1 )/ 2
fb devices are registered. The board configuration
is:
HDMI: ipu-0, di-1
ldb: ipu-0, di-0, sec_ipu-0, sec_di-1, LDB_SEP0
Signed-off-by: Wayne Zou <b36644@freescale.com> Signed-off-by: Lily Zhang <r58066@freescale.com>
Adrian Alonso [Fri, 9 Mar 2012 21:52:02 +0000 (15:52 -0600)]
ENGR00176812-9 mx6 sabreauto: add revB board support
* mx6 sabreauto revB include a steering logic
circuit that enables the route path for i2c3_sda signal.
This patch enables i2c3_sda route to fix io-expander
read/write errors and additional devices connected to
the i2c3 bus.
* mx6 sabreauto revB board uses atheors fec phy.
* Set GPIO_16 as input for IEEE-1588 ts_clk and RMII
reference clk
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Jason Liu [Thu, 8 Mar 2012 09:22:51 +0000 (17:22 +0800)]
ENGR00176812-3 i.mx6: sabreauto: move some declarations to common.h
Need move some declarations to common.h to avoid each user
individully declare it in their own .c file. This can make
the code clean and also avoid the duplication.
Jason Liu [Thu, 8 Mar 2012 09:11:31 +0000 (17:11 +0800)]
ENGR00176812-2 i.mx6: sabreauto: remove the prefix MX6Q from gpio definition
Since i.mx6q and i.mx6sdl share the same sabreauto board, the
gpio is the same. Remove the MX6Q_ prefix from gpio defintion to
avoid the confusion which may think it is MX6Q specific.
This patch also make the GPIO definion sorted by GPIO_NR
Wu Guoxing [Thu, 15 Mar 2012 02:54:26 +0000 (10:54 +0800)]
ENGR00176921:gpu-viv: set outstanding request number for all chips that using gc320
this needs by all the chips(6dl, 6dq) that using gc320
this is vivante's IP bug, that when set outstanding number bigger than
16, it will have a chance for gc320 to dead lock the axi bus, which will
lead to system hang.
also, as our chip can only support axi outstanding of 8(for 6dl) and 4(6dq),
this change have no performance impact.
Danny Nold [Wed, 29 Feb 2012 03:31:56 +0000 (21:31 -0600)]
ENGR00174923 - EPDC fb: Stress Test Failure Fixed
- Changed workqueues to use strict ordering and one process at a time
- Changed mutex ordering in IRQ handler to avoid race condition
- Updated 64-bit logic operation to ensure proper logic
- Fixed bug in how LUT cancellation case is handled. The wrong
index was being used to clear LUT IRQ and IRQ_MASK.
- Increased flush_updates timeout to 8s, since it may take several
seconds if a long queue of updates is waiting.
Signed-off-by: Danny Nold <dannynold@freescale.com>
Sandor Yu [Wed, 29 Feb 2012 10:09:00 +0000 (18:09 +0800)]
ENGR00175700 System hang when change HDMI from XGA to 1080P with display blank
Change the vide mode from XGA to 1080P when display blank,
the system will hang.
It is cause by overflow interrupt will trigger when the video mode change,
but clean the interrupt status bit depend on pixewl clock.
In blank state the pixel clock is gating so the HDMI PHY can't work.
Robin Gong [Tue, 13 Mar 2012 06:50:15 +0000 (14:50 +0800)]
ENGR00176649-3 regulator:Support regulator set in sysfs
By default, regulator set is disabled by kernel, but if enable the function
we can easily set regulator in sysfs, it's useful for unit test of pfuze
regulator. Signed-off-by: Robin Gong <b38343@freescale.com>
Danny Nold [Thu, 8 Mar 2012 21:12:43 +0000 (15:12 -0600)]
ENGR00176504 - EPDC fb: Reduce number of PxP output buffers to 2
- Changed from one-buffer-per-LUT (up to 16 for EPDCv1.0 and 64 for EPDCv2.0)
to using 2 static buffers for PxP output. This is facilitated by the switch
to using a single-threaded workqueue to process each update, which
guarantees that we can use just 2 buffers without clobbering concurrent
updates.
- One known limitation: This restricts the SNAPSHOT update scheme to only 2
concurrent updates. So if a user intends to use SNAPSHOT scheme, the
EPDC_MAX_NUM_BUFFERS #define should be increased based on the desired number
of allowable concurrent updates (with a corresponding penalty in static
memory allocation).
Signed-off-by: Danny Nold <dannynold@freescale.com>
Anson Huang [Tue, 6 Mar 2012 04:00:16 +0000 (12:00 +0800)]
ENGR00176160 [MX6]Correct PLL1 freq change flow
Previous PLL1 freq change is done by switching CPU clock
to 400M pfd or 24M OSC, then modifying
PLL1 div directly, and switch back CPU clock immediately,
it will result in CPU clock stop during PLL1 hardware lock
period, thus, DRAM FIFO may blocked by the data CPU
requested before PLL1 clock changed, and it will block other devices
accessing DRAM, such as IPU, VPU etc. It will cause
underrun or hang issue. We should wait PLL1 lock, then switch
back.
Peter Chen [Wed, 22 Feb 2012 03:14:01 +0000 (11:14 +0800)]
ENGR00176147-1: usb: fix some wakeup problems
- Do not call hcd core adjust wakeup flag code. It may change
wakeup flag, and cause port change detect(PCD) enable setting change.
- For ID wakeup, it should not call host's fsl_usb_recover_hcd at ID interrupt.
The coming ID switch event will resume host.
- Do not need enable wakeup interrupt for host at platform driver resume
routine, it may introduce unnessary wakeup interrupt during bus resume.
The wakeup will be enabled again when usb host goes to controller again
due to autosuspend.
- When there is no gadget enabled, the otg port is still at host mode with
interrupt enabled, so when male Micro-B to female A-type cable with
usb device plugs in, there will be PCD interrupt before hcd core leaves
suspend mode.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Xinyu Chen [Mon, 5 Mar 2012 08:17:52 +0000 (16:17 +0800)]
ENGR00176068-2 smp_twd: reconfigure clockevents after cpufreq change
After a cpufreq transition, update the clockevent's frequency
by fetching the new clock rate from the clock framework and
reprogram the next clock event.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com> Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Xinyu Chen [Mon, 5 Mar 2012 08:15:20 +0000 (16:15 +0800)]
ENGR00176068-1 mx6q: add smp_twd clock for localtimer
Add a smp_twd system clock which is simple clock
from parent of cpu_clk, and it's rate is half
of the cpu_clk.
This is used for reprograming the twd clock event
after cpu freq is changed.
Also disable local timer setup when wait mode enabled.
ENGR00176136- MX6: Added support for 1.2GHz ARM Frequency
Added the new 1.2GHz working point.
Currently 'arm_freq=1200" should be added to commandline
for the core to run at 1.2GHz. Also ensure that the appropriate
HW board mods have been done to set VDDARM_IN at 1.425V.
Zhang Jiejing [Tue, 6 Mar 2012 06:47:57 +0000 (14:47 +0800)]
ENGR00176159 video: ipuv3-fb: change to timeout semaphore to wait on irq.
change to timeout semaphore to wait on irq.
use no timeout semaphore have below issues:
1. since fbmem.c will hold the console_lock() before call PAN_DISPLAY ioictl,
if have wrong happens on IPU, IRQ not come, any log printk will not ouput,
it will become like a system hang, and developer don't know what's wrong.
2. semaphore don't have timeout, here we can't know irq not come,
so hang it infintly.
3. semaphore lock and unlock in different context is a dangous operation.
To fix these issue, use timedout version to wait on irq.
But for better coding stly to align Kernel Coding Style Doc,
better use complete to wait on irq, use semaphre little ugly.
Lionel Xu [Fri, 2 Mar 2012 05:18:17 +0000 (13:18 +0800)]
ENGR00170526-4 ESAI: To resolve the playback no sound issue occasionally happen
There is no sound output any longer sometimes after several times of playback,
this platch is trying to resolve this issue by:
1)move the global power control bit setting from function hw_params/shutdown to
DAPM, thererfor the PWN bit will not be set/unset each time playback;
2) Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
Lionel Xu [Fri, 2 Mar 2012 05:12:26 +0000 (13:12 +0800)]
ENGR00170526-3 ESAI: Remove the workaround to reset codec before playbacking
Previously in order to avoid audio playback no sound issue, a hardware reset
was made to the codec chip each time when doing playback. now remove this
workaround.
Francisco Munoz [Thu, 1 Mar 2012 23:50:28 +0000 (17:50 -0600)]
ENGR00175551:Update sabreauto board file for handling spi and paralle nor
*Files affected: board-mx6q_sabreauto.c
*Added IOMUX settings for parallel nor
*Utilized physmap driver in order to probe the chip
*Implemented conditional compilation enabling either spi or parallel
nor.
Signed-off-by: Francisco Munoz <b37752@freescale.com>
projects / karo-tx-linux.git / log