Rob Clark [Sun, 7 Jun 2015 17:46:04 +0000 (13:46 -0400)]
drm/msm: restart queued submits after hang
Track the list of in-flight submits. If the gpu hangs, retire up to an
including the offending submit, and then re-submit the remainder. This
way, for concurrently running piglit tests (for example), one failing
test doesn't cause unrelated tests to fail simply because it's submit
was queued up after one that triggered a hang.
Rob Clark [Mon, 11 May 2015 15:50:03 +0000 (11:50 -0400)]
drm/msm: fix timeout calculation
The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but
converting this directly to jiffies doesn't take into account the
initial jiffies count at boot, which may differ from the base time
of CLOCK_MONOTONIC.
TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that
instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as
suggested by Arnd)
v2: switch over from 'struct timespec' to ktime_t throughout, since
'struct timespec' will be deprecated (as suggested by Arnd)
v3: minor cosmetic tweaks
Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Thu, 4 Jun 2015 21:31:42 +0000 (17:31 -0400)]
drm/msm/hdmi: Use pinctrl in HDMI driver
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Laurent Pinchart [Wed, 27 May 2015 11:39:46 +0000 (14:39 +0300)]
drm/msm/atomic: Clean up planes in the error paths of .atomic_commit()
When the .atomic_commit() handler fails, clean up planes previoulsy
prepared by drm_atomic_helper_prepare_planes() with a call to
drm_atomic_helper_cleanup_planes().
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
Brian Norris [Wed, 20 May 2015 22:59:31 +0000 (15:59 -0700)]
drm/msm: dsi: fix compile errors when CONFIG_GPIOLIB=n
I'm not sure where, exactly, but somewhere in here we must be relying on
an implicit include.
drivers/gpu/drm/msm/dsi/dsi_host.c: In function ‘dsi_host_init_panel_gpios’:
drivers/gpu/drm/msm/dsi/dsi_host.c:1356:2: error: implicit declaration of function ‘devm_gpiod_get’ [-Werror=implicit-function-declaration]
msm_host->disp_en_gpio = devm_gpiod_get(panel_device,
^
drivers/gpu/drm/msm/dsi/dsi_host.c:1356:25: warning: assignment makes pointer from integer without a cast [enabled by default]
msm_host->disp_en_gpio = devm_gpiod_get(panel_device,
^
drivers/gpu/drm/msm/dsi/dsi_host.c:1364:3: error: implicit declaration of function ‘gpiod_direction_output’ [-Werror=implicit-function-declaration]
ret = gpiod_direction_output(msm_host->disp_en_gpio, 0);
^
drivers/gpu/drm/msm/dsi/dsi_host.c:1371:20: warning: assignment makes pointer from integer without a cast [enabled by default]
msm_host->te_gpio = devm_gpiod_get(panel_device, "disp-te");
^
drivers/gpu/drm/msm/dsi/dsi_host.c:1378:3: error: implicit declaration of function ‘gpiod_direction_input’ [-Werror=implicit-function-declaration]
ret = gpiod_direction_input(msm_host->te_gpio);
^
drivers/gpu/drm/msm/dsi/dsi_host.c: In function ‘msm_dsi_host_power_on’:
drivers/gpu/drm/msm/dsi/dsi_host.c:1918:3: error: implicit declaration of function ‘gpiod_set_value’ [-Werror=implicit-function-declaration]
gpiod_set_value(msm_host->disp_en_gpio, 1);
^
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: David Airlie <airlied@linux.ie> Cc: Rob Clark <robdclark@gmail.com> Cc: Hai Li <hali@codeaurora.org> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Rob Clark <robdclark@gmail.com>
Uwe Kleine-König [Wed, 20 May 2015 07:21:41 +0000 (09:21 +0200)]
drm/msm: use devm_gpiod_get_optional for optional reset gpio
Since 39b2bbe3d715 (gpio: add flags argument to gpiod_get*() functions)
which appeared in v3.17-rc1, the gpiod_get* functions take an additional
parameter that allows to specify direction and initial value for output.
Also there is a variant to find optional gpios that returns NULL if
there is no gpio instead of -ENOENT.
Make use of both features to simplify the driver.
This makes error checking more strict because errors like -ENOSYS ("no
gpio support compiled in") or -EPROBE_DEFER ("gpio not ready yet") are
handled correctly now.
Furthermore this is one caller less that stops us making the flags
argument to gpiod_get*() mandatory.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Fri, 15 May 2015 17:04:06 +0000 (13:04 -0400)]
drm/msm/dsi: Separate PHY to another platform device
There are different types of PHY from one chipset to another, while
the DSI host controller is relatively consistent across platforms.
Also, the PLL inside PHY is providing the source of DSI byte and
pixel clocks, which are used by DSI host controller. Separated devices
for clock provider and clock consumer make DSI driver better fit into
common clock framework.
Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Fri, 15 May 2015 17:04:04 +0000 (13:04 -0400)]
drm/msm/dsi: Add DSI PLL clock driver support
DSI byte clock and pixel clocks are sourced from DSI PLL.
This change adds the DSI PLL source clock driver under
common clock framework.
This change handles DSI 28nm PLL only.
Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Tue, 28 Apr 2015 23:35:37 +0000 (19:35 -0400)]
drm/msm: Use customized function to wait for atomic commit done
MDP FLUSH registers could indicate if the previous flush updates
has taken effect at vsync boundary. Making use of this H/W feature
can catch the vsync that happened between CRTC atomic_flush and
*_wait_for_vblanks, to avoid unnecessary wait.
This change allows kms CRTCs to use their own *_wait_for_commit_done
functions to wait for FLUSH register cleared at vsync, before commit
completion.
Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
wait_for_completion_timeout returns 0 in case of timeout and never
return < 0 so there is no additional information in printing the
value of time_left here as it will always be 0, thus it can be dropped.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
drm/msm: match wait_for_completion_timeout return type
return type of wait_for_completion_timeout is unsigned long not int, this
patch assigns the return value of wait_for_completion_timeout to an
appropriately typed and named variable.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
drm/msm: dsi: Provide option to force continuous HS clock
Some DSI peripherals rely on the HS clock on DSI clock lane as their clock
source. If the clock lane transitions between HS and LP states, it
can disrupt the functioning of such peripherals.
The mipi dsi mode flag MIPI_DSI_CLOCK_NON_CONTINUOUS already exists for
such peripheral drivers. Use it to configure the bit CLKLN_HS_FORCE_REQUEST
in DSI_LANE_CTRL.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
The timeout is passed as a constant which makes it HZ dependent because
jiffies are expected so it should be converted to jiffies. The actual
value is not clear from the code - my best guess is that this should be
300 milliseconds given that other timeouts are in milliseconds based on
looking at other drm drivers (e.g. exynos_drm_dsi.c:356 300ms,
tegra/dpaux.c:188 250ms) - this needs to be confirmed by someone who
knows the details of the driver.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
wait_for_completion_timeout return >= 0 but never negative so the check
logic looks inconsistent. Further the return value of
wait_for_completion_timeout was being passed up the call chain but the
x call sites as drm_dp_i2c_do_msg()/drm_dp_dpcd_access() check for < 0
thus timeout was being treated as success case.
<snip> drivers/gpu/drm/drm_dp_helper.c:drm_dp_i2c_do_msg()
mutex_lock(&aux->hw_mutex);
ret = aux->transfer(aux, msg);
mutex_unlock(&aux->hw_mutex);
if (ret < 0) {
<snip>
logic in edp_aux_transfer() seems incorrect as it could return 0 (timeout)
but checks of <= 0 to indicate error so the return probably should be
-ETIMEDOUT in case wait_for_completion_timeout returns 0 (timeout
occurred).
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 4 Jun 2015 14:26:37 +0000 (10:26 -0400)]
drm/msm: clarify downstream bus scaling
A few spots in the driver have support for downstream android
CONFIG_MSM_BUS_SCALING. This is mainly to simplify backporting the
driver for various devices which do not have sufficient upstream
kernel support. But the intentionally dead code seems to cause
some confusion. Rename the #define to make this more clear.
Rob Clark [Fri, 30 Jan 2015 14:48:11 +0000 (20:18 +0530)]
drm/msm/mdp4: Support NV12MT format in mdp4
Using fb modifier flag, support NV12MT format in MDP4.
v2:
- rework the modifier's description [Daniel Vetter's comment]
- drop .set_mode_config() callback [Rob Clark's comment]
v3:
- change VENDOR's name and restrict usage to NV12 [pointed by Daniel]
Rob Clark [Sun, 19 Apr 2015 14:14:09 +0000 (10:14 -0400)]
drm/msm/adreno: dump scratch regs and other info on hang
Dump a bit more info when the GPU hangs, without having hang_debug
enabled (which dumps a *lot* of registers). Also dump the scratch
registers, as they are useful for determining where in the cmdstream
the GPU hung (and they seem always safe to read when GPU has hung).
Note that the freedreno gallium driver emits increasing counter values
to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so
these two in particular can be used to "triangulate" where in the
cmdstream the GPU hung.
Dave Airlie [Thu, 11 Jun 2015 03:04:07 +0000 (13:04 +1000)]
Merge branch 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux into drm-next
More fixes for amdgpu for 4.2. We've integrated Jerome's comments
about the interface among other things. I'll be on vacation next week
so Christian will be handling any updates next week.
* 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (23 commits)
drm/amdgpu: fix a amdgpu_dpm=0 bug
drm/amdgpu: don't enable/disable display twice on suspend/resume
drm/amdgpu: fix UVD/VCE VM emulation
drm/amdgpu: enable vce powergating
drm/amdgpu/iceland: don't call smu_init on resume
drm/amdgpu/tonga: don't call smu_init on resume
drm/amdgpu/cz: don't call smu_init on resume
drm/amdgpu: update to latest gfx8 golden register settings
drm/amdgpu: whitespace cleanup in gmc8 golden regs
drm/admgpu: move XDMA golden registers to dce code
drm/amdgpu: fix the build on big endian
drm/amdgpu: cleanup UAPI comments
drm/amdgpu: remove AMDGPU_CTX_OP_STATE_RUNNING
drm/amdgpu: remove the VI hardware semaphore in ring sync
drm/amdgpu: set the gfx config properly for all CZ variants (v2)
drm/amdgpu: also print the pci revision when printing the pci ids
drm/amdgpu: cleanup VA IOCTL
drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmap
drm/amdgpu: fix amdgpu_vm_bo_map
drm/amdgpu: remove unused AMDGPU_IB_FLAG_GDS
...
Sonny Jiang [Thu, 28 May 2015 19:47:53 +0000 (15:47 -0400)]
drm/amdgpu: enable vce powergating
Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on
demand.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
Alex Deucher [Tue, 9 Jun 2015 21:46:30 +0000 (17:46 -0400)]
drm/amdgpu/iceland: don't call smu_init on resume
smu_init allocates buffers and initializes them. It does not
touch the hw. There is no need to do it again on resume. It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.
Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 9 Jun 2015 21:42:10 +0000 (17:42 -0400)]
drm/amdgpu/tonga: don't call smu_init on resume
smu_init allocates buffers and initializes them. It does not
touch the hw. There is no need to do it again on resume. It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.
Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 9 Jun 2015 21:32:53 +0000 (17:32 -0400)]
drm/amdgpu/cz: don't call smu_init on resume
smu_init allocates buffers and initializes them. It does not
touch the hw. There is no need to do it again on resume. It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.
Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 9 Jun 2015 13:58:23 +0000 (09:58 -0400)]
drm/amdgpu: fix the build on big endian
Some leftover copy and pastes from radeon that never
got updated.
Reviewed-by: Christian König <christian.koenig@amd.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 5 Jun 2015 18:34:19 +0000 (14:34 -0400)]
drm/amdgpu: set the gfx config properly for all CZ variants (v2)
Need to adjust the number of CUs and RBs.
v2: get proper values
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 5 Jun 2015 19:04:33 +0000 (15:04 -0400)]
drm/amdgpu: also print the pci revision when printing the pci ids
The driver makes use of this information so print if to aid in
debugging.
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 5 Jun 2015 01:14:18 +0000 (11:14 +1000)]
Merge branch 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the big pull request for amdgpu, the new driver for VI+ AMD
asics. I currently supports Tonga, Iceland, and Carrizo and also
contains a Kconfig option to build support for CI parts for testing.
All major functionality is supported (displays, gfx, compute, dma,
video decode/encode, etc.). Power management is working on Carrizo,
but is still being worked on for Tonga and Iceland.
* 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (106 commits)
drm/amdgpu: only support IBs in the buffer list (v2)
drm/amdgpu: add vram_type and vram_bit_width for interface query (v2)
drm/amdgpu: add ib_size/start_alignment interface query
drm/amdgpu: add me/ce/pfp_feature_version interface query
drm/amdgpu add ce_ram_size for interface query
drm/amdgpu add max_memory_clock for interface query (v2)
drm/amdgpu: add hdp flush for gfx8 compute ring
drm/amdgpu: fix no hdp flush for compute ring
drm/amdgpu: add HEVC/H.265 UVD support
drm/amdgpu: stop loading firmware with pm.mutex locked
drm/amdgpu: remove mclk_lock
drm/amdgpu: fix description of vm_size module parameter (v2)
drm/amdgpu: remove all sh mem register modification in vm flush
drm/amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT
drm/amdgpu: fence should be added to shared slot
drm/amdgpu: sync fence of clear_invalids (v2)
drm/amdgpu: max_pde_used usage should be under protect
drm/amdgpu: fix bug of vm_bo_map (v2)
drm/amdgpu: implement the allocation range (v3)
drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)
...
Frediano Ziglio [Wed, 3 Jun 2015 11:09:19 +0000 (12:09 +0100)]
drm/qxl: Propagate correctly errors from qxlhw_handle_to_bo
This function could return a NULL pointer in case of handle not
present and in case of out of memory conditions however caller
function always returned EINVAL error hiding a possible ENOMEM.
This patch change the function to return the error instead to
be able to propagate the error instead of assuming EINVAL.
Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Frediano Ziglio [Wed, 3 Jun 2015 11:09:18 +0000 (12:09 +0100)]
drm/qxl: Simplify cleaning qxl processing command
In qxlhw_handle_to_bo we incremented counters twice, one time for release object
and one for reloc_info.
In the main function however reloc_info references was drop much earlier than
release so keeping the pointer only on release is safe and make cleaning
process easier.
Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Frediano Ziglio [Wed, 3 Jun 2015 11:09:17 +0000 (12:09 +0100)]
drm/qxl: Move main reference counter to GEM object instead of TTM ones
qxl_bo structure has two reference counters, one in the GEM object and
another in the TTM object. The GEM object keep a counter to the TTM object
so when GEM counter reached zero the TTM counter (using qxl_bo_unref) was
decremented. The qxl object is fully freed (both GEM and TTM part are cleaned)
when the TTM counter reach zero.
One issue was that surface idr structure has no owning on qxl_bo objects however
it contains a pointer to qxl_bo object. This caused some nasty race condition
for instance qxl_bo object was reaped even after counter was already zero.
This patch fix these races moving main counter (the one used by qxl_bo_(un)ref)
to GEM object which cleanup routine (qxl_gem_object_free) remove the idr pointer
(using qxl_surface_evict) when the counters are still valid.
Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Frediano Ziglio [Wed, 3 Jun 2015 11:09:16 +0000 (12:09 +0100)]
drm/qxl: Remove format string errors
Enable format string checks for qxl_io_log and remove resulting warnings
which could lead to memory errors on different platform or just printing
wrong information.
Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Frediano Ziglio [Wed, 3 Jun 2015 11:09:12 +0000 (12:09 +0100)]
drm/qxl: Avoid double free on error
Is we are not able to get source bo object from handle we free
destination bo object and call cleanup code however destination
object was already inserted in reloc_info array (num_relocs was
already incremented) so on cleanup we free destination again.
Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Frediano Ziglio [Wed, 3 Jun 2015 11:09:10 +0000 (12:09 +0100)]
drm/qxl: Do not leak memory if qxl_release_list_add fails
If the function fails reference counter to the object is not decremented
causing leaks.
This is hard to spot as it happens only on very low memory situations.
Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Frediano Ziglio [Wed, 3 Jun 2015 11:09:09 +0000 (12:09 +0100)]
drm/qxl: Do not cause spice-server to clean our objects
If objects are moved back from system memory to VRAM (and spice id
created again) memory is already initialized so we need to set flag
to not clear memory.
If you don't do it after a while using desktop many images turns to
black or transparents.
Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Ken Wang [Wed, 3 Jun 2015 13:02:01 +0000 (21:02 +0800)]
drm/amdgpu: add vram_type and vram_bit_width for interface query (v2)
Track the type of vram on the board and provide a query for it.
User mode drivers and tools want this information for determining
bandwidth information and form informational purposes.
v2: fix build when CI support is not enabled
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Christian König [Thu, 28 May 2015 20:02:26 +0000 (22:02 +0200)]
drm/amdgpu: stop loading firmware with pm.mutex locked
Loading firmware is a rather complicated process, in the end we add a
dependency between the pm mutex and the mm semaphore which results in
a harmless but annoying error message.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
monk.liu [Wed, 27 May 2015 06:03:22 +0000 (14:03 +0800)]
drm/amdgpu: remove all sh mem register modification in vm flush
Leave that at the values set during init. No need to update
them repeatedly.
Signed-off-by: monk.liu <monk.liu@amd.com> Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Pass a ttm_placement pointer to amdgpu_bo_create_restricted
add min_offset to amdgpu_bo_pin_restricted. This makes it
easier to allocate memory with address restrictions. With
this patch we can also enable 2-ended allocation again.
v2: fix rebase conflicts
v3: memset placements before using
Christian König [Tue, 19 May 2015 14:08:02 +0000 (16:08 +0200)]
drm/amdgpu: drop allocation flag masks
Not needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
Sonny Jiang [Tue, 12 May 2015 20:13:35 +0000 (16:13 -0400)]
drm/amdgpu: enable uvd dpm and powergating
Enable UVD dpm (dynamic power management) and powergating. UVD dpm dynamically scales the UVD
clocks on demand. Powergating turns off the power to the block when it's not in use.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 6 May 2015 19:20:41 +0000 (15:20 -0400)]
drm/amdgpu: implement VCE two instances support
VCE 3.0 has two indentical instances in the engine, they share
the same registers name in differrent memory block distinguished
by the grbm_gfx_index, we set to master instance after init, it
will dispatch task to slave instance. These two instances will
share the same firmware, but have their own stacks and heaps.
v2: add mutex for using grbm_gfx_index
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
projects / linux-beck.git / log