Peter Ujfalusi [Tue, 3 May 2016 19:07:10 +0000 (22:07 +0300)]
drm/omap: dss: Support for detecting display stack readiness
When omapdss is loaded (all core components are in place) create a list of
devices used in the display graph. This list later can be used by omapdrm
via the omapdss_stack_is_ready() function to check that these components
are loaded. Based on this information, omapdrm can defer probe in case when
the omapdss stack is not ready yet.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Peter Ujfalusi [Mon, 2 May 2016 11:55:38 +0000 (14:55 +0300)]
drm/omap: dss: Functions to check components in the display/output list
The functions can be used to check a component (by it's of_node) if it is
part of the omapdss display or output list. If the component is found, it
means that the driver is loaded.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Mon, 29 Aug 2016 10:15:02 +0000 (13:15 +0300)]
drm/omap: fix replication logic
DSS uses "replication logic" to convert color components from smaller
bit widths to bigger bit widths. Without replication logic, the color
component would be shifted and the least significant bits would be left
at 0, whereas with replication logic, the least significat bits will be
filled with the most significant bit.
For some reason omapdrm leaves replication logic always to off, which,
in the most common case, means that showing 16-bit RGB colors on 24-bit
display gives a bit darker colors than expected.
The reset value of the replication logic bit is enabled, and it should
always be set, as there's no practical reason to disable it. This patch
removes the option to disable it from omapdrm, and always sets it to
enabled in dispc.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tomi Valkeinen [Thu, 5 Nov 2015 18:06:06 +0000 (20:06 +0200)]
drm/omap: remove all EXPORT_SYMBOLs from dispc.c
omapdrm now uses dispc_ops instead of direct function calls so we can
remove all EXPORT_SYMBOLs from dispc. Most of the functions can also be
made static, but a few are used outside dispc.c.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Thu, 5 Nov 2015 16:39:52 +0000 (18:39 +0200)]
drm/omap: use dispc_ops
Change omapdrm to get dispc_ops and use that to call the dispc functions
instead or direct function calls.
The change is very straightforward.
The only problem was in omap_crtc_init() which calls pipe2vbl(crtc), and
at that point of time the crtc->dev link, which is used to get the
dispc_ops, has not been set up yet. This patch makes omap_crtc_init()
skip the call to pipe2vbl() and instead calls
dispc_ops->mgr_get_vsync_irq() directly.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Thu, 5 Nov 2015 17:36:02 +0000 (19:36 +0200)]
drm/omap: add dispc_ops
We want to change the dispc API from plain functions to a struct with
functions pointers, so that omapdrm can call either omapdss or omapdss6
depending on the platform.
This patch adds 'struct dispc_ops' and adds functions to omapdss-base
to set and get the ops.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Thu, 5 Nov 2015 17:54:33 +0000 (19:54 +0200)]
drm/omap: move dispc related dss-feat funcs to dispc
omapdrm still uses a few non-dispc functions: dss_feat_get_num_mgrs(),
dss_feat_get_num_ovls() and dss_feat_get_supported_color_modes(). We
want to provide omapdrm a single dispc_ops function pointer struct so
that omapdrm will use either the current omapdss or the new omapdss6
driver depending on the platform.
Those three functions are really dispc functions, but are located in the
dss_features.c for legacy reasons.
This patch adds similar functionss to the dispc, and changes omapdrm to
use those new functions. Underneath the functions still call the
functions from dss_feature.c.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Tue, 10 Nov 2015 13:50:53 +0000 (15:50 +0200)]
drm/omap: display: don't use dsi_get_pixel_size()
display.c uses dsi_get_pixel_size() which is implemented in the DSI
driver, and we won't have that in the omapdss-base module, to which we
want to move display.c
This patch changes display.c not to use dsi_get_pixel_size(). The call
can be replaced with a simple check for OMAP_DSS_DSI_FMT_RGB565.
We can also make dsi_get_pixel_size() static as it's no longer used
outside dsi.c.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Thu, 5 Nov 2015 15:23:14 +0000 (17:23 +0200)]
drm/omap: move dss_initialized to omapdss-base
omapdss_is_initialized() is used to find out if omapdss has been probed
successfully. This patch moves the related code to the common
omapdss-base module, so that the same support will be there for both
omapdss and omapdss6.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Thu, 5 Nov 2015 15:19:32 +0000 (17:19 +0200)]
drm/omap: add omapdss-base.ko
We are working towards enabling omapdss6, which will consists of a new
dss, dispc and dpi drivers. omapdss6 will be a new module. The panel,
encoder and omapdrm will need to use either the current omapdss driver
or the new omapdss6 driver, depending on the platform.
This will be implemented with a common base module and function
pointers.
This patch adds a skeleton omapdss-base.ko module, to which we'll be
moving common dss functionality like registration of the panels.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Fri, 27 May 2016 10:49:05 +0000 (13:49 +0300)]
drm/omap: fix HDMI sync polarities
While implementing writeback support, odd behavior of WBDELAYCOUNT was
observed with the combination of WB capture and HDMI. The result of the
debugging was that the HDMI sync polarities are not set correctly.
The current code sets the sync polarities going from HDMI WP to DISPC
according to the video mode used, which seems to work normally fine, but
causes problems with WB as WB expects the syncs to be active-high.
This patch changes the HDMI sync polarities so that the DISPC always
gets active-high syncs from HDMI WP, and the HDMI core gets sync
polarities according to the used video mode.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Hemant Hariyani [Tue, 7 Jun 2016 18:23:19 +0000 (13:23 -0500)]
drm/omap: Add support for render nodes
Add support for render nodes in omap driver and allow required
ioctls to be accessible via render nodes.
This enables unprivileged clients to allocate resources like GEM buffers
for rendering their content into. Mode setting (KMS ioctls) is not
allowed using render nodes. These buffers are then shared with
a previleged process (e.g compositor) that has mode setting access.
An example of this use case is Android where the hardware composer is
the only master and has mode setting access. Every other client then
uses render node(e.g /dev/dri/renderD128 to allocate and use its buffers.
Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Wed, 10 Aug 2016 08:04:29 +0000 (11:04 +0300)]
drm/omap: improve DPI clock selection on DRA7xx
The clock source selection for the LCD outputs is too hardcoded at the
moment. For example, LCD3 is set to use PLL2_1, and PLL2 doesn't exist
on DRA72x SoCs.
There are quite many ways to configure the clocks, even using HDMI PLL
for LCD outputs, but enabling full configuration of the clocks is rather
tricky.
This patch improves the situation a bit by checking if the PLL about to
be used exists, and if not, tries another one.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Mon, 8 Aug 2016 10:40:35 +0000 (13:40 +0300)]
drm/omap: remove divider constraint from hsdiv
The driver only uses even dividers for hsdiv when pclk >= 100MHz, as odd
dividers can create uneven duty cycle. However, while this holds true
for some dividers like DISPC's LCK and PCK dividers, it is not actually
true for hsdiv.
hsdiv always produces even duty cycle, so the constraint can be removed.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tomi Valkeinen [Mon, 10 Aug 2015 09:08:50 +0000 (12:08 +0300)]
drm/omap: refactor CRTC HW property setup
The current driver doesn't expose any of the CRTC HW properties like
background color or transparency key, and sets them at CRTC enable time.
Refactor this into a separate function and call that function from
omap_crtc_atomic_flush(). This is the behavior we want when the
properties can be configured, so this patch makes it easier to add
patches later which implement those properties.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Tue, 5 Jan 2016 09:43:13 +0000 (11:43 +0200)]
drm/omap: work-around for errata i886
DRA7 errata i886 (FPDLink PLL Unlocks With Certain SoC PLL M/N Values)
says that FPDLink is sensitive to jitter on the vout clock, and that low
PLL M and N values result in more jitter than high M and N values.
This patch implements a workaround for the problem by changing the PLL
setup to search for clocks starting from high M and N values, instead of
low values. This should not cause any functional change, and only
reduces the jitter.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Dave Airlie [Mon, 3 Apr 2017 06:30:24 +0000 (16:30 +1000)]
Merge tag 'drm-misc-next-2017-03-31' of git://anongit.freedesktop.org/git/drm-misc into drm-next
drm-misc for 4.12:
Core:
- Removed some fb subsampling dimension checks from core (Ville)
- Some MST slot cleanup (Dhinakaran)
- Extracted drm_debugfs.h & drm_ioctl.h from drmP.h (Daniel)
- Added drm_atomic_helper_shutdown() to compliment suspend/resume counterparts
(Daniel)
- Pipe context through legacy modeset to remove legacy_backoff nasties (Daniel)
- Cleanups around vblank as well as allowing lockless counter reads (Chris W.)
- VGA Switcheroo added to MAINTAINERS with Lukas Wunner as reviewer (Lukas)
Drivers:
- Enhancements to rockchip driver probe (Jeffy) and dsi (Chris Z.)
- Thunderbolt external GPU awareness added (Lukas)
* tag 'drm-misc-next-2017-03-31' of git://anongit.freedesktop.org/git/drm-misc: (63 commits)
apple-gmux: Don't switch external DP port on 2011+ MacBook Pros
drm/nouveau: Don't register Thunderbolt eGPU with vga_switcheroo
drm/amdgpu: Don't register Thunderbolt eGPU with vga_switcheroo
drm/radeon: Don't register Thunderbolt eGPU with vga_switcheroo
PCI: Recognize Thunderbolt devices
MAINTAINERS: Add Lukas Wunner as reviewer for vga_switcheroo
drm: Fix locking gotcha in page_flip ioctl
drm: Clarify the role of plane_state argument to drm_simple update().
drm: Clear e after kfree in drm_mode_page_flip_ioctl
drm: Convert cmpxchg(bool) back to a two step operation
drm/bridge: ti-tfp410: support hpd via gpio
drm: use .hword to represent 16-bit numbers
Revert unrelated part of "drm: simplify the locking in the GETCRTC ioctl"
drm: Fixup failure paths in drm_atomic_helper_set_config
drm: Peek at the current counter/timestamp for vblank queries
drm: Refactor vblank sequence number comparison
drm: vblank cannot be enabled if dev->irq_enabled is false
drm: Mark up accesses of vblank->enabled outside of its spinlock
drm: Make the decision to keep vblank irq enabled earlier
drm/atomic-helper: Remove the backoff hack from set_config
...
Dave Airlie [Sun, 2 Apr 2017 06:10:55 +0000 (16:10 +1000)]
Merge branch 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux into drm-next
This series enables atomic mode set for vmwgfx. A number of features and
larger fixes are also included.
* 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux: (22 commits)
drm/vmwgfx: Properly check display/scanout surface size
drm/vmwgfx: Support topology greater than texture size
drm/vmwgfx: Define an overlaid handle_close ioctl.
drm/vmwgfx: Re-implement the stream resource as a simple resource.
drm/vmwgfx: Introduce a simple resource type
drm/vmwgfx: Revert "drm/vmwgfx: Replace numeric parameter like 0444 with macro"
drm/vmwgfx: Fix LDU X blank screen until mode change issue
drm/vmwgfx: Skipping fbdev fb pinning for ldu
drm/vmwgfx: Explicityly track screen target width and height
drm/vmwgfx: Turn on DRIVER_ATOMIC flag
drm/vmwgfx: Switch over to internal atomic API for SOU and LDU
drm/vmwgfx: Switch over to internal atomic API for STDU
drm/vmwgfx: Fixes to vmwgfx_fb
drm/vmwgfx: Add and connect atomic state object check/commit
drm/vmwgfx: Add and connect connector helper function
drm/vmwgfx: Add and connect plane helper functions
drm/vmwgfx: Add and connect CRTC helper functions
drm/vmwgfx: Connector atomic state
drm/vmwgfx: Plane atomic state
drm/vmwgfx: CRTC atomic state
...
Sinclair Yeh [Thu, 23 Mar 2017 22:39:16 +0000 (15:39 -0700)]
drm/vmwgfx: Support topology greater than texture size
Most of the display servers today use a single surface to represent the
entire desktop even if it's stretched across multiple screens.
For vmwgfx with STDU, the maximum surface size is limited to the
maximum texture size on the host. On a 2D VM, this limits our
ability to support configurations with more than one 4K monitor.
To get past this limitation, we will now allow using a large DMA buf
as the framebuffer, and take care of blitting contents from this DMA buf
to the display buffer.
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Øyvind A. Holm [Thu, 23 Mar 2017 21:54:48 +0000 (14:54 -0700)]
drm/vmwgfx: Revert "drm/vmwgfx: Replace numeric parameter like 0444 with macro"
This reverts commit 2d8e60e8b074 ("drm/vmwgfx: Replace numeric
parameter like 0444 with macro")
The commit belongs to the series of 1285 patches sent to LKML on
2016-08-02, it changes the representation of file permissions from the
octal value "0600" to "S_IRUSR | S_IWUSR".
The general consensus was that the changes does not increase
readability, quite the opposite; 0600 is easier to parse mentally than
S_IRUSR | S_IWUSR.
It also causes argument inconsistency, due to commit 04319d89fbec
("drm/vmwgfx: Add an option to change assumed FB bpp") that added
another call to module_param_named() where the permissions are written
as 0600.
Signed-off-by: Øyvind A. Holm <sunny@sunbase.org> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Sinclair Yeh [Thu, 23 Mar 2017 21:41:21 +0000 (14:41 -0700)]
drm/vmwgfx: Skipping fbdev fb pinning for ldu
Pinning fbdev's FB at the start of VRAM prevents X from pinning
its FB. Since for ldu, the fb would be pinned anyway during a
mode set, just skip pinning it in fbdev.
This is not the best solution, but since ldu is not used much
anymore, it seems like a reasonable workaround.
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Sinclair Yeh [Thu, 23 Mar 2017 21:40:04 +0000 (14:40 -0700)]
drm/vmwgfx: Explicityly track screen target width and height
We can no longer make the assumption that vmw_stdu_update_st() will
be called when there's a valid display surface attached. So
instead of using display_srf for width and height, make a record of
these paremeters when the screen target is first defined.
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Sinclair Yeh [Thu, 23 Mar 2017 21:29:22 +0000 (14:29 -0700)]
drm/vmwgfx: Switch over to internal atomic API for STDU
Switch over to using internal atomic API for mode set.
This removes the legacy set_config API, replacing it with
drm_atomic_helper_set_config(). The DRM helper will use various
vmwgfx-specific atomic functions to set a mode.
DRIVER_ATOMIC capability flag is not yet set, so the user mode
will still use the legacy mode set IOCTL.
v2:
* Avoid a clash between page-flip pinning and setcrtc pinning, modify
the page-flip code to use the page-flip helper and the atomic callbacks.
To enable this, we will need to add a wrapper around atomic_commit.
* Add vmw_kms_set_config() to work around vmwgfx xorg driver bug
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Sinclair Yeh [Thu, 23 Mar 2017 21:28:21 +0000 (14:28 -0700)]
drm/vmwgfx: Fixes to vmwgfx_fb
1. When unsetting a mode, num_connector should be set to zero
2. The pixel_format field needs to be initialized as newer DRM internal
functions checks this field
3. Take the drm_modeset_lock_all() because vmw_fb_kms_detach() can
change current mode
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Sinclair Yeh [Thu, 23 Mar 2017 20:14:54 +0000 (13:14 -0700)]
drm/vmwgfx: Add and connect CRTC helper functions
Atomic mode set requires us to refactor existing vmw_stdu_crtc_set_config
code into sections that check the validity of the new mode, and sections
that actually program the hardware state.
vmw_du_crtc_atomic_check() takes CRTC-related checking code. In a later
patch, vmw_du_primary_plane_atomic_check() will take framebuffer-related
checking code.
These helpers won't be called until we flip on the atomic support
flag or set drm_crtc_funcs->set_config to using the atomic
helper.
v2:
* The state->num_connector is actually the total number of potential
connectors, not just the one associated with the display unit.
The proper one to check is ->connector_mask.
* Add the check to only allow plane state to be the same as crtc state
(Thanks to mlankhorst)
* Make sure to turn on SVGA mode before using VRAM. SVGA mode is
disabled in master_drop if dbdev is not running.
v3:
* Moved dot clock override to crtc_atomic_check
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Acked-by: Daniel Vetter <daniel@ffwll.ch>
Sinclair Yeh [Thu, 23 Mar 2017 18:48:44 +0000 (11:48 -0700)]
drm/vmwgfx: Connector atomic state
Add connector handling functions. Start tracking is_implicity in
the connector state. Eventually, this field should be tracked
exclusively in a connector state.
Now that plane and connector states have been created, we can also
activate the code that use CRTC state.
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Sinclair Yeh [Thu, 23 Mar 2017 18:33:39 +0000 (11:33 -0700)]
drm/vmwgfx: CRTC atomic state
Create and Add CRTC state. We currently do not track any properties
or custom states so we can technically use the DRM helpers. Creating
this code just to make potential future additions easier.
Most of the new code will be compiled but not enabled until
plane/connector state handling code is also in place.
This is the first of a series to enable atomic mode set for vmwgfx.
The atomic enabling effort was done in collaboration with Thomas
Hellstrom and the VMware Graphics Team.
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Sinclair Yeh [Thu, 23 Mar 2017 18:28:11 +0000 (11:28 -0700)]
drm/vmwgfx: Add universal plane support
Universal support is prerequisite for atomic mode set.
Explicitly create planes for the cursor and the primary FB. With
a functional cursor plane, the DRM will no longer use the legacy
cursor_set2 and cursor_move entry points.
Signed-off-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Dave Airlie [Fri, 31 Mar 2017 01:47:18 +0000 (11:47 +1000)]
Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next
New stuff for 4.12:
- Preliminary vega10 support
- Support for multi-level page tables
- GPU sensor stuff for mesa
- job tracing improvements
- PRT support for sparse buffers
- Additional SR-IOV improvements
- ttm improvements
- misc bug fixes and code cleanups
* 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (315 commits)
drm/amdgpu: Fix 32bit x86 compilation warning
drm/amdgpu: just disallow reading untouched registers
drm/amdgpu: remove duplicate allowed reg CP_CPF_BUSY_STAT
drm/amdgpu/soc15: enable psp block for SRIOV
drm/amdgpu/soc15: bypass pp block for vf
drm/amdgpu/psp: add check sOS sign
drm/amd/amdgpu: Correct ring wptr address in debugfs (v2)
drm/amdgpu: Fix multi-level page table bugs for large BOs v3
drm/amdgpu: Fix Vega10 VM initialization
drm/amdgpu: Make max_pfn 64-bit
drm/amdgpu: drop GB_GPU_ID from the golden settings
drm/amdgpu: fix vm pte pde flags to 64-bit for sdma (v3)
drm/amd/amdgpu: fix Tonga S3 resume hang on rhel6.8
drm/ttm: decrease ttm bo priority number
drm/amd/amdgpu: fix performance drop when VRAM pressure
drm/amdgpu: Couple small warning fixes
drm/amdgpu: Clean up GFX 9 VM fault messages
drm/amdgpu: Register UTCL2 as a source of VM faults
drm/amdgpu/soc15: drop support for reading some registers
drm/amdgpu/soc15: return cached values for some registers (v2)
...
Lukas Wunner [Fri, 10 Mar 2017 20:23:45 +0000 (21:23 +0100)]
apple-gmux: Don't switch external DP port on 2011+ MacBook Pros
On MacBook Pros introduced 2011 and onward, external DP ports are
combined DP/Thunderbolt ports that are no longer fully switchable
between GPUs, they can only be driven by the discrete GPU.
More specifically, the Main Link pins (which transport the actual video
and audio streams) are soldered to the discrete GPU, whereas the AUX
Channel pins are switchable. Because the integrated GPU is missing the
Main Link, external displays appear to it as phantoms which fail to
link-train.
Force the AUX channel to the discrete GPU on these models to avoid any
confusion. Document the switching policy implemented by this commit.
Lukas Wunner [Fri, 10 Mar 2017 20:23:45 +0000 (21:23 +0100)]
drm/nouveau: Don't register Thunderbolt eGPU with vga_switcheroo
An external Thunderbolt GPU can neither drive the laptop's panel nor be
powered off by the platform, so there's no point in registering it with
vga_switcheroo. In fact, when the external GPU is runtime suspended,
vga_switcheroo will cut power to the internal discrete GPU, resulting in
a lockup.
Lukas Wunner [Fri, 10 Mar 2017 20:23:45 +0000 (21:23 +0100)]
drm/amdgpu: Don't register Thunderbolt eGPU with vga_switcheroo
An external Thunderbolt GPU can neither drive the laptop's panel nor be
powered off by the platform, so there's no point in registering it with
vga_switcheroo. In fact, when the external GPU is runtime suspended,
vga_switcheroo will cut power to the internal discrete GPU, resulting in
a lockup. Moreover AMD's Windows driver special-cases Thunderbolt as
well.
Lukas Wunner [Fri, 10 Mar 2017 20:23:45 +0000 (21:23 +0100)]
drm/radeon: Don't register Thunderbolt eGPU with vga_switcheroo
An external Thunderbolt GPU can neither drive the laptop's panel nor be
powered off by the platform, so there's no point in registering it with
vga_switcheroo. In fact, when the external GPU is runtime suspended,
vga_switcheroo will cut power to the internal discrete GPU, resulting in
a lockup. Moreover AMD's Windows driver special-cases Thunderbolt as
well.
Lukas Wunner [Fri, 10 Mar 2017 20:23:45 +0000 (21:23 +0100)]
PCI: Recognize Thunderbolt devices
Detect on probe whether a PCI device is part of a Thunderbolt controller.
Intel uses a Vendor-Specific Extended Capability (VSEC) with ID 0x1234
on such devices. Detect presence of this VSEC and cache it in a newly
added is_thunderbolt bit in struct pci_dev.
Also, add a helper to check whether a given PCI device is situated on a
Thunderbolt daisy chain (i.e., below a PCI device with is_thunderbolt
set).
The necessity arises from the following:
* If an external Thunderbolt GPU is connected to a dual GPU laptop,
that GPU is currently registered with vga_switcheroo even though it
can neither drive the laptop's panel nor be powered off by the
platform. To vga_switcheroo it will appear as if two discrete
GPUs are present. As a result, when the external GPU is runtime
suspended, vga_switcheroo will cut power to the internal discrete GPU
which may not be runtime suspended at all at this moment. The
solution is to not register external GPUs with vga_switcheroo, which
necessitates a way to recognize if they're on a Thunderbolt daisy
chain.
* Dual GPU MacBook Pros introduced 2011+ can no longer switch external
DisplayPort ports between GPUs. (They're no longer just used for DP
but have become combined DP/Thunderbolt ports.) The driver to switch
the ports, drivers/platform/x86/apple-gmux.c, needs to detect presence
of a Thunderbolt controller and, if found, keep external ports
permanently switched to the discrete GPU.
v2: Make kerneldoc for pci_is_thunderbolt_attached() more precise,
drop portion of commit message pertaining to separate series.
(Bjorn Helgaas)
Lukas Wunner [Mon, 27 Mar 2017 16:48:24 +0000 (18:48 +0200)]
MAINTAINERS: Add Lukas Wunner as reviewer for vga_switcheroo
I've been contributing to vga_switcheroo for the past two years and by
now am fairly familiar with it, so danvet suggested that I add myself
as reviewer.
While at it, add missing file pattern for vga_switcheroo.h + vgaarb.h
to the DRM and DRM-MISC sections such that get_maintainer.pl returns
dri-devel@ and the drm-misc maintainers.
Daniel Vetter [Thu, 30 Mar 2017 20:48:31 +0000 (22:48 +0200)]
drm: Fix locking gotcha in page_flip ioctl
We want to lock the primary plane, not the cursor (which might be
optional). Real bad case of copy-paste fail, unfortunately our CI
didn't catch that because i915 does have a cursor plane.
Reported-by: Eric Anholt <eric@anholt.net> Fixes: 29dc0d1de182 ("drm: Roll out acquire context for the page_flip ioctl") Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Sean Paul <seanpaul@chromium.org> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170330204831.8225-1-daniel.vetter@ffwll.ch Tested-by: Eric Anholt <eric@anholt.net> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Alex Xie [Thu, 30 Mar 2017 17:30:00 +0000 (13:30 -0400)]
drm/amdgpu: Fix 32bit x86 compilation warning
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c:187:2: warning: right shift count >= width of type [enabled by default]
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:173:2: warning: right shift count >= width of type [enabled by default]
drivers/gpu/drm/amd/amdgpu/vega10_ih.c:106:3: warning: right shift count >= width of type [enabled by default]
v2: Add a space between "&" and "0xff"
Reported by: kbuild-all@01.org
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Anholt [Mon, 20 Mar 2017 23:36:15 +0000 (16:36 -0700)]
drm: Clarify the role of plane_state argument to drm_simple update().
Like the atomic update hook it's wrapping, the plane_state is the old
one, and the new one is in plane->state. Both msxfb and tinydrm use
it correctly, but I mistook it for the new state in pl111 due to its
naming.
Christian König [Fri, 24 Mar 2017 13:32:50 +0000 (14:32 +0100)]
drm/amdgpu: just disallow reading untouched registers
Not sure what the original intention was here, but returning a random piece of
kernel memory to userspace because we didn't set the value at all is clearly
not a good idea.
This patch disallows reading the register and returns
a proper error code instead.
Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Remove duplicate mmCP_CPF_BUSY_STAT from the allowed registers.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Daniel Vetter [Thu, 30 Mar 2017 13:32:53 +0000 (15:32 +0200)]
drm: Clear e after kfree in drm_mode_page_flip_ioctl
With the explicit retry loop static analyzers get confused by the
control flow and believe that e could be accessed after kfree. That's
not possible, but it's non-obvious, so let's clear it to NULL.
We already cleared e = NULL at the top of the function, so this is all
in line.
Cc: Julia Lawall <julia.lawall@lip6.fr> Reported-by: Julia Lawall <julia.lawall@lip6.fr> Fixes: 29dc0d1de182 ("drm: Roll out acquire context for the page_flip ioctl") Cc: Harry Wentland <harry.wentland@amd.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Sean Paul <seanpaul@chromium.org> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170330133253.29500-1-daniel.vetter@ffwll.ch
Chris Wilson [Thu, 30 Mar 2017 14:08:32 +0000 (15:08 +0100)]
drm: Convert cmpxchg(bool) back to a two step operation
ARM v6 (at least) only allows cmpxchg on 32bit variables which doesn't
always include the bool type.
drivers/built-in.o: In function `vblank_disable_and_save':
imx-ocotp.c:(.text+0xb45e8): undefined reference to `__bad_cmpxchg'
Makefile:986: recipe for target 'vmlinux' failed
Reported-by: kbuild test robot <fengguang.wu@intel.com> Reported-by: Leonard Crestez <leonard.crestez@nxp.com> Fixes: 43dc7fe2b211 ("drm: Mark up accesses of vblank->enabled outside of its spinlock") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170330140832.32377-1-chris@chris-wilson.co.uk
On some boards the hpd pin of a hdmi connector is wired up to a gpio
pin. Since in the DRM world the tfp410 driver is responsible for
handling the connector, add support for hpd gpios in this very driver.
Javi Merino [Wed, 29 Mar 2017 13:45:23 +0000 (14:45 +0100)]
drm: use .hword to represent 16-bit numbers
The size of .word is the size of a word in the given platform, which
for intel systems is 16-bits but other architectures use different
sizes. However, .hword emits 16-bit numbers regardless of the
platform (and despite the name). The quantities specified in EDID are
platform independent, so they should work in spite of the default
target of the cc you are using, so use .hword where EDID specifies
16-bit numbers.
Revert unrelated part of "drm: simplify the locking in the GETCRTC ioctl"
v2 of the commit 2c77bb29d398 ("drm: simplify the locking in the GETCRTC ioctl")
accidentally introduced a unrelated change in intel_display.c, revert the
unrelated change.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes: 2c77bb29d398 ("drm: simplify the locking in the GETCRTC ioctl") Reported-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/6be47261-475f-c190-af56-c136677246d9@linux.intel.com
Daniel Vetter [Wed, 29 Mar 2017 17:41:36 +0000 (19:41 +0200)]
drm: Fixup failure paths in drm_atomic_helper_set_config
I've screwed this up when removing the legacy backoff hack.
Fixes: 38b6441e4e75 ("drm/atomic-helper: Remove the backoff hack from set_config") Cc: Harry Wentland <harry.wentland@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170329174136.10330-1-daniel.vetter@ffwll.ch
Xiangliang Yu [Tue, 28 Feb 2017 09:26:40 +0000 (17:26 +0800)]
drm/amdgpu/soc15: bypass pp block for vf
Disable pp block if device is vf.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 29 Mar 2017 17:01:30 +0000 (13:01 -0400)]
drm/amd/amdgpu: Correct ring wptr address in debugfs (v2)
On gfx9 hardware the value is not wrapped and is a 64-bit value. So
we reduce it modulo the ring size.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
(v2) use buf_mask instead of computing on the fly
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Wed, 29 Mar 2017 00:36:12 +0000 (20:36 -0400)]
drm/amdgpu: Fix multi-level page table bugs for large BOs v3
Fix the start/end address calculation for address ranges that span
multiple page directories in amdgpu_vm_alloc_levels.
Add error messages if page tables aren't found. Otherwise the page
table update would just fail silently.
v2:
* Change WARN_ON to WARN_ON_ONCE
* Move masking of high address bits to caller
* Add range-check for "from" and "to"
v3:
* Replace WARN_ON_ONCE in get_pt with pr_err in caller
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Wed, 29 Mar 2017 00:31:20 +0000 (20:31 -0400)]
drm/amdgpu: Fix Vega10 VM initialization
adev->family is not initialized yet when amdgpu_get_block_size is
called. Use adev->asic_type instead.
Minimum VM size is 512GB, not 256GB, for a single page table entry
in the root page table.
gmc_v9_0_vm_init is called after adev->vm_manager.max_pfn is
initialized. Move the minimum VM-size enforcement ahead of max_pfn
initializtion. Cast to 64-bit before the left-shift.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Wed, 29 Mar 2017 00:24:53 +0000 (20:24 -0400)]
drm/amdgpu: Make max_pfn 64-bit
With 4-level page tables the maximum VM size is 256TB. That's 64G
pages, which can't be represented in 32-bit.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 22 Mar 2017 09:29:45 +0000 (10:29 +0100)]
drm/amdgpu: drop GB_GPU_ID from the golden settings
That register is marked deprecated, reading it results in a bus error.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Junwei Zhang [Tue, 28 Mar 2017 08:52:07 +0000 (16:52 +0800)]
drm/amdgpu: fix vm pte pde flags to 64-bit for sdma (v3)
v2: fix for all sdma engines
v3: squash in fix for SI/CI
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jim Qu [Tue, 28 Mar 2017 09:18:15 +0000 (17:18 +0800)]
drm/amd/amdgpu: fix Tonga S3 resume hang on rhel6.8
1. security firmware loading has moved to sw init, so this code
is useless.
2. it seems that driver could not call request_firmware on
kernel 2.6, when S3 resume. for request firmware depends on
userspace, at this time, userspace is freeze.
Signed-off-by: Jim Qu <Jim.Qu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger.He [Tue, 28 Mar 2017 01:34:16 +0000 (09:34 +0800)]
drm/ttm: decrease ttm bo priority number
decrease and also reserve priority number for KFD using
Signed-off-by: Roger.He <Hongbo.He@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger.He [Mon, 27 Mar 2017 11:38:11 +0000 (19:38 +0800)]
drm/amd/amdgpu: fix performance drop when VRAM pressure
When VRAM pressue and trigger huge evictions there is performance drop,
this patch fix it.
Signed-off-by: Roger.He <Hongbo.He@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 28 Mar 2017 15:29:53 +0000 (11:29 -0400)]
drm/amdgpu: Couple small warning fixes
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Tue, 28 Mar 2017 17:42:31 +0000 (13:42 -0400)]
drm/amdgpu: Clean up GFX 9 VM fault messages
Clean up the VM fault message format and use rate-limiting similar
to other ASICs.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Tue, 28 Mar 2017 17:41:11 +0000 (13:41 -0400)]
drm/amdgpu: Register UTCL2 as a source of VM faults
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 27 Mar 2017 18:40:36 +0000 (14:40 -0400)]
drm/amdgpu/soc15: drop support for reading some registers
The RB harvest registers are not necessary, the driver already
exposes this info via the info ioctl. GB_BACKEND_MAP has
been deprecated since SI and is not relevant to the RB mapping.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 28 Mar 2017 16:19:31 +0000 (12:19 -0400)]
drm/amdgpu: refine the logic in amdgpu_need_post()
We check the mem config register to make sure it's been
programmed by the vbios to determine if we need to post
so we check for a non-0 value. However, when the asic
comes out of reset, we may see all ones here, so check
for that too.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 15 Mar 2017 04:18:57 +0000 (12:18 +0800)]
drm/amdgpu:changes in gfx DMAframe scheme (v2)
1) Adapt to vulkan:
Now use double SWITCH BUFFER to replace the 128 nops w/a,
because when vulkan introduced, umd can insert 7 ~ 16 IBs
per submit which makes 256 DW size cannot hold the whole
DMAframe (if we still insert those 128 nops), CP team suggests
use double SWITCH_BUFFERs, instead of tricky 128 NOPs w/a.
2) To fix the CE VM fault issue when MCBP introduced:
Need one more COND_EXEC wrapping IB part (original one us
for VM switch part).
this change can fix vm fault issue caused by below scenario
without this change:
>CE passed original COND_EXEC (no MCBP issued this moment),
proceed as normal.
>DE catch up to this COND_EXEC, but this time MCBP issued,
thus DE treats all following packages as NOP. The following
VM switch packages now looks just as NOP to DE, so DE
dosen't do VM flush at all.
>Now CE proceeds to the first IBc, and triggers VM fault,
because DE didn't do VM flush for this DMAframe.
3) change estimated alloc size for gfx9.
with new DMAframe scheme, we need modify emit_frame_size
for gfx9
4) No need to insert 128 nops after gfx8 vm flush anymore
because there was double SWITCH_BUFFER append to vm flush,
and for gfx7 we already use double SWITCH_BUFFER following
after vm_flush so no change needed for it.
5) Change emit_frame_size for gfx8
v2: squash in BUG removal from Monk
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
those MC_VM registers won't be programed by VBIOS in VF
so driver is responsible to programe them.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 23 Mar 2017 08:10:04 +0000 (16:10 +0800)]
drm/amdgpu:fix ring_write_multiple
ring_write_multiple should use buf_mask instead of ptr_mask
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 22 Mar 2017 10:01:59 +0000 (18:01 +0800)]
drm/amdgpu:fix gmc_v9 vm fault process for SRIOV
for SRIOV we cannot use access register when in IRQ routine
with regular KIQ method
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 22 Mar 2017 10:02:40 +0000 (18:02 +0800)]
drm/amdgpu:no cg for soc15 of SRIOV
no CG for SRIOV on SOC15
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 21 Mar 2017 10:58:53 +0000 (18:58 +0800)]
drm/amdgpu:two fixings for sdma v4 for SRIOV
no hw_fini for SRIOV, otherwise other VF will be affected
no CG for SRIOV
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 24 Feb 2017 04:06:22 +0000 (12:06 +0800)]
drm/amdgpu:change sequence of SDMA v4 init
must set minor_update.enable before write smaller value
to wptr/doorbell, so for sriov we need set that register
bit in hw_init period.
this could fix the SDMA ring test fail after guest reboot
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 21 Mar 2017 10:48:45 +0000 (18:48 +0800)]
drm/amdgpu:fix ring init sequence
ring->buf_mask need be set prior to ring_clear_ring invoke
and fix ring_clear_ring as well which should use buf_mask
instead of ptr_mask
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 21 Mar 2017 08:41:01 +0000 (16:41 +0800)]
drm/amdgpu:virt_init_setting invoke is missed!
this must be invoked during early init
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 8 Mar 2017 07:38:54 +0000 (15:38 +0800)]
uapi/drm:add new flag for Preemption
when MCBP supported, we will set pre_enb bit for those
IBs with PREEMPT flag tagged
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 8 Mar 2017 07:37:00 +0000 (15:37 +0800)]
uapi/drm:change Preamble Description
Preamble in linux doesn't mean it is CE PREAMBLE IB,
instead it means this IB could be dropped if no
ctx switch happens.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 8 Mar 2017 07:53:19 +0000 (15:53 +0800)]
drm/amdgpu:enable MCBP for SR-IOV (v2)
Apply the new IB during IB emit for SRIOV with MCBP
v2: agd: use define instead of magic number
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 21 Mar 2017 03:50:43 +0000 (11:50 +0800)]
drm/amdgpu:enable mcbp for gfx9(v2)
set bit 21 of IB.control filed to actually enable
MCBP for SRIOV
v2:
add flag for preemption enable bit for soc15 and use
this flag instead of hardcode.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 24 Mar 2017 04:07:52 +0000 (12:07 +0800)]
drm/amdgpu:implement cond_exec for gfx8
when MCBP enabled for gfx8, the cond_exec must also
be implemented, otherwise there will be odds to meet
cross engine (ce and me) deadlock when world switch
happens.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 8 Mar 2017 07:51:13 +0000 (15:51 +0800)]
drm/amdgpu:protect cs submit
to prevent submit two or more IBs with PREEMPT flags.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / karo-tx-linux.git / log