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11 years agoENGR00174974 [MX6]Fix CPU hotplug platform related issue
Anson Huang [Wed, 23 May 2012 01:38:29 +0000 (09:38 +0800)]
ENGR00174974 [MX6]Fix CPU hotplug platform related issue

We need to turn of cache coherency of secondary core before
it is disable by core0, otherwise, the secondary core may be
waked by cache sync, and if it exit from wfi and access BUS,
meanwhile, core0 disable it from hardware, the whole SOC would
hang.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00210126 IPU: reconsolidate IPU clock enable/disable API
Wayne Zou [Mon, 21 May 2012 08:09:24 +0000 (16:09 +0800)]
ENGR00210126 IPU: reconsolidate IPU clock enable/disable API

Consolidate IPU clock enable/disable API by using clk_enable/clk_disable
directly.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00210360 - EPDC: Fix regulator-related EPDC failure on MX6SL ARM2 CPU board
Robby Cai [Tue, 22 May 2012 08:55:18 +0000 (16:55 +0800)]
ENGR00210360 - EPDC: Fix regulator-related EPDC failure on MX6SL ARM2 CPU board

Its similar to ENGR00178581.
Remove call to regulator_has_full_constraints() from Max17135 EPD PMIC
initialization code, since leaving it enabled results in a failure of
system to load properly - key regulators are disabled when 'epdc' is added
to the kernel command line.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00209739-5 WM8962: check DMIC status
Gary Zhang [Tue, 22 May 2012 03:03:41 +0000 (11:03 +0800)]
ENGR00209739-5 WM8962: check DMIC status

if there are no amic_detect pin, by checking
DMIC pin status to get to know which mic is used

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00210075-3 - SPDC: Add Sipix driver
Fugang Duan [Sat, 19 May 2012 03:17:03 +0000 (11:17 +0800)]
ENGR00210075-3 - SPDC: Add Sipix driver

Add Sipix driver for electronic paper dispaly
- Support RGB565 & Y4 formats with 800x600 resolution
- Support synchronization update by waiting the last
  request update completed.
- Support automated update using Linux deferred io mechanism
- Support for panning(y-direction)
- Support rotation with 90,180,and 270 degree.
- Initial integration with ePXP, output Y4 format
- Support specific waveform modes update.
- Support Snapshot, Queue and Queue Merge update sheeme.
- Support full and partial EPD screen updates.
  mode_1 & mode_2: partial update
  mode_0 & mode_3: full update
- Align waveform mode with EPDC as below:
  mode_init = mode_0;
  mode_gc4  = mode_2;
  mode_A2   = mode_4, mode_du =mode_4;
  mode_gc8  = mode_1, mode_gc16 = mode_1, mode_gc32 = mode_1;

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00210271 - PWM1 pad incorrectly configured by EPDC driver
Danny Nold [Tue, 22 May 2012 01:48:35 +0000 (20:48 -0500)]
ENGR00210271 - PWM1 pad incorrectly configured by EPDC driver

- Remove configuration of PWM1 pad for EPDC.  Was there for debug purposes,
but caused problems with LCD support.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00210075-2 - MX6SL MSL: Add SPDC in imx6s_defconfig
Fugang Duan [Sat, 19 May 2012 03:01:54 +0000 (11:01 +0800)]
ENGR00210075-2 - MX6SL MSL: Add SPDC in imx6s_defconfig

 Add Sipix panel option in imx6s_defconfig file

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00210075-1 - MX6SL MSL: Add SPDC support for MX6SoloLite ARM2 board
Fugang Duan [Sat, 19 May 2012 02:36:46 +0000 (10:36 +0800)]
ENGR00210075-1 - MX6SL MSL: Add SPDC support for MX6SoloLite ARM2 board

- Add IOMUX pad config defines and GPIO defines
- Add platform device/data for SPDC
- Add IRQ number define for SPDC

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00209994-2 : imx6sl: remove repeated ePxP device register.
Fugang Duan [Sat, 19 May 2012 07:30:46 +0000 (15:30 +0800)]
ENGR00209994-2 : imx6sl: remove repeated ePxP device register.

- remove repeated ePXP device register.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00209739-4 add AUDMUX/SDMA support for MX6SL
Gary Zhang [Mon, 21 May 2012 10:39:05 +0000 (18:39 +0800)]
ENGR00209739-4 add AUDMUX/SDMA support for MX6SL

check CONFIG_ARCH_MX6 to replace cpu type

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00209739-3 MX6DQ/DL_SABRESD: operate WM8962 MCLK by callback
Gary Zhang [Mon, 21 May 2012 10:34:26 +0000 (18:34 +0800)]
ENGR00209739-3 MX6DQ/DL_SABRESD: operate WM8962 MCLK by callback

operate WM8962 MCLK by callback

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00209739-2 MX6SL_ARM2: add wm8962 support
Gary Zhang [Mon, 21 May 2012 10:29:43 +0000 (18:29 +0800)]
ENGR00209739-2 MX6SL_ARM2: add wm8962 support

add wm8962 codec support for mx6sl arm2

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00209739-1 WM8962: add support for MX6 SL
Gary Zhang [Mon, 21 May 2012 10:25:22 +0000 (18:25 +0800)]
ENGR00209739-1 WM8962: add support for MX6 SL

1. add support for mx6 sl
2. operate clock by callback

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00210160: [mx6]: mmc/sd illegal func call "clk_enable" in intr context
Ryan QIAN [Mon, 21 May 2012 09:24:42 +0000 (17:24 +0800)]
ENGR00210160: [mx6]: mmc/sd illegal func call "clk_enable" in intr context

issue:
calling clk_enable in an interrupt context which will cause kernel bug.

- It is a temp workaround for calling 'clk_enable' in an interrupt context.
By redefine SDHCI_USE_LEDS_CLASS to SDHCI_USE_LEDS_CLASS_BROKEN to exclude
led ctrl support, it does not support mmc/sd LED ctrl with this patch.

- Per current driver structure, it's difficult to fix this issue in driver
layer. The fix for this issue needs adjustment to current driver structure
and using new clock management in kernel interface.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00209716-2 Revert "ENGR00209022 Update gpu clock management code"
Loren Huang [Mon, 21 May 2012 07:32:25 +0000 (15:32 +0800)]
ENGR00209716-2 Revert "ENGR00209022 Update gpu clock management code"

This code is in 4.6.8 package.
This patch will cause suspend/resume failure
and data abort for vg applications.

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00209716-1 Merge vivante 4.6.8 kernel part code
Loren Huang [Thu, 17 May 2012 17:15:35 +0000 (01:15 +0800)]
ENGR00209716-1 Merge vivante 4.6.8 kernel part code

Merge vivante 4.6.8 kernel part code

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00180768 sd:detect some sd2.0 cards to sd1.0
B38613 [Wed, 25 Apr 2012 05:51:44 +0000 (13:51 +0800)]
ENGR00180768 sd:detect some sd2.0 cards to sd1.0

when SD_SPEC=2, no matter Physical Layer Spec v3.0
is supported or not, should both be recognized as
SD2.0card.

Signed-off-by: Zhou Jianzheng <B38613@freescale.com>
(cherry picked from commit 59f5c06bba9e426326346fc00c1524cb789d695a)

11 years agoENGR00209062-2: mx6dq and mx6dl dual camera support
Wu Guoxing [Mon, 21 May 2012 01:24:29 +0000 (09:24 +0800)]
ENGR00209062-2: mx6dq and mx6dl dual camera support

dual camera support for mx6q and mx6dl:
1. let mipi and parallel camera working on different csi
2. the two camera can work independently and synchronously
3. the two camera will be registered and different video
   device(/dev/video0, /dev/video1)
4. when both camera are working, the can not use the same
   ipu channel, that is, when camera one using PRP_ENC_MEM
   or PRP_VF_MEM channel, the other one can only use CSI_MEM

   this is the driver part.

Signed-off-by: Wu Guoxing <b39297@freescale.com>
11 years agoENGR00209062-1: mx6dq and mx6dl dual camera support
Wu Guoxing [Mon, 21 May 2012 01:21:12 +0000 (09:21 +0800)]
ENGR00209062-1: mx6dq and mx6dl dual camera support

dual camera support for mx6q and mx6dl:
1. let mipi and parallel camera working on different csi
2. the two camera can work independently and synchronously
3. the two camera will be registered and different video
   device(/dev/video0, /dev/video1)
4. when both camera are working, the can not use the same
   ipu channel, that is, when camera one using PRP_ENC_MEM
   or PRP_VF_MEM channel, the other one can only use CSI_MEM

   this is the arch part changes.

Signed-off-by: Wu Guoxing <b39297@freescale.com>
11 years agoENGR00209501 [MX6]Support different platforms DDR IO setting in DSM
Anson Huang [Fri, 18 May 2012 11:58:25 +0000 (19:58 +0800)]
ENGR00209501 [MX6]Support different platforms DDR IO setting in DSM

As Mx6 dq, dl and sl have different DDR IO address, so
we need to do the DDR IO low power setting according
to different CPU type.

Also, Mx6sl has some different config in DSM, need to
separate it from other platforms.

Change mx6q_suspend to mx6_suspend, as it is a common
thing for all mx6 platforms.

Add rtc driver for mxsl platform to support suspend/resume test.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00209621 MX6-Fixed random CON_ACK stall
Ranjani Vaidyanathan [Mon, 7 May 2012 19:28:49 +0000 (14:28 -0500)]
ENGR00209621 MX6-Fixed random CON_ACK stall

DLL ON/OFF code randomly hangs waiting for the CON_ACK bit
to be set when a CON_REQ is asserted.
Fix this by adding a delay after the MMDC automatic power savings
mode is disabled.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00209846 MX6SL-Enable DVFS_CORE on all MX6 platforms
Ranjani Vaidyanathan [Mon, 14 May 2012 21:12:59 +0000 (16:12 -0500)]
ENGR00209846 MX6SL-Enable DVFS_CORE on all MX6 platforms

Add support DVFS-CORE to MX6Sololite.
Set PLL1 in bypass mode when ARM freq drops below 400MHz.
ARM will be sourced from PLL2_PFD2_400M in this case.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00209617 MX6x - Add WAIT mode workaround
Ranjani Vaidyanathan [Wed, 16 May 2012 17:43:27 +0000 (12:43 -0500)]
ENGR00209617 MX6x - Add WAIT mode workaround

To avoid the ARM from accepting an interrupt in the dangerous
window, reduce the ARM core freq just before the sytem is
about to enter WAIT state.
Reduce the ARM freq so as to maintain 12:5 ARM_CLK to IPG
ratio. Use the ARM_PODF to drop the frequency.
In a multicore case the frequency is dropped only when all the
4 cores are going to be in WFI.

In case of single core environment, its easy to drop the ARM core
freq just before WFI since there is no need to identify the state of
the other cores.

Some other points to note:
1. If "mem_clk_on" is added to the command line, the memory clocks will
not be gated in WAIT mode. This will increase the system IDLE power.
This mode is valid only on MX6sl, MX6DQ TO1.2 and MX6DL TO1.1.
2. In case the IPG clk is too low (for ex 50MHz) and ARM is at 1GHz,
we cannot match the 12:5 ratio using ARM_PODF only. In this case,
donot clock gate the memories in WAIT mode (available on MX6SL,
MXDQ TO1.2 and MXDL TO1.1). For MXDQ TO1.1 and MX6DL TO1.0, disable
system wide WAIT entry in this case.

In STOP mode, always ensure that the memory clocks are gated, else
power impact will be significant.

WAIT mode is enabled by default with this commit.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00210003: imx6sl: add SPI support
Robby Cai [Fri, 18 May 2012 10:45:41 +0000 (18:45 +0800)]
ENGR00210003: imx6sl: add SPI support

- configure the pinmux for SPI module working.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00209994: imx6sl: add ePxP support
Robby Cai [Fri, 18 May 2012 10:31:50 +0000 (18:31 +0800)]
ENGR00209994: imx6sl: add ePxP support

add ePxP support on ARM2 board

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00209883-2 - EPDC fb: Add support for MX 6SoloLite SoC
Danny Nold [Thu, 17 May 2012 20:22:51 +0000 (15:22 -0500)]
ENGR00209883-2 - EPDC fb: Add support for MX 6SoloLite SoC

- Add support for TCE source buffer in EPDC v2.1
- Remove debug code

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00209883-1 - EPDC fb: Add support for MX 6SoloLite ARM2 board
Danny Nold [Thu, 17 May 2012 20:17:37 +0000 (15:17 -0500)]
ENGR00209883-1 - EPDC fb: Add support for MX 6SoloLite ARM2 board

- Add EPDC and Max17135 structures and initialization calls to
the MX6SL ARM2 board file
- Add IOMUX configuration defines and GPIO defines for EPDC/Max17135
- Remove prints/debug from EPDC-related clocks.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00209978-2: imx6sl: lcdif: update driver part
Robby Cai [Fri, 18 May 2012 10:11:16 +0000 (18:11 +0800)]
ENGR00209978-2: imx6sl: lcdif: update driver part

- use new console lock/unlock

Board Rework Needed:
 - remove R572, R569, R611 to eliminate conflict with FEC modules.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00209978-1: imx6sl: lcdif: add msl codes for lcdif
Robby Cai [Fri, 18 May 2012 09:26:02 +0000 (17:26 +0800)]
ENGR00209978-1: imx6sl: lcdif: add msl codes for lcdif

- update LCDIF pinmux setting (and pad ctrl setting)
- correct LCDIF pixel clock setting
- add platform device/data for lcdif

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00209686-2:sdio:suspend/resume issue
B38613 [Fri, 18 May 2012 10:15:56 +0000 (18:15 +0800)]
ENGR00209686-2:sdio:suspend/resume issue

1.add MMC_PM_WAKE_SDIO_IRQ capability, it should be
used together with MMC_PM_KEEP_POWER although not support
SDIO wakeup in function.
2.add MMC_CAP_NONREMOVABLE to describe imx6's three sdhc
devices's removable feature.Now emmc is permanent,sdio and
sd is removable instead of all default were permanent before.
According to this feature, detimine whether reinit card
or not in resume.

Signed-off-by: B38613 <B38613@freescale.com>
11 years agoENGR00209686-1:sdio:suspend/resume issue
B38613 [Fri, 18 May 2012 10:14:56 +0000 (18:14 +0800)]
ENGR00209686-1:sdio:suspend/resume issue

1.add MMC_PM_WAKE_SDIO_IRQ capability, it should be
used together with MMC_PM_KEEP_POWER although not support
SDIO wakeup in function.
2.add MMC_CAP_NONREMOVABLE to describe imx6's three sdhc
devices's removable feature.Now emmc is permanent,sdio and
sd is removable instead of all default were permanent before.
According to this feature, detimine whether reinit card
or not in resume.

Signed-off-by: B38613 <B38613@freescale.com>
11 years agoENGR00209910 Mfg: Add support for MX6SL
Frank Li [Fri, 18 May 2012 04:50:53 +0000 (12:50 +0800)]
ENGR00209910 Mfg: Add support for MX6SL

Using the same config for all mx6 chip for mfgtools

Signed-off-by: Frank Li <Frank.Li@freescale.com>
11 years agoENGR00182769 HDMI: No sound when playing audio in 480p mode
Sandor Yu [Thu, 17 May 2012 07:28:54 +0000 (15:28 +0800)]
ENGR00182769 HDMI: No sound when playing audio in 480p mode

It is cause by HDMI audio driver can't get right pixel clock
from IPU driver if pixel clock source from HSP clock not from
DI clock.
HDMI driver get pixel clock by call clk_get_rate() function,
but the function return actually clock, in some videomode the
actually pixel clock is not right equal the pixel clock in CEA spec.

Get pixel clock from video mode struct instead of CCM register.
480P HDMI audio can work.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00209557 IMX6: GPU: do not reserve memory when GPU is not enabled
Huang Shijie [Wed, 16 May 2012 10:39:14 +0000 (18:39 +0800)]
ENGR00209557 IMX6: GPU: do not reserve memory when GPU is not enabled

The current code will reserve 128M for GPU even when it is not enabled.

It is not needed. So do not reserve the memory when the GPU is not enabled.
(this can save 128M for Mfgtool.)

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00209384-4 mxc_spdif: disable sym_err isr
Adrian Alonso [Wed, 16 May 2012 22:34:24 +0000 (17:34 -0500)]
ENGR00209384-4 mxc_spdif: disable sym_err isr

* Disable symbol error interrupt when rx dpll is unlocked
  This means that no spdif Rx data had been identified and
  driver will keep issuing sym_err interrupt request.
* Add check to only execute capture_start/stop
  functions if rx_active is set.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.
Ranjani Vaidyanathan [Thu, 17 May 2012 04:41:47 +0000 (23:41 -0500)]
ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.

Set CPU_CLK to be 1GHz at boot and ABH_CLK to be 132MHz.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00209710 MX6 IPUv3 fb:Show display dev name property
Liu Ying [Thu, 17 May 2012 06:56:24 +0000 (14:56 +0800)]
ENGR00209710 MX6 IPUv3 fb:Show display dev name property

1) Show display device name property:
   HDMI monitor - hdmi
   DVI monitor - dvi
   VGA monitor - vga
   dumb LCD panel - lcd
   LVDS panel - ldb
   MIPI LCD panel - mipi_dsi
   TVout - tve
2) Make fsl_disp_property device attribution be static.
3) Support overlay fb fsl_disp_property and
   fsl_disp_dev_property device attributions.
4) Remove fsl_disp_property and fsl_disp_dev_property
   device attributions when removing the driver.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
11 years agoENGR00209633-2 I2C mx6sl pfuze: add pfuze board support for mx6sl arm2
Robin Gong [Thu, 17 May 2012 06:19:01 +0000 (14:19 +0800)]
ENGR00209633-2 I2C mx6sl pfuze: add pfuze board support for mx6sl arm2

1.add pmic board support file
2.add i2c support on board-mx6sl_arm2.c
3.update IOMUX setting for I2C pin for mx6sl arm2 board
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00209633-1 pfuze:pfuze driver support to mx6sl_arm2 which not use interrupt
Robin Gong [Thu, 17 May 2012 04:29:38 +0000 (12:29 +0800)]
ENGR00209633-1 pfuze:pfuze driver support to mx6sl_arm2 which not use interrupt

because mx6sl arm2 board didn't use pfuse INT, pfuze driver should judge if no
interrupt.
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00209529 WM8962: registry detect pin handler more late
Gary Zhang [Wed, 16 May 2012 09:32:13 +0000 (17:32 +0800)]
ENGR00209529 WM8962: registry detect pin handler more late

move hp/mic detect pin handler from imx_wm8962_probe()
to imx_wm8962_init().

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00209570 - PxP : Add Y4 output format.
Fugang Duan [Wed, 16 May 2012 11:50:14 +0000 (19:50 +0800)]
ENGR00209570 - PxP : Add Y4 output format.

- Add Y4 output format for SPDC.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00209480-6 mx6sl_usb : fix build error
Tony LIU [Thu, 17 May 2012 01:46:38 +0000 (09:46 +0800)]
ENGR00209480-6 mx6sl_usb : fix build error

fix build error

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00209620 MX6-Disable PU Brown out detection in low power mode.
Ranjani Vaidyanathan [Wed, 16 May 2012 17:24:28 +0000 (12:24 -0500)]
ENGR00209620 MX6-Disable PU Brown out detection in low power mode.

Ensure that the brown out detection of the PU regulator is
disabled before the regulator itself is disabled.
Keeping the detection enabled will generate an interrupt that
is not currently being handled in the BSP when the regulator is
disabled since its voltage is dropped to 0V. This will prevent
the system from entering complete WAIT state thus increasing the
power in the low power idle/audio usecase.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00209384-3 mxc_spdif: capture playback stop function
Adrian Alonso [Mon, 14 May 2012 23:54:14 +0000 (18:54 -0500)]
ENGR00209384-3 mxc_spdif: capture playback stop function

* Add capture/playback stop function
  Stops capture/playback process

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00209384-2 mxc_spdif: capture playback start function
Adrian Alonso [Mon, 14 May 2012 23:50:53 +0000 (18:50 -0500)]
ENGR00209384-2 mxc_spdif: capture playback start function

* Add start capture/playback function
  Start sequence for capturing/playing audio data.
* Remove caprure/playback prepere function hwd initialization
  handled by trigger function when user/app starts capture/play
  process.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00209384-1 mxc_spdif: add trigger handler function
Adrian Alonso [Mon, 14 May 2012 23:48:27 +0000 (18:48 -0500)]
ENGR00209384-1 mxc_spdif: add trigger handler function

* Add trigger function in order to handle user
  space events start/stop/pause playback/capture

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoSAUCE remove unnecessary suspend/resume functions
Adrian Alonso [Mon, 14 May 2012 23:43:37 +0000 (18:43 -0500)]
SAUCE remove unnecessary suspend/resume functions

BugLink: http://bugs.launchpad.net/bugs/882723
Disabling/re-enabling clocks is not necessary as it's done in *_startup()
and *_shutdown() functions, and shall be performed during suspend/resume.

This is causing warnings of un-matched clk_enable()/clk_disable()

Rework patch for imx_3.0.15 code base

Signed-off-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00209520-03 - FEC : Add support for MX6SL MSL.
Fugang Duan [Wed, 16 May 2012 09:57:53 +0000 (17:57 +0800)]
ENGR00209520-03 - FEC : Add support for MX6SL MSL.

- Modify the the platform macro define like as cpu_is_xxx()
  for supporting Mergrez chip.
- Config MIIGSK for FEC IP to enable RMII mode. MX25,MX53,
  and MX6Sololite use FEC IP, which need to config the MIIGSK
  registers memory map for RMII and MII.
- Correct device id_table entry name for differnt IP.
- Rewrite FEC MAC address by net_device address when reset FEC,
  which can avoid invalid MAC address to result in FEC cannot
  work.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00209520-02 - MX6SL MSL : Adjust FEC clock name.
Fugang Duan [Wed, 16 May 2012 09:51:51 +0000 (17:51 +0800)]
ENGR00209520-02 - MX6SL MSL : Adjust FEC clock name.

- Ethernet clock source name is differentiated by IP name.
  FEC IP clock name is "FEC"; ENET IP clock name is "enet".

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00209520-01 - MX6SL MSL : Add FEC support
Fugang Duan [Wed, 16 May 2012 10:27:09 +0000 (18:27 +0800)]
ENGR00209520-01 - MX6SL MSL : Add FEC support

Add FEC support for mx6-sololite:

- Add FEC pad iomux setting.
- Power on phy and init fec.
- Add devname to distinguish different IP.
- Use ANATOP as FEC clock source in default, remove redundant
  config "FEC_CLOCK_FROM_ANATOP".

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00171114 flexcan: enable can2 remote wakeup for mx6q
Dong Aisheng [Wed, 16 May 2012 08:59:03 +0000 (16:59 +0800)]
ENGR00171114 flexcan: enable can2 remote wakeup for mx6q

The root cause is missed to set CAN2_STOP_REQ in iomuxc
group register which is used to support can wakeup feature.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agoENGR00169375 IPU: Remove the warning message when doing 8:1 downsize
Wayne Zou [Wed, 16 May 2012 07:43:12 +0000 (15:43 +0800)]
ENGR00169375 IPU: Remove the warning message when doing 8:1 downsize

Remove Overflow message on resize coeff when resize from 1280*720 to 160*120
The IPU IC can not do exactly 8:1 downsize, but can be very close to 8:1
downsize.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00209480-5 mx6sl_usb : gadget: change the OTG1_ID pad ctrl
Tony LIU [Mon, 14 May 2012 07:33:13 +0000 (15:33 +0800)]
ENGR00209480-5 mx6sl_usb : gadget: change the OTG1_ID pad ctrl

- add pull up ctrl to make the ID to be high by default

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00209480-4 mx6sl_usb remove the sw workaround to verify IC fix
Tony LIU [Thu, 3 May 2012 02:00:29 +0000 (10:00 +0800)]
ENGR00209480-4 mx6sl_usb remove the sw workaround to verify IC fix

- add a function to tell if sw walkaround is needed
  for the IC bug

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00209480-3 mx6sl_usb: fix too many wakeup interrupt issue
Tony LIU [Wed, 2 May 2012 06:58:42 +0000 (14:58 +0800)]
ENGR00209480-3 mx6sl_usb: fix too many wakeup interrupt issue

modify usb wakeup interrupt number for mx6sl

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00209480-2 mx6sl_usb:change usb irq number for mx6sl
Tony LIU [Sat, 28 Apr 2012 13:05:56 +0000 (21:05 +0800)]
ENGR00209480-2 mx6sl_usb:change usb irq number for mx6sl

- in mx6sl RM, the irq of usb h1(usb otg2) is 72, but
  in fact, it should be 74, we need change the irq special
  for mx6sl

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00209480-1 mx6sl_usb bring up
Tony LIU [Sat, 28 Apr 2012 02:47:21 +0000 (10:47 +0800)]
ENGR00209480-1 mx6sl_usb bring up

- add usb otg power gpio control
- change cpu_is_mx6x() to cpu_is_mx6
- enable usb hsic support

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00209483 [imx6sl]: add USDHC support
Ryan QIAN [Wed, 16 May 2012 07:01:47 +0000 (15:01 +0800)]
ENGR00209483 [imx6sl]: add USDHC support

- add SD1, SD2 and SD3 support to mx6sl.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00209462 Thermal: print tempreture for debug uasge
Lin Fuzhen [Wed, 16 May 2012 05:11:02 +0000 (13:11 +0800)]
ENGR00209462 Thermal: print tempreture for debug uasge

Add debugmask to control the cooling device tempreture being printed or not

To enable the thermal tempreture printing by below command
echo 0xf > /sys/module/thermal/parameters/debug_mask

Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
11 years agoENGR00209454 imx6sl: fix build failure and clear warnning message.
Zhang Jiejing [Wed, 16 May 2012 03:20:00 +0000 (11:20 +0800)]
ENGR00209454 imx6sl: fix build failure and clear warnning message.

fix build failure invoke by reboot function patch,
and refine the code to clear the warnning message.

Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
11 years agoENGR00182786 mx6q sabresd: Add power/reset function for 3G modem
Xinyu Chen [Tue, 15 May 2012 09:16:33 +0000 (17:16 +0800)]
ENGR00182786 mx6q sabresd: Add power/reset function for 3G modem

Add PCIE 3V3 power up/down routing if we do not have
pcie driver selected. And power up 3V3 in board init.
As the reset function of the hw board cannot reset the
modem power. So on kernel boot up, we must make sure
the 3g modem is reset correctly by gpio reset.

Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
11 years agoENGR00182324-7 - MX6SL MSL: Add imx6s_defconfig
Jason Liu [Mon, 14 May 2012 15:04:59 +0000 (23:04 +0800)]
ENGR00182324-7 - MX6SL MSL: Add imx6s_defconfig

Add the imx6s_deconfig support

Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Robby Cai <r63905@freescale.com>
11 years agoENGR00182324-6 - MX6SL MSL: Add basic board file support
Jason Liu [Mon, 14 May 2012 14:36:16 +0000 (22:36 +0800)]
ENGR00182324-6 - MX6SL MSL: Add basic board file support

Add basic board file support for the i.MX 6SoloLite ARM2-based
Validation board.

Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Robby Cai <r63905@freescale.com>
11 years agoENGR00182324-5 - MX6SL MSL: Add GPIO support
Jason Liu [Mon, 14 May 2012 13:45:38 +0000 (21:45 +0800)]
ENGR00182324-5 - MX6SL MSL: Add GPIO support

Add GPIO definitions for the i.MX 6SoloLite SoC.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00182324-4 - MX6SL MSL: Enable L2 cache as OCRAM functionality
Jason Liu [Mon, 14 May 2012 13:41:05 +0000 (21:41 +0800)]
ENGR00182324-4 - MX6SL MSL: Enable L2 cache as OCRAM functionality

L2 cache can be configured to serve as OCRAM.  This patch adds
code to check this configuration, and reset it to L2 cache function
before enabling the L2 cache.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00182324-3 - MX6SL MSL: Add clock support for i.MX 6SoloLite
Jason Liu [Mon, 14 May 2012 13:15:57 +0000 (21:15 +0800)]
ENGR00182324-3 - MX6SL MSL: Add clock support for i.MX 6SoloLite

Add clock support for i.MX 6SoloLite.  A new clock file has been created
to reflect the substantial set of changes in the clocks used between
6SoloLite and other 6 series SoCs.

Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Robby Cai <r63905@freescale.com>
11 years agoENGR00182324-2 - MX6SL MSL: Add Support for i.MX6SoloLite SoC revision
Jason Liu [Mon, 14 May 2012 13:11:40 +0000 (21:11 +0800)]
ENGR00182324-2 - MX6SL MSL: Add Support for i.MX6SoloLite SoC revision

Add i.MX 6SoloLite SoC revision support

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00182324-1 - MX6SL MSL: Add Memory/IRQ/IOMUX support for i.MX 6SoloLite
Jason Liu [Mon, 14 May 2012 07:49:19 +0000 (15:49 +0800)]
ENGR00182324-1 - MX6SL MSL: Add Memory/IRQ/IOMUX support for i.MX 6SoloLite

Add support for the Memory map, IRQ, and IOMUX layout of the i.MX
6SoloLite SoC.

Signed-off-by: Robby Cai <R63905@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00178459 mxc_spdif: fix read access for debug info
Adrian Alonso [Mon, 14 May 2012 23:02:35 +0000 (18:02 -0500)]
ENGR00178459 mxc_spdif: fix read access for debug info

* Fix read register access for debug info
* Read from spdif registers with a disabled
  spdif core clock leads to kernel hang.
* Avoid it by enabling/diabling core clk.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00178459 mxc_spdif: clk_enable return checks
Adrian Alonso [Fri, 11 May 2012 17:17:44 +0000 (12:17 -0500)]
ENGR00178459 mxc_spdif: clk_enable return checks

* Add clk_enable return checks, if clocks aren't enabled
  writting/reading from spdif register will cause
  system to become unresponsive.
* Remove spdif_audio_clk enable/disable calls
  this clock is not assigned and is reposible for making
  the system unresposive.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00209059-2 mx6: config: add mfgtool reboot function in defconfig.
Zhang Jiejing [Mon, 14 May 2012 07:18:36 +0000 (15:18 +0800)]
ENGR00209059-2 mx6: config: add mfgtool reboot function in defconfig.

add reboot to mfgtool download mode by default.
usage:
'reboot download'

Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
11 years agoENGR00209059-1 MX6: reboot: add reboot to special function
Zhang Jiejing [Mon, 14 May 2012 06:22:11 +0000 (14:22 +0800)]
ENGR00209059-1 MX6: reboot: add reboot to special function

add reboot to special function like mfg download mode,
android fastboot, recovery mode.

It use ASRC register to enter mfgtool download mode and other function.
For android fastboot, recovery function it use ASRC_GPR10 bit 7-8 bit,
it will checked in uboot and clear after read.

Add this feature to improve recovery function, to avoid infinit looping
enter recovery mode if some thing goes wrong in fastboot mode.
Also add convient function for developer.

usage:

download mode: "reboot download"
fastboot     : "reboot fastboot"
recovery mode: "reboot recovery"

Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
11 years agoENGR00176278 mx6: make local timer work with WAIT mode
Xinyu Chen [Wed, 7 Mar 2012 02:17:21 +0000 (10:17 +0800)]
ENGR00176278 mx6: make local timer work with WAIT mode

As mx6q soc use one clock to provide for cpu and local timer,
the local timers will be stopped when enter wait mode.
This causes system hang when enter wait mode with local timer
enabled. So we should switch the clock event to GPT
broadcast clock event before entering wait mode, and disable
local timers. Todo this, following changes made:
* In arch_idle(), we check if the GPT broadcast clock
  event is switched to one shot mode. If the kernel clocksource
  is switched from jiffies one to GPT, then we can use GPT
  as broadcast event. And switch from local timer to GPT broadcast
  event before entering mx6q_wait. Otherwise, kernel will hange
  if the SW jiffies clock source is used.
  We call clockevents_notify to switch clock source.
* Remove the enable_wait_mode check in local timer setup.
* Always return 0 in GPT v2 timer's set_next_event routing.
  All the GPTs are running in free run mode as what driver did.
  So we should allow the GPT CNT register roll over to 0 when it
  reaches 0xFFFFFFFF. And the next event written to compare register
  can less than the current value in CNT.
  If we refused to do roll over settings, the kernel will continues
  to set_next_event to GPT when the next event is far away and
  we return negative value. This is happend when one CPU is in idle
  and no timewheel is being expired in short time.

Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
11 years agoENGR00176154 mx6q sabresd: change the position angle of board and LVDS
Xinyu Chen [Thu, 15 Mar 2012 07:46:02 +0000 (15:46 +0800)]
ENGR00176154 mx6q sabresd: change the position angle of board and LVDS

The LVDS display direction should be aligned with camera sensor.
So we rotate it with 180 degree.

Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
11 years agoENGR00178933-2 [MX6] USB DOC: Add USB auto remote wake up doc
make shi [Thu, 10 May 2012 01:45:12 +0000 (09:45 +0800)]
ENGR00178933-2 [MX6] USB DOC: Add USB auto remote wake up doc

Add USB auto remote wake up unit test method to udc doc.

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00178933-1 [MX6] USB zero gadget: support USB auto remote wake up test
make shi [Tue, 8 May 2012 06:11:07 +0000 (14:11 +0800)]
ENGR00178933-1 [MX6] USB zero gadget: support USB auto remote wake up test

- add some parameters in zero.c to support USB auto remote wake up test
- add zero_disconnect function to clear the test result

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00209022 Update gpu clock management code
Loren Huang [Fri, 11 May 2012 02:20:56 +0000 (10:20 +0800)]
ENGR00209022 Update gpu clock management code

-This patch from vivante.They need to bypass the
reference count in clock management code as they
may touch clock while they just want to change
power state.

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agodma/imx-sdma: use readl_relaxed/writel_relaxed and use writel when necessary
Huang Shijie [Fri, 11 May 2012 07:59:08 +0000 (15:59 +0800)]
dma/imx-sdma: use readl_relaxed/writel_relaxed and use writel when necessary

use readl_relaxed/writel_relaxed in most places, and use writel when
enable channel, because it needs memory barrier.

Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agoENGR00182106 720p and 1080p recording are too bright.
YangYonggang [Mon, 7 May 2012 09:42:41 +0000 (17:42 +0800)]
ENGR00182106 720p and 1080p recording are too bright.

The sensor configure was not correct. Changed the ov5640 sensor
config to fix the bug.

Signed-off-by: YangYonggang <b31664@freescale.com>
11 years agoENGR00180810 v4l2 capture: fix write reg error when change mode
Yuxi Sun [Thu, 10 May 2012 02:08:38 +0000 (10:08 +0800)]
ENGR00180810 v4l2 capture: fix write reg error when change mode

Add 1ms delay after power up, then initialize the camera sensor

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00182346-2 serial: unregister the console when the console is released
Huang Shijie [Wed, 9 May 2012 06:00:57 +0000 (14:00 +0800)]
ENGR00182346-2 serial: unregister the console when the console is released

The old code does not unregister the console mxc_early_uart_console when
it is disabled. This may causes the global console `console_drivers` still
pointes an invalid console mxc_early_uart_console. A hung will be observed
in this situation.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00182346-1 serial/imx : disable the clock when the uart is not used
Huang Shijie [Wed, 9 May 2012 03:36:29 +0000 (11:36 +0800)]
ENGR00182346-1 serial/imx : disable the clock when the uart is not used

This patch is just the re-revert of the commit:ENGR00182048

Disable the clock when the uart port is not used.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00182220 WM8962: set a default volume
Gary Zhang [Wed, 9 May 2012 03:34:37 +0000 (11:34 +0800)]
ENGR00182220 WM8962: set a default volume

set default volume for headphone and speaker

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoimx: add polled io uart methods
Saleem Abdulrasool [Thu, 22 Dec 2011 08:57:53 +0000 (09:57 +0100)]
imx: add polled io uart methods

These methods are invoked if the iMX uart is used in conjuction with kgdb during
early boot.  In order to access the UART without the interrupts, the kernel uses
the basic polling methods for IO with the device.  With these methods
implemented, it is now possible to enable kgdb during early boot over serial.

Signed-off-by: Saleem Abdulrasool <compnerd@compnerd.org>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Fabio Estevam <festevam@gmail.com>
CC: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
CC: linux-serial@vger.kernel.org
CC: Alan Cox <alan@linux.intel.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
11 years agoimx: Add save/restore functions for UART control regs
Dirk Behme [Thu, 22 Dec 2011 08:57:52 +0000 (09:57 +0100)]
imx: Add save/restore functions for UART control regs

Factor out the uart save/restore functionality instead of
having the same code several times in the driver.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
CC: Saleem Abdulrasool <compnerd@compnerd.org>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Fabio Estevam <festevam@gmail.com>
CC: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
CC: linux-serial@vger.kernel.org
CC: Alan Cox <alan@linux.intel.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
11 years agosched: Cleanup cpu_active madness
Peter Zijlstra [Thu, 15 Dec 2011 16:09:22 +0000 (17:09 +0100)]
sched: Cleanup cpu_active madness

Stepan found:

CPU0 CPUn

_cpu_up()
  __cpu_up()

boostrap()
  notify_cpu_starting()
  set_cpu_online()
  while (!cpu_active())
    cpu_relax()

<PREEMPT-out>

smp_call_function(.wait=1)
  /* we find cpu_online() is true */
  arch_send_call_function_ipi_mask()

  /* wait-forever-more */

<PREEMPT-in>
  local_irq_enable()

  cpu_notify(CPU_ONLINE)
    sched_cpu_active()
      set_cpu_active()

Now the purpose of cpu_active is mostly with bringing down a cpu, where
we mark it !active to avoid the load-balancer from moving tasks to it
while we tear down the cpu. This is required because we only update the
sched_domain tree after we brought the cpu-down. And this is needed so
that some tasks can still run while we bring it down, we just don't want
new tasks to appear.

On cpu-up however the sched_domain tree doesn't yet include the new cpu,
so its invisible to the load-balancer, regardless of the active state.
So instead of setting the active state after we boot the new cpu (and
consequently having to wait for it before enabling interrupts) set the
cpu active before we set it online and avoid the whole mess.

Reported-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1323965362.18942.71.camel@twins
Signed-off-by: Ingo Molnar <mingo@elte.hu>
11 years agoARM: fix rcu stalls on SMP platforms
Russell King [Thu, 19 Jan 2012 15:20:58 +0000 (15:20 +0000)]
ARM: fix rcu stalls on SMP platforms

We can stall RCU processing on SMP platforms if a CPU sits in its idle
loop for a long time.  This happens because we don't call irq_enter()
and irq_exit() around generic_smp_call_function_interrupt() and
friends.  Add the necessary calls, and remove the one from within
ipi_timer(), so that they're all in a common place.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
11 years agoARM: smpboot: Enable irqs on secondary CPU after marking it online/active
Thomas Gleixner [Sat, 15 Oct 2011 00:22:43 +0000 (17:22 -0700)]
ARM: smpboot: Enable irqs on secondary CPU after marking it online/active

Patch is the last version from tglx on Oct 7.

Discussion is at: http://comments.gmane.org/gmane.linux.ports.arm.kernel/131919

The original commit message for the first patch version:

Frank Rowand reported:

 I have a consistent (every boot) hang on boot with the RT patches.
 With a few hacks to get console output, I get:

  rcu_preempt_state detected stalls on CPUs/tasks

 I have also replicated the problem on the ARM RealView (in tree) and
 without the RT patches.

 The problem ended up being caused by the allowed cpus mask being set
 to all possible cpus for the ksoftirqd on the secondary processors.
 So the RCU softirq was never executing on the secondary cpu.

 The problem was that ksoftirqd was woken on the secondary processors before
 the secondary processors were online. This led to allowed cpus being set
 to all cpus.

   wake_up_process()
      try_to_wake_up()
         select_task_rq()
            if (... || !cpu_online(cpu))
               select_fallback_rq(task_cpu(p), p)
                  ...
                  /* No more Mr. Nice Guy. */
                  dest_cpu = cpuset_cpus_allowed_fallback(p)
                     do_set_cpus_allowed(p, cpu_possible_mask)
                        #  Thus ksoftirqd can now run on any cpu...
</report>

The reason is that the ARM SMP boot code for the secondary CPUs enables
interrupts before the newly brought up CPU is marked online and
active.

That causes a wakeup of ksoftirqd or a wakeup of any other kernel
thread which is affine to the brought up CPU break that threads
affinity and therefor being scheduled on already online CPUs.

This problem has been observed on x86 before and the only solution is
to mark the CPU online and wait for the CPU active bit before the
point where interrupts are enabled.

Change-Id: If948ef52d434191579e1ca95d18d0c50e91a03b9
Signed-off-by: Dima Zavin <dima@android.com>
11 years agoENGR00182243 [MX6]Fix suspend/resume issue
Anson Huang [Tue, 8 May 2012 07:10:16 +0000 (15:10 +0800)]
ENGR00182243 [MX6]Fix suspend/resume issue

When there is pending wake up source before SOC enter DSM,
we should restore DDR IO and enable cache then return. Previous
code break r2 register which keep the iram stack addr, will
lead to DDR IO restore fail, need to avoid it.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00182245 Increase gpu mmu handling size to 2G
Loren Huang [Tue, 8 May 2012 07:31:07 +0000 (15:31 +0800)]
ENGR00182245 Increase gpu mmu handling size to 2G

This change can avoid gpu to access invalid address.

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00181670 V4L2: Fix bug:when ubuntu start up, print some fb error messages
Wayne Zou [Mon, 7 May 2012 08:57:30 +0000 (16:57 +0800)]
ENGR00181670 V4L2: Fix bug:when ubuntu start up, print some fb error messages

If only called mxc_vout_open/mxc_vout_release, fb_smem_len are uninitialized.
When ubuntu start up, print some error messages:

mxc_sdc_fb mxc_sdc_fb.1: Unable to allocate framebuffer memory
mxc_v4l2_output mxc_v4l2_output.0: ERR: fb_set_var.
mxc_sdc_fb mxc_sdc_fb.0: Unable to allocate framebuffer memory
mxc_v4l2_output mxc_v4l2_output.0: ERR: fb_set_var.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00180686 [CPUFreq]Delay interactive governor to speed up kernel boot
Anson Huang [Mon, 7 May 2012 01:48:22 +0000 (09:48 +0800)]
ENGR00180686 [CPUFreq]Delay interactive governor to speed up kernel boot

Interactive governor is too early to start, and kernel boot
up speed is impacted, use late_initcall instead of fs_initcall.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00182054: [MX6]: always_present flag will't work as designed at some cond
Ryan QIAN [Mon, 7 May 2012 05:54:04 +0000 (13:54 +0800)]
ENGR00182054: [MX6]: always_present flag will't work as designed at some cond

As designed, when 'always_present' is set, it is assumed that cd_gpio should
be not set, and gpio_get_value(boarddata->cd_gpio) should return 0. But it is
not sure that the return value of gpio_get_value(0) is 0.

- check always_present first
- remove ESDHC_FLAG_GPIO_FOR_CD_WP flag if always_present is set.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00179636-04 - FEC : allocate the enough DMA size for BD.
Fugang Duan [Mon, 7 May 2012 07:14:23 +0000 (15:14 +0800)]
ENGR00179636-04 - FEC : allocate the enough DMA size for BD.

- Increase RX BD size to 384 entrys from 16 entrys, and allocate
  the enough DMA memory for buffer description.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00180497 FB: Fix a bug: 'fb_set_par error, -22' when video playback on lvds
Wayne Zou [Mon, 7 May 2012 04:47:30 +0000 (12:47 +0800)]
ENGR00180497 FB: Fix a bug: 'fb_set_par error, -22' when video playback on lvds

Change bg_id/fg_id variable to char array variable, and
avoid change the constant string in .rodata section.

[MX6Q SMD]fb: 'fb_set_par error, -22' prompted when mplay a video to lvds
/mnt/nfs/util/mplayer /mnt/nfs/test_stream/video/Mpeg4_SP1_1280x720_30fps.mp4
Before video playback finish, fb error message shows:

mxc_sdc_fb mxc_sdc_fb.0: setup error, dispdrv:ldb.
detected fb_set_par error, error code: -22
Can't reset original fb_var_screeninfo: Invalid argument
Exiting... (End of file)

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00182048: Revert "ENGR00175578 serial/imx..."
Jason Liu [Mon, 7 May 2012 03:25:17 +0000 (11:25 +0800)]
ENGR00182048: Revert "ENGR00175578 serial/imx..."

This reverts commit a7d9c8864ab801920f6a630767656f6777a95de2.

This commit will break i.mx6dl boot up on SD board and hang at:
Bus freq driver loaded...

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00181094-5: MAX8903: modify dirver and free gpio resource in gpio err.
Rong Dian [Fri, 4 May 2012 09:44:11 +0000 (17:44 +0800)]
ENGR00181094-5: MAX8903: modify dirver and free gpio resource in gpio err.

1.free gpio in request gpio err.

2.in driver probe,directly set the type of power supply AC.

Signed-off-by: Rong Dian <b38775@freescale.com>
11 years agoENGR00181068: MX6 Source IPU_HSP and AXI clocks from 540M PFD.
Ranjani Vaidyanathan [Thu, 26 Apr 2012 22:53:14 +0000 (17:53 -0500)]
ENGR00181068: MX6 Source IPU_HSP and AXI clocks from 540M PFD.

IPU_HSP clocks should NOT be sourced from MMDC clock since the
MMDC clock can be scaled.
Move the IPU_HSP clock to be sourced from PLL3_PFD_540M instead.
Also don't source AXI_CLK from periph_clk as this domain is
scaled between 528MHz, 400MHz and 24MHz. Move AXI_CLK
clock to be sourced from PLL3_PFD_540M too.

When the system needs to enter low power mode, AXI_CLK is switched
from PLL3_PFD_540M to periph_clk. And then switched back
when low power mode is exited.

The code will print a warning message if PLL3_PFD_540M is
relocked to a different frequency when IPU_HSP or axi_clk is
sourced from it.

Currently remove the support for 400Mhz DDR working point for
MX6Q since we can get IPU underruns during the DDR frequency
transitions.

The DDR freq change code needs to ensure that all bus clocks
donot exceed max frequency during the frequency transition.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00181514 - FEC : fix kernel dump warning with suspend/resume.
Fugang Duan [Fri, 4 May 2012 07:48:42 +0000 (15:48 +0800)]
ENGR00181514 - FEC : fix kernel dump warning with suspend/resume.

- Fix clock enable/disable match operation to avoid kernel
  dump warning "clock enable/disable mismatch".

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00181697 HDMI: fix ahb bus error bug
Chen Liangjun [Fri, 4 May 2012 09:49:51 +0000 (17:49 +0800)]
ENGR00181697 HDMI: fix ahb bus error bug

In ARIK, to prevent noise cause by false triggered burst, we reduce
the incr type to 4. and the change may cause bus_error because a
burst may unexpectly stop and thus an AHB bus error happens.

Reset HDMI Audio FIFO state to prevent AHB bus error.
Signed-off-by: Chen Liangjun <b36089@freescale.com>