Allen Xu [Fri, 14 Nov 2014 16:36:07 +0000 (00:36 +0800)]
MLK-9851 mtd: Change the mtd device driver build order for mfgtool
i.MX6SX Sabreauto board enabled both NAND and QSPI1 drivrers, and by default,
NAND driver built first in kernel compiling, and it would be load first when
Kernel brought up.
Since we could not guarantee all boards mounted NAND chips, we wish the Kernel
could load QSPI driver first, when system mapped QSPI and NAND, the mtd device
index won't change dynamically, otherwise, the mfgtool may write images to the
inappropriate storage devices.
The code change moved the SPI driver at the prior position of NAND driver in
Makefile to solve this issue.
Allen Xu [Thu, 25 Sep 2014 10:39:09 +0000 (05:39 -0500)]
ENGR00311101 QSPI: i.MX6SX: fixed the random QSPI access failed issue
We found there is a low probability(5%) QSPI access timeout issue,
usually it happened on kernel boot stage, the first time kernel tried to
access QSPI chip. The READ_ID command was sent but not executed,
consequently the probe function failed.
Finally we located the issue by these steps.
1. Since the issue happened randomly and usually it cost half day to
reproduce, we add more debug code in driver, to create a timeout file if
the issue occurred.
2. Prepared an autorun script to keep rebooting the system and check if
the timeout file existed, if the file existed, stop reboot.
3. The system will stop rebooting when timeout error occurred, set the
CCM_CCOSR register and related IOMUX to measure QPSI clock, found there
is no clock output, while clock output can be measured when QSPI driver
successfully probed.
4. Check the code and found QSPI clock rate was changed while not
disabled clock gate, most of the multiplexers on i.MX6 are glitch ones,
clock glitch may occurred and propagated into downstream clock dividers
Based on the new clock flag(CLK_SET_RATE_GATE) and new framework, we
need to change the approach of seting clock rate. In current
implementation, there are several places in which the clock was touched.
1. probe function. prepare and enable clock before setting the QSPI
register, disable and unprepare the clock before exit.
2. nor_setup & nor_setup_last, since we change clock rate in these two
functions.
3. fsl_qspi_prep and fsl_qspi_unprep, clock was enabled only when got
QSPI access request.
4. resume function. Clock was required to restroe the setting after
resume, disable the clock before exit.
Sandor Yu [Wed, 14 Jan 2015 07:41:43 +0000 (15:41 +0800)]
MLK-10092-2 dts: Rename compatible string from ov564x to ov5640
There are two version ov5640 driver,
one is written with v4l2 int-device architecture,
and the other is written with v4l2 subdev architecture.
Rename subdev ov5640 compatible string from ov5640x
to ov5640 to distinguish with ov5640 int-device driver.
so ov564x is used for int-device architecture and
ov5640 is used for subdev architecture.
Sandor Yu [Wed, 14 Jan 2015 07:34:22 +0000 (15:34 +0800)]
MLK-10092-1 ov5640: Rename compatible string from ov564x to ov5640
There are two version ov5640 driver,
one is written with v4l2 int-device architecture,
and the other is written with v4l2 subdev architecture.
Rename subdev ov5640 compatible string from ov5640x to ov5640
to distinguish with ov5640 int-device driver.
so ov564x is used for int-device architecture and
ov5640 is used for subdev architecture.
Liu Ying [Tue, 13 Jan 2015 02:19:10 +0000 (10:19 +0800)]
MLK-10084 media: mxc vout: Correct black color filling for interleaved formats
In non-linear_bypass_pp and non-tiled_bypass_pp modes, the triple fbdev frame
buffer would be rendered with video frames in turn. We need to fill all the
three frame buffers with black color before streaming on instead of filling only
one of them.
Fugang Duan [Wed, 14 Jan 2015 08:18:58 +0000 (16:18 +0800)]
MLK-10098 ARM: imx: fix 1588 clock init
The enet clock define is changed as there has no "enet_ref" clock name.
If the tx_clk is sourced from SOC anatop PLL, user define the clock id
in devicetree. So we only to judge the ptp clock valid and then set the
related GPR bit.
According to the help text in the config SWP_EMULATE in arch/arm/mm/Kconfig:
"In some older versions of glibc [<=2.8] SWP is used during futex trylock()
operations with the assumption that the code will not be preempted. This
invalid assumption may be more likely to fail with SWP emulation enabled,
leading to deadlock of the user application."
The audio codec toolchain version is gcc-4.1.1-glibc-2.4, we need turn off
the CONFIG_SWP_EMULATE in the imx_v7_defconfig.
Victoria Milhoan [Thu, 20 Nov 2014 18:28:28 +0000 (11:28 -0700)]
MLK-9951 Update CAAM driver era interface
Add more CAAM era values to the CAAM driver's caam_get_era()
function. Read only 32 bits of data since the data required
to identify the IP_ID and MAJ_REV is located in the first 32
bits of the register. And, update the function for use with
ARM/Little Endian devices.
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14] Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit 6050d7faf2d0c063195aa9454c130548a9f8058f)
Steve Cornelius [Tue, 14 Aug 2012 22:04:11 +0000 (15:04 -0700)]
MLK-9769-22 caam: improve initalization for context state saves
Multiple function in asynchronous hashing use a saved-state block,
a.k.a. struct caam_hash_state, which holds a stash of information
between requests (init/update/final). Certain values in this state
block are loaded for processing using an inline-if, and when this
is done, the potential for uninitialized data can pose conflicts.
Therefore, this patch improves initialization of state data to
prevent false assignments using uninitialized data in the state block.
This patch addresses the following traceback, originating in
ahash_final_ctx(), although a problem like this could certainly
exhibit other symptoms:
MLK-9710-5 Unregister Secure Memory platform device upon shutdown
Unregister Secure Memory platform device when the Secure Memory
module is shut down. This allows the Secure Memory module to
be inserted again successfully.
Steve Cornelius [Mon, 17 Nov 2014 18:24:14 +0000 (11:24 -0700)]
MLK-9769-22 Detect HW features during alg registration
i.MX6 instantiates a CAAM with a low-power MDHA block, which does not
compute digests larger than 256 bits. Since the driver installs handlers
for hashes longer than 256 bits in several places, added the ability to
read and interpret the CHA version and instantiations registers, and then
only register handlers that it can support.
[<vicki.milhoan@freescale.com>: Edited to include only caamhash changes] Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
MLK-9769-20 Limit AXI pipeline to a depth of one in CAAM for i.MX6 devices
i.MX6 devices have an issue wherein AXI bus transactions may not occur
in the correct order. This isn't a problem running single descriptors,
but can be if running multiple concurrent descriptors. Reworking the CAAM
driver to throttle to single requests is impractical, so this patch limits
the AXI pipeline to a depth of one (from a default of four) to preclude
this situation from occurring.
Signed-off-by: Victoria Milhoan (b42089) <vicki.milhoan@freescale.com>
Winston Hudson [Mon, 17 Nov 2014 17:17:35 +0000 (10:17 -0700)]
MLK-9769-19 Add ARC4-ECB support for CAAM in i.MX6 family
Adds ARC4-ECB Mode support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
MLK-9769-18 Add 3DES-ECB-EDE support for CAAM in i.MX6 family
Adds 3DES-ECB-EDE Mode support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
MLK-9769-17 Add AES-ECB support for CAAM in i.MX6 family
Adds AES-ECB (Electronic Codebook) support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
Winston Hudson [Mon, 17 Nov 2014 16:27:30 +0000 (09:27 -0700)]
MLK-9769-16 Add DES-ECB support for CAAM in i.MX6 family
Adds DES-ECB Mode support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
Victoria Milhoan [Fri, 14 Nov 2014 22:32:20 +0000 (15:32 -0700)]
MLK-9769-15 Register only crypto algorithms supported by the Freescale CAAM hardware
This patch enhances the CAAM driver's registration of crypto
algorithms into the Crypto API by only registering algorithms
supported by the CAAM hardware available.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
MLK-9769-14 Add CRYPTO_ALG_KERN_DRIVER_ONLY flag to Freescale CAAM driver
The CRYPTO_ALG_KERN_DRIVER_ONLY flag is used to indicate that
the crypto algorithm is only available via a kernel driver.
This patch adds the flag only when the flag is available in the
kernel. Utilizing the flag based on it's availability in the
kernel allows the driver to compile on older kernel versions.
The original community patch is located at
http://permalink.gmane.org/gmane.linux.kernel.cryptoapi/6547
for reference.
Signed-off-by: Victoria Milhoan (b42089) <vicki.milhoan@freescale.com>
MLK-9769-13 Add AES-CTR support for CAAM in i.MX6 family
Adds AES-CTR (Counter Mode) support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14] Signed-off-by: Winston Hudson (b45308) <winston.h.hudson@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
By default, job ring 0 is the owner of the Secure Memory area
within CAAM. This patch modifies the Secure Memory module to
use job ring 0 for all accesses.
Steve Cornelius [Fri, 21 Feb 2014 17:40:52 +0000 (10:40 -0700)]
MLK-9710-16 Cache-invalidate deferred RNG buffer fill
CAAM's kernel random generator adaptor (feeding /dev/hwrng) manages
a pair of data buffers that fill with RNG-sourced data for consumption.
While one buffer is being drained through the dev, the other is filling
in the background to be used on "standby".
In the case where the completion of the buffer fill is deferred, a
cache invalidate call is required before the buffer can be put into use.
Steve Cornelius [Fri, 2 Aug 2013 03:08:19 +0000 (20:08 -0700)]
MLK-9710-14 Un-pad cache sizes for blob export/import
Blob exportation and importation functions were adding padding to
the buffer mapping and cache control functions, which resulted in
incorrect CPU-level views into a DMA-ed blob.
Also, corrected descriptor constructors to use symbolic form of
blob overhead calculation.
Steve Cornelius [Wed, 24 Jul 2013 03:56:08 +0000 (20:56 -0700)]
MLK-9710-12 Adapt sm_test as a black-key handling example
Converted sm_test to an example that can show:
- key covering
- secret encapsulation as external memory blob
- secret decapsulation from external memory blob
- checks and displays of the handling of key content
Steve Cornelius [Wed, 24 Jul 2013 03:49:29 +0000 (20:49 -0700)]
MLK-9710-11 Add internal key cover and external blob export/import to prototype SM-API
Extended/amended the prototype SM-API with the following functions:
- Added key covering (blackening) function in-place to a keyslot
- Added export operation to encapsulate data to external memory as a
secure memory blob (including descriptor capable of secure memory or
general memory blob generation)
- Removed in-place blob encapsulation
- Added import operation to decapsulate a blob from external memory into
secure memory (including descriptor capable of general memory or secure
memory content decapsulation)
- Removed in-place blob decapsulation
[<vicki.milhoan@freescale.com>: Edited to apply to 3.10] Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit c577769ed0347bb4e3428b5696fb7f209af0a7ad)
Steve Cornelius [Thu, 25 Sep 2014 23:34:11 +0000 (16:34 -0700)]
MLK-9710-18 snvs - make SECVIO module device tree correct
Converted the prototype 3.0.x SNVS Security Violation Handler
subsystem to be device tree correct/compliant under 3.10 for ARM
platforms. Also, separated out SNVS property detection so as to make
it independent of CAAM, and corrected function namespace accordingly.
Later releases of this subsystem are likely to be separate from the
kernel's CAAM driver space.
[<vicki.milhoan@freescale.com>: Edited to apply to latest 3.10 kernel] Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit c8c128086eae012ced0c96d66f21f36bcbd14f66)
Steve Cornelius [Fri, 19 Oct 2012 21:43:41 +0000 (14:43 -0700)]
MLK-9769-11 Add SM register defs, and expanded driver-private storage.
These add changes to the driver private areas for the CAAM
controller and CAAM Secure Memory subsystems, and expand register
definitions to include the Secure Memory subsystems as reflected
in multiple areas (controller, rings, secure memory itself).
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14] Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Dan Douglass [Wed, 27 Nov 2013 09:40:44 +0000 (03:40 -0600)]
ENGR00289885 [iMX6Q] Add Secure Memory and SECVIO support.
1. Pull in secure memory support from 3.0.35 kernel.
2. Pull in SECVIO support from 3.0.35 kernel.
3. Make changes to support device tree.
4. Add device tree setting for SECVIO sources.
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14] Signed-off-by: Dan Douglass <b41520@freescale.com>
(cherry picked from commit f3bfd42e2db3af8326734bebf750e94e74734f6e) Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Steve Cornelius [Wed, 24 Jul 2013 03:47:32 +0000 (20:47 -0700)]
MLK-9710-10 Add CCM defs for FIFO_STORE instruction
Added definitions to enable FIFO_STORE to encode options for storing
keys in AES-CCM mode
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14] Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
(cherry picked from commit a3cd8e5fad274f33fc6f0030413f89a6339b1d5a) Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
MLK-9710-8 tcrypt: change memory allocation for test_ahash_speed output buffer
Change allocation of the tcrypt module's test_ahash_speed() output buffer to
use kmalloc(). This avoids a segmentation fault when the buffer is used in a
dma_map_*() call.
This patch has been backported to the 3.5.7 kernel for use with i.MX6.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such
as QorIQ). Thus the property names are often tied to the sec-4.0+ nomenclature.
The original patch can be found at the following link:
http://marc.info/?l=linux-crypto-vger&m=135771601829617&w=2
Test vectors were taken from existing test for CBC(DES3_EDE).
Associated data has been added to test vectors.
HMAC computed with Crypto++ has been used.
Following algos have been covered.
This patch adds support for the following tcrypt test:
(a) "authenc(hmac(md5),cbc(aes))"
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
MLK-9769-8 Add a test for the Freescale CAAM Random Number Generator
Freescale's CAAM includes a Random Number Generator. This change adds
a kernel configuration option to test the RNG's capabilities via the
hw_random framework.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
MLK-9769-5 Enable and disable clocks for the Freescale CAAM device on i.MX platforms
ARM-based systems may disable clocking to the CAAM device on the
Freescale i.MX platform for power management purposes. This patch
enables the required clocks when the CAAM module is initialized and
disables the required clocks when the CAAM module is shut down.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Sanchayan Maity [Fri, 19 Dec 2014 09:55:29 +0000 (15:25 +0530)]
MLK-10088-18 usb: chipidea: Add errata for revision 2.40a
At chipidea revision 2.40a, there is a below errata:
9000531823 B2-Medium Adding a dTD to a Primed Endpoint May Not Get Recognized
Title: Adding a dTD to a Primed Endpoint May Not Get Recognized
Impacted Configuration: All device mode configurations.
Description:
There is an issue with the add dTD tripwire semaphore (ATDTW bit in USBCMD register)
that can cause the controller to ignore a dTD that is added to a primed endpoint.
When this happens, the software can read the tripwire bit and the status bit at '1'
even though the endpoint is unprimed.
After executing a dTD, the device controller endpoint state machine executes a final
read of the dTD terminate bit to check if the application added a dTD to the linked
list at the last moment. This read is done in the finpkt_read_latest_next_td (44) state.
After the read is performed, if the terminate bit is still set, the state machine moves
to unprime the endpoint. The decision to unprime the endpoint is done in the
checkqh_decision (59) state, based on the value of the terminate bit.
Before reaching the checkqh_decision state, the state machine traverses the
writeqhtd_status (57), writeqh_status (56), and release_prime_mask (42) states.
As shown in the waveform, the ep_addtd_tripwire_clr signal is not set to clear
the tripwire bit in these states.
Workaround:
The software must implement a periodic poll cycle, and check for each dTD
pending on execution (Active = 1), if the enpoint is primed. It can do this by reading
the corresponding bits in the ENDPTPRIME and ENDPTSTAT registers. If these bits are
read at 0, the software needs to re-prime the endpoint by writing 1 to the corresponding
bit in the ENDPTPRIME register. This can be done for every microframe, every frame or
with a larger interval, depending on the urgency of transfer execution for the application.
Tested-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Peter Chen [Wed, 17 Dec 2014 06:16:54 +0000 (14:16 +0800)]
MLK-10088-17 usb: chipidea: add chipidea revision information
Define ci_get_revision API to know the controller revision
information according to chipidea 1.1a, 2.0a and 2.5a spec.
Besides, add one entry at struct ci_hdrc to indicate revision
information, it can be used for adding different code for
revisions, eg kinds of errata.
Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Using hw_write_id_reg and hw_read_id_reg to write and read identification
registers contents, they can be used to get controller information, change
some system configurations, and so on.
Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Sun, 26 Oct 2014 05:49:02 +0000 (13:49 +0800)]
MLK-10088-15 usb: phy: phy-mxs-usb: do not depend on speed for disconnect notifier
For some user cases, like plug out and replug in usb device during
the system suspend, the speed negotiation will be error due to host
doesn't know the device's disconnection, and it still hopes the
high speed device, but the device backs to "powered" state which
its high speed termination is not enabled, the usb core calls
the PHY's disconnect notifier with "full speed", it will NOT
take effect at all.
If the usb core calls disconnect notifer, the port change must happen,
so it is safe to disable high speed disconenct detector, since
connect notifier will be called soon if the device is still connected
on the port, and we will enable high speed disconnect detector at that
time.
Acked-by: Li Jun <b47624@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Except the same process with earlier imx6, it has below two features:
- Choose which vbus voltage as vbus wakeup source
We choose B_SESSION_VALID as vbus wakeup source since when the system
goes to suspend, the vbus comparator can't compare the vbus voltage
for VBUS_VALID.
- Disable dp/dm (linestate) change as wakeup source at device mode
when the vbus is not there, we don't expect dp/dm change waking up
usb controller at this situation.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 23 Dec 2014 02:30:07 +0000 (10:30 +0800)]
MLK-10088-11 usb: chipidea: clear otg interrupt status for otg capable controller
We need to do it for all otg capable controller, not only peripheral
featured otg capable controller, otherwise, the host-only role, but
otg capable controller may be responded by otg interrupt.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 23 Dec 2014 04:58:17 +0000 (12:58 +0800)]
MLK-10088-8 usb: chipidea: add usb as system wakeup source
The USB signal can be system wakeup source, this patch add the
support, for how to enable it, see Documentation/usb/chipidea.txt.
Since USB wakeup enable logic is vendor/platform specific, the
glue layer needs to implement it to support this feature.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
This API is used to enable/disable usb wakeup, only imx6 series are
added, since I don't have other imx hardware on hand. Other imx users
can add their API according to reference manual after testing.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Fri, 12 Dec 2014 05:29:58 +0000 (13:29 +0800)]
MLK-10088-3 usb: chipidea: usbmisc_imx: delete clock information
All imx usb controller's non core registers uses the same clock gate with
core registers, the usbmisc_imx is the library for imx glue driver, the
glue keeps clock on when it calls usbmisc_imx API to change non-core register.
Besides, we will support runtime pm in the future, it also needs to
close this clock when the usb is not in use.
Philipp Zabel also verifies it at imx6q platform, see
http://www.spinics.net/lists/linux-usb/msg118491.html
Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Wed, 10 Dec 2014 06:49:41 +0000 (14:49 +0800)]
MLK-10088-1 usb: chipidea: udc: return immediately if re-enable non-empty endpoint
Some gadget driver (like uac1) will try to enable endpoint again even
the ep is not empty, it will cause the ep reset again and may affect
the dTD list which has already queued.
It returns -EBUSY immediately, and indicate the endpoint is in use.
In this way, the ep's behavior will not be affected, and the gadget
driver is also notified.
Cc: Xuebing Wang <xbing6@gmail.com> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Antoine Tenart [Wed, 26 Nov 2014 05:44:35 +0000 (13:44 +0800)]
usb: chipidea: fix phy handling
The generic plaftorm device for ChipIdea drivers is probed by calling
ci_hdrc_probe. The device structure used is not the one of the specific
ChipIdea driver but the one of the generic ChipIdea platform device.
This results in not being able to probe the PHYs as we're not using the
right device structure. Since all ChipIdea drivers are retrieving their
PHYs in their specific driver code, this didn't impact any of them yet.
Fixes it using the right device structure (dev->parent).
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 21a5b579cb63364b90e545e7e0a4bccb027711e8)
Peter Chen [Wed, 26 Nov 2014 05:44:33 +0000 (13:44 +0800)]
usb: chipidea: parameter 'mode' isn't needed for hw_device_reset
The hw_device_reset is dedicated to be used at device mode initializaiton,
so delete the parameter 'mode'. For host driver, the ehci driver will
handle all things.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 5b1573005a91dc448e6919d6bec076bedc7e1919)
Peter Chen [Wed, 26 Nov 2014 05:44:28 +0000 (13:44 +0800)]
usb: chipidea: add hw_wait_phy_stable for getting stable status
The phy needs some delay to output the stable status from low
power mode. And for OTGSC, the status inputs are debounced
using a 1 ms time constant, so, delay 2ms for controller to get
the stable status(like vbus and id) when the phy leaves low power.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b82613cf09455d9a50fbb144ef07b68225f2b452)
Arjun Sreedharan [Thu, 20 Nov 2014 15:53:36 +0000 (21:23 +0530)]
usb: phy: propagate __of_usb_find_phy()'s error on failure
When __of_usb_find_phy() fails, it returns -ENODEV - its
error code has to be returned by devm_usb_get_phy_by_phandle().
Only when the former function succeeds and try_module_get()
fails should -EPROBE_DEFER be returned.
[ balbi@ti.com : remove trailing whitespace ]
Signed-off-by: Arjun Sreedharan <arjun024@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 1290a958d48e30d60262a33acb5f068e87834ce4)
Peter Chen [Tue, 4 Nov 2014 03:14:31 +0000 (11:14 +0800)]
usb: core: notify disconnection when core detects disconnect
It is safe to call notify disconnect when the usb core
thinks the device is disconnected.
This commit also fixes one bug found at below situation:
we have not enabled usb wakeup, we do system suspend when
there is an usb device at the port, after suspend, we plug out
the usb device, then plug in device again. At that time,
the nofity disconnect was not called at current code, as
the controller doesn't know the usb device was disconnected
during the suspend, but USB core knows the port has changed
during that periods.
So to fix this problem, and let the usb core call notify disconnect.
Cc: 3.17+ <stable@vger.kernel.org> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b2108f1e519e983e5dd5712b3a44f7366ab509e4)
Tony Zheng [Fri, 17 Oct 2014 11:43:02 +0000 (19:43 +0800)]
usb: core: need to call usb_phy_notify_connect after device setup
Since we notify disconnecting based on the usb device is existed
(port_dev->child, the child device at roothub is not NULL), we
need to notify connect after device has been registered.
This fixes a bug that do fast plug in/out test, and the notify_disconnect
is not called due to roothub child is NULL and the enumeration has failed.
Cc: v3.17+ <stable@vger.kernel.org> Signed-off-by: Tony Zheng <Tony.Zheng@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 01ed67dc70834d00d62b6e754ee0f76301fbc140)
The current EHCI implementation is prepared to toggle the
PORT_POWER bit to enable or disable a USB-Port. In some
cases this port power can not be just toggled by the PORT_POWER
bit, and the gpio-regulator is needed to be toggled too.
This patch defines a port power control interface ehci_port_power for
ehci core use, it toggles PORT_POWER bit as well as calls platform
defined .port_power if it is defined.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Acked-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 11a7e59405148c855e0a9d13588930ccec02c150)
Antoine Tenart [Thu, 30 Oct 2014 17:41:19 +0000 (18:41 +0100)]
usb: chipidea: add support to the generic PHY framework
This patch adds support of the PHY framework for ChipIdea drivers.
Changes are done in both the ChipIdea common code and in the drivers
accessing the PHY. This is done by adding a new PHY member in
ChipIdea's structures and by taking care of it in the code.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 1e5e2d3d055436c114e2f16145b83339aed024ff)
projects / karo-tx-linux.git / log