Now that we have a way to pass MFD cells down to the sub drivers,
we can gradually get rid of mfd_data by putting the platform pointer
back in place.
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
But the above commit also change the name from data_size to pdata_size,
This patch just give one fix for the pfuze driver to use pdata_size field.
Jason Liu [Tue, 17 Jan 2012 11:00:30 +0000 (19:00 +0800)]
ENGR00172222:imx6_defconfig: enable ARM errata software workaround 764369
We need enable the following ARM errata software workaround:
CONFIG_ARM_ERRATA_764369=y
This errata is TKT078684 in i.MX6Q errata list.
In order to enable this errata, we need cherry-pick the following commit:
ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed: f64f6df4241093ea928b0a263ec53b93b65efc08
In order to apply the above patch successfully and keep the git history, we also
need cherry-pick the following commit:
Huang Shijie [Mon, 16 Jan 2012 07:01:55 +0000 (15:01 +0800)]
ENGR00169906-5 GPMI : change the code for new interface
If we do not set the WAIT4END in the middle DMA command structure
of the long DMA command chain, a DMA timeout may occurs.
The reason of the DMA timeout is:
[1] We do not set the WAIT4END in the DMA command structure
which do the ECC READ PAGE by the BCH.
[2] So the following DMA command structure (maybe in other DMA
CHAIN)may disable the BCH module.
[3] If the time delay between [2] and [1] is long enough,
it's ok. But if the time delay is not long enough, the BCH
module may become unnormal, so it can not finish its job.
The DMA will timeout in this case.
We have changed the DMA interface to fix the bug, now use the new
interface.
Acked-by: Jason Liu <r64343@freescale.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
But in the NAND ECC read case, the WAIT4END bit should be set
not only at the last DMA Command Structure, but also at the middle one,
such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^ ^
| |
| |
set WAIT4END here too set WAIT4END here
We set the WAIT4END in the middle DMA Command Structure to ensure
the BCH module finishs its job. If we do not wait in this situation,
the BCH module may be changed in the following DMA Command Structures,
and it maybe becomes unstable which will cause a DMA timeout
This has been catched in the MX6Q board.
So rewrite the last parameter of mxs_dma_prep_slave_sg().
Add some more flags to let the driver sets the WAIT4END as it needs.
Acked-by: Jason Liu <r64343@freescale.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
Even Xu [Tue, 17 Jan 2012 02:04:31 +0000 (10:04 +0800)]
ENGR00172175 MX6Q: OV5640_MIPI support fast configure
OV5640_MIPI need to be configure faster to get capture image
quickly. So change the configures, when change the resolution
OV5640_MIPI sensor will not do reset.
Fugang Duan [Wed, 11 Jan 2012 05:34:40 +0000 (13:34 +0800)]
ENGR00171622 - FEC : workaround for Gb enet in sabrelite board.
Micrel phy KSZ9021 Gb speed cannot work well in i.MX6 sabrelite
board. Advertise PHY is not 1000Base-T capable.
If nfs boot kernel, phy will work at 100Mbps, or else phy will
work at Gbps mode. And if hot-plugin cable, phy will work at Gbps
mode. Enet can work well in all of them.
But in Gbps mode, uDMA sometime cannot write frame "L" bit in
exuberate transfer, so driver will print some warning message:
"FEC ENET: rcv is not +last"
Hake Huang [Wed, 11 Jan 2012 10:39:08 +0000 (18:39 +0800)]
ENGR00171792: MX6Q_ARD: fix the pad setting conflicts between can0 and enet
1. need add 'can0' in kernel commandline to enable can1,
the default enet is enabled, can2 is not affected by this.
2. add MX6Q_PAD_SD2_DAT0__GPIO_1_15 back in pad setting,
as this is required for enet rework.
add 4.7k pull down and GPIO_1_15 will reset the u39,
to make it functional, we need pull high.
3. the ENET PHY steering is configured by u39 setting.
Peter Chen [Wed, 11 Jan 2012 03:27:45 +0000 (11:27 +0800)]
ENGR00171544 usb-core: usb host will be broken after system pm test
At i.mx6q sabrelite, there is a usb hub on board. After several
suspend suspend/resume iterations, the usb host will be broken.
It is IC limitation, and similar with: 574b9641d5846e58273dac6bf80fcf1ff312c5c9
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: make shi <b15407@freescale.com>
Sandor Yu [Mon, 9 Jan 2012 13:23:33 +0000 (21:23 +0800)]
ENGR00171444 HDMI: Change video mode system will hang.
There are two couples register for HDMI PHY interrupt/mask:
HDMI_FC_INT2, HDMI_FC_MASK2 and HDMI_IH_FC_STAT2, HDMI_IH_MUTE_FC_STAT2.
The register can not mixed use it, otherwise the interrupt will missing
and not clean.
Mask interrupt with HDMI_IH_MUTE_FC_STAT2 so check interrupt
should use register HDMI_IH_FC_STAT2.
Alejandro Sierra [Thu, 22 Dec 2011 15:29:55 +0000 (09:29 -0600)]
ENGR00170817 UART2 iomux fix configuration
Added iomux configuration pads to support UART2 through GPIO 7 and GPIO 8
Add flag to enable uart2. This flag avoids configure GPIO7 as CAN mode
when the uart2 is used. The flag is passed through bootargs and is called
uart2.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
Lothar Waßmann [Mon, 8 Aug 2011 12:47:47 +0000 (14:47 +0200)]
mxs-dma: enable CLKGATE before accessing registers
After calling mxs_dma_disable_chan() for a channel, that channel
becomes unusable because some controller registers can only be written
when the clock is enabled via CLKGATE.
Shawn Guo [Thu, 30 Jun 2011 08:06:33 +0000 (16:06 +0800)]
dmaengine: mxs-dma: skip request_irq for NO_IRQ
In general, the mxs-dma users get separate irq for each channel,
but gpmi is special one which has only one irq shared by all gpmi
channels. It causes mxs_dma channel allocation function fail for
all other gpmi channels except the first one calling into the
function.
The patch gets request_irq call skipped for NO_IRQ case, and leaves
this gpmi specific quirk to gpmi driver to sort out. It will fix
above problem if gpmi driver sets chan_irq as gpmi irq for only one
channel and NO_IRQ for all the rest channels.
Fix CAN1 STBY, EN and STEER pins to be managed through
the IO expander(2) using GPIO's 3,5 and 6. Routes CAN2
TX pin correctly.STEER pin is managed dynamically when
either of the CAN interfaces is UP and/or DOWN.
CAN definitions removed for code clarification.
b37753 [Fri, 6 Jan 2012 21:50:40 +0000 (15:50 -0600)]
ENGR00170444: [v3]imx6sabreauto adv7180 TVin port
Kconfig and Makefile was modified in order to
enable adv7180 driver for mx6q architecture.
adv7180.c mutex was changed to semaphore as is described in
"https://lwn.net/Articles/304725/ ".
sensor data structure is added in fsl_devices.h.
mxc_v4l2_capture.c condition in mxc_v4l2_sparam
was removed because is going to be always true
capture mode only have 1 possible value as is described in
"https://lwn.net/Articles/235023/".
ipu_capture.c clock divisor setup was added at init the csi.
b37753 [Fri, 6 Jan 2012 21:03:08 +0000 (15:03 -0600)]
ENGR00170444: [v3]imx6sabreauto adv7180 TVin port
imx6sabreauto adv7180 TVin port
ioexpanders addresss were incorrect, modification in
board-mx6q_sabreauto.c was done.
adv7180 boot structures and i2c structures were added in board-mx6q_sabreauto.c
i2c3 was not configured properly modified in iomux-mx6q.h.
Francisco Munoz [Fri, 16 Dec 2011 23:16:03 +0000 (17:16 -0600)]
ENGR00170124: Fix for USBH1 OTG IOMUX and GPIOs in board-mx6q_sabreauto.c
USBH1 was not responding to plug events
USBH1 power up settings trough Port Exp B
OTG power up settings trough Port Exp C
Functionality was tested using a mx6qsabreauto cpu board + 53ARD main board
Signed-off-by: Francisco Munoz <b37752@freescale.com>
ENGR00169747 MX6Q:ARD:Enable SD1 Card reader from ARD Main board
Fix to enable SD1 Card reader for MX6Q ARD. This enables SD1 reader
from main board. SD1 does not support SD3.0 to maintain compatiblity
of MX53 Mainboard.
Chen Liangjun [Sat, 31 Dec 2011 03:03:33 +0000 (11:03 +0800)]
ENGR00162913-1 ASRC:fix asrc_audio_clock divider set bug
The asrc_audio_clock in MX5 is different from MX6.Thus the divider
value set can not be used in the MX6. Part of noise of ASRC output
is caused by this.
Add the function to calculate the divider and prescaler value
according to the sample rate and asrc_audio_clock.
issue:
in the reverted patch, sdhc driver will claim host on its
entering suspend state. and the wifi driver will hold host on
its loading. so once system is about to enter suspend state,
system will be pended on claiming host.
Even Xu [Fri, 30 Dec 2011 10:03:45 +0000 (18:03 +0800)]
ENGR00171035 Fix OV3640 XGA can not work
- Fix OV3640 XGA cannot work, XGA can be supported
- Add OV3640 720P, 1080P at 15fps support
- Fix a MXC_V4L2_CAPTURE driver bug, when setting param,
only when current mode and framerate are the same
with param, then not change current setting again
Tony LIU [Fri, 30 Dec 2011 06:34:38 +0000 (14:34 +0800)]
ENGR00171027-3 usbcore:after plug in/out on the hub,host can't work
This issue will happen only when suspend bit is set but phcd is not set
The root cause of this issue is the IC defect.
- If the suspend bit is set without phcd bit set, host controller
can't resume normally
- The workaround is after set suspend bit, we need set the following
bit in USB PHY at once:
HW_USBPHY_PWD_RXPWDRX
HW_USBPHY_PWD_RXPWDDIFF
HW_USBPHY_PWD_RXPWD1PT1
HW_USBPHY_PWD_RXPWDENV
HW_USBPHY_PWD_TXPWDv2I
HW_USBPHY_PWD_TXPWDIBIAS
HW_USBPHY_PWD_TXPWDFS
- Furthermore, after resume, we must clear these bits during the K state
- IC has no plan to fix this issue
- This issue only happen on MX6Q/MX28
core part
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Tony LIU [Fri, 30 Dec 2011 06:32:41 +0000 (14:32 +0800)]
ENGR00171027-2 [USB_HOST]after plug in/out on the hub,host can't work
This issue will happen only when suspend bit is set but phcd is not set
The root cause of this issue is the IC defect.
- If the suspend bit is set without phcd bit set, host controller
can't resume normally
- The workaround is after set suspend bit, we need set the following
bit in USB PHY at once:
HW_USBPHY_PWD_RXPWDRX
HW_USBPHY_PWD_RXPWDDIFF
HW_USBPHY_PWD_RXPWD1PT1
HW_USBPHY_PWD_RXPWDENV
HW_USBPHY_PWD_TXPWDv2I
HW_USBPHY_PWD_TXPWDIBIAS
HW_USBPHY_PWD_TXPWDFS
- Furthermore, after resume, we must clear these bits during the K state
- IC has no plan to fix this issue
- This issue only happen on MX6Q/MX28
driver part
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Tony LIU [Fri, 30 Dec 2011 06:07:18 +0000 (14:07 +0800)]
ENGR00171027-1 [USB_HOST]after plug in/out on the hub,host can't work
This issue will happen only when suspend bit is set but phcd is not set
The root cause of this issue is the IC defect.
- If the suspend bit is set without phcd bit set, host controller
can't resume normally
- The workaround is after set suspend bit, we need set the following
bit in USB PHY at once:
HW_USBPHY_PWD_RXPWDRX
HW_USBPHY_PWD_RXPWDDIFF
HW_USBPHY_PWD_RXPWD1PT1
HW_USBPHY_PWD_RXPWDENV
HW_USBPHY_PWD_TXPWDv2I
HW_USBPHY_PWD_TXPWDIBIAS
HW_USBPHY_PWD_TXPWDFS
- Furthermore, after resume, we must clear these bits during the K state
- IC has no plan to fix this issue
- This issue only happen on MX6Q/MX28
MSL part Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Anson Huang [Fri, 30 Dec 2011 06:55:14 +0000 (14:55 +0800)]
ENGR00171087 [MX6]Need to add L1 Icache invalidate
As there might be dirty data line on any core of MX6
SOC when power on or reset, we need to do L1 I-cache
invalidation in the resume process and start up
process for all cores.
This is very important for us, as not all of the hardware
will do cache invalidation during power on or reset, so
we need to do the invalidation for all cache(L1, L2,
I and D) before first time enabling. Please keep in mind.
Yuxi Sun [Wed, 28 Dec 2011 06:20:20 +0000 (14:20 +0800)]
ENGR00171010 enable exposure calculate function
Exposure calculate function was not used and this produce build
warning, enable this function not only remove this warning, but
also get a better image quality when take picture.
Robin Gong [Wed, 28 Dec 2011 03:43:08 +0000 (11:43 +0800)]
ENGR00171001-2 MX6Q PFUZE100: fix build warnings
fix build warnings on pfuze driver:
arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c:388:
warning: initialization from incompatible pointer type
drivers/mfd/pfuze-core.c:523:
warning: initialization from incompatible pointer type
drivers/mfd/pfuze-core.c:412:
warning: 'pfuze_add_subdevice' defined but not used
Tony Lin [Wed, 28 Dec 2011 02:34:17 +0000 (10:34 +0800)]
ENGR00170998 [MX6Q MMC]build warning
fix following build warning:
drivers/mmc/host/sdhci.c: In function 'sdhci_clk_worker':
drivers/mmc/host/sdhci.c:53: warning: unused variable 'flags'
drivers/mmc/host/sdhci.c: In function 'sdhci_resume_host':
drivers/mmc/host/sdhci.c:1751:
warning: 'ret' may be used uninitialized in this function
Tony Lin [Tue, 27 Dec 2011 05:47:09 +0000 (13:47 +0800)]
ENGR00170944 [MX6Q MMC]suspend/resume crash
if the system suspend in the process of data transfer, current request
is broken by the suspend request, thus there're sd/mmc requests error logs.
to prevent this error, add a claim host in suspend function and release it
in resume function to make sure the request is finished before entering suspend
and next request could be started after resuming.
Fugang Duan [Wed, 21 Dec 2011 10:32:11 +0000 (18:32 +0800)]
ENGR00170784 - FEC : dma skb buffer map is not used rightly.
Enable "CONFIG_DMA_API_DEBUG" in kernel, and system print:
DMA-API: device driver tries to free DMA memory it has not
allocated [device address=0x0000000046688020]...[<80222494>]
(debug_dma_unmap_page+0x8c/0x98) from [<802a36a0>]
(fec_enet_interrupt+0x430/0x5ac)
Loren Huang [Mon, 26 Dec 2011 07:46:06 +0000 (15:46 +0800)]
ENGR00170751 Enable clock gating while gpu core comes to idle
-Correct gc355 initial power state to poweroff.
-Separate clock gating operation in function gckOS_SetGPUPower().
-Turn on clock while suspend GPU cores.
-Remove clock switch in drv_open().
Tony LIU [Thu, 22 Dec 2011 11:07:03 +0000 (19:07 +0800)]
ENGR00170144 [USB-Host] Fix the following USB hub issue on mx6q
- After auto suspend, attach device to hub will cause host can't work any more
- after system suspend, attach device to hub will cause host can't work any more
- HSDISCONNECTDEC logic error
- Set RUNSTOP in bus suspend, if no short delay, host can't work any more
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Anson Huang [Fri, 23 Dec 2011 08:07:50 +0000 (16:07 +0800)]
ENGR00170897 [MX6]Enable WAIT mode by default
NFS can work with WAIT mode only if the NFS use
TCPIP protoco, in order to test more features of
WAIT mode, we enable it by default and make sure
NFS is using TCPIP protocol.
Peter Chen [Mon, 19 Dec 2011 01:27:18 +0000 (09:27 +0800)]
ENGR00170530 usb-udc: Some tiny bug fixes
Most of them are from community
- Using correct dequeue method
- Fix the ISOC_XFER condition judgement
- Need to wmb before prime
- Fix some conditions of udc->max_ep judgement
Signed-off-by: Peter Chen <peter.chen@freescale.com>
projects / karo-tx-linux.git / log