Kevin Hilman [Thu, 11 Jun 2015 22:41:58 +0000 (15:41 -0700)]
ARM: socfpga: fix build error due to secondary_startup
After commit 02b4e2756e01 (ARM: v7 setup function should invalidate L1
cache) the soc specific secondary_startup is removed, causing build
failures:
../arch/arm/mach-socfpga/platsmp.c: In function 'socfpga_a10_boot_secondary':
../arch/arm/mach-socfpga/platsmp.c:66:140: error: 'socfpga_secondary_startup' undeclared (first use in this function)
../arch/arm/mach-socfpga/platsmp.c:66:140: note: each undeclared identifier is reported only once for each function it appears in
To fix, use the generic secondary_startup.
Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
Extend the Exynos entry to ARM64 device tree sources.
Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene@kernel.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Kevin Hilman <khilman@linaro.org>
Kevin Hilman [Thu, 11 Jun 2015 21:44:21 +0000 (14:44 -0700)]
Merge tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Samsung updates for v4.2
- add failure(exception) handling
: of_iomap(), of_find_device_by_node() and kstrdup()
- add common poweroff to use PS_HOLD based for all of exynos SoCs
- add exnos_get/set_boot_addr() helper
- constify platform_device_id and irq_domain_ops
- get current parent clock for power domain on/off
- use core_initcall to register power domain driver
- make exynos_core_restart() less verbose
- add support coupled CPUidle for exynos3250
- fix exynos_boot_secondary() return value on timeout
- fix clk_enable() in s3c24xx adc
- fix missing of_node_put() for power domains
* tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (301 commits)
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
ARM: EXYNOS: Get current parent clock for power domain on/off
ARM: SAMSUNG: fix clk_enable() WARNing in S3C24XX ADC
ARM: EXYNOS: Add missing of_node_put() when parsing power domains
ARM: EXYNOS: Handle of_find_device_by_node() and kstrdup() failures
ARM: EXYNOS: Handle of of_iomap() failure
Linux 4.1-rc4
....
Mika Westerberg [Mon, 8 Jun 2015 13:22:39 +0000 (15:22 +0200)]
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
This includes setting up EGPIOs 0 and 9 for card detection and
chip select respectively. This patch is needed to mount a root
filesystem on the SPI-based MMC card reader found on the Sim.One.
Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
Kevin Hilman [Wed, 10 Jun 2015 23:58:05 +0000 (16:58 -0700)]
Merge tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
The i.MX SoC updates for 4.2:
- Add new SoC i.MX7D support, which integrates two Cortex-A7 and one
Cortex-M4 cores.
- Support suspend from IRAM on i.MX53, so that DDR pins can be set to
high impedance for more power saving during suspend.
- Move i.MX clock drivers from arch/arm/mach-imx to drivers/clk/imx.
- Move i.MX GPT timer driver from arch/arm/mach-imx into
drivers/clocksource.
- A couple of clock driver update for VF610 and i.MX6Q.
- A few random code correction and improvement.
* tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits)
ARM: imx: imx7d requires anatop
clocksource: timer-imx-gpt: remove include of <asm/mach/time.h>
ARM: imx: move timer driver into drivers/clocksource
ARM: imx: remove platform headers from timer driver
ARM: imx: provide gpt device specific irq functions
ARM: imx: get rid of variable timer_base
ARM: imx: define gpt register offset per device type
ARM: imx: move clock event variables into imx_timer
ARM: imx: set up .set_next_event hook via imx_gpt_data
ARM: imx: setup tctl register in device specific function
ARM: imx: initialize gpt device type for DT boot
ARM: imx: define an enum for gpt timer device type
ARM: imx: move timer resources into a structure
ARM: imx: use relaxed IO accessor in timer driver
ARM: imx: make imx51/3 suspend optional
ARM: clk-imx6q: refine sata's parent
ARM: imx: clk-v610: Add clock for I2C2 and I2C3
ARM: mach-imx: iomux-imx31: Use DECLARE_BITMAP
ARM: imx: add imx7d clk tree support
ARM: clk: imx: update pllv3 to support imx7
...
Kevin Hilman [Wed, 10 Jun 2015 23:04:48 +0000 (16:04 -0700)]
Merge branch 'socfpga/soc' into next/soc
* socfpga/soc:
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
Dinh Nguyen [Wed, 3 Jun 2015 02:14:02 +0000 (21:14 -0500)]
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
Add boot_secondary implementation for the Arria10 platform. Bringing up
the secondary core on the Arria 10 platform is pretty similar to the
Cyclone/Arria 5 platform, with the exception of the following differences:
- Register offset to bringup CPU1 out of reset is different.
- The cpu1-start-addr for Arria10 contains an additional nibble.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
ARM: EXYNOS: register power domain driver from core_initcall
SYSMMU devices are registered very early in arch_initcall, so ensure
that they can get access to power domains by registering power domain
driver from earlier initcall. This change requires dropping usage of
the platform device associated with each power domain and replacing
clock calls with respective of_clk_* equivalents.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
PS_HOLD based power off procedure is common for all Exynos SoCs,
so use it for every Exynos SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
The following patch adds coupled cpuidle support for Exynos3250 to
an existing cpuidle-exynos driver. As a result it enables AFTR mode
to be used by default on Exynos3250 without the need to hot unplug
CPU1 first.
The detailed changelog:
- use exynos_[get,set]_boot_addr() in cpuidle-exynos.c and then make
cpu_boot_reg_base() static
- use exynos_core_restart() in exynos_cpu0_enter_aftr()
- add missing smp_rmb() to exynos_cpu0_enter_aftr() (to make the code
in-sync with the platform SMP code)
- add call_firmware_op(cpu_boot, 1) to exynos_cpu0_enter_aftr()
- use dsb_sev() instead of IPI wakeup for Exynos3250 in
exynos_cpu0_enter_aftr()
- add CPU0 vs CPU1 synchronization based on S5P_PMU_SPARE2 register
for Exynos3250 to cpuidle-exynos.c
- add flush_cache_all() for CPU1/0 before powerdown/AFTR for
Exynos3250 to exynos_wfi_finisher()/exynos_do_idle()
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
Add get_cpu_boot_addr() firmware operation and then
exynos_get_boot_addr() helper.
This is a preparation for adding coupled cpuidle support
for Exynos3250 SoC.
There should be no functional changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
ARM: EXYNOS: make exynos_core_restart() less verbose
There is a kernel message about secondary CPU bootup when
exynos_core_restart() is called through CPU hotplug code-path (the
only exynos_core_restart() user currently) so there is no need for
an extra info on Exynos3250 SoC about software reset. This also
prepares exynos_core_restart() to be re-used in coupled cpuidle
code-path in the future.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
exynos_boot_secondary() can erroneously return 0 or -ENOSYS even
when waiting on pen_release being set to -1 timeouts. Fix it by
adjusting ret variable value to -ETIMEDOUT when necessary.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
ARM: EXYNOS: Get current parent clock for power domain on/off
Using a fixed (by DTS) parent for clocks when turning on the power
domain may introduce issues in other drivers. For example when such
driver changes the parent during runtime and expects that he is the
only place of such change.
Do not rely on DTS providing the fixed parent for such clocks. Instead
before switching domain off, grab a current parent of a clock with
clk_get_parent().
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Kukjin Kim <kgene@kernel.org>
ARM: EXYNOS: Add missing of_node_put() when parsing power domains
Add missing of_node_put() to:
1. Error return path if allocating memory for exynos_pm_domain failed.
2. Second iteration over power domains if a child domain was not
present or was incomplete.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reported-by: Karol Wrona <k.wrona@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
ARM: EXYNOS: Handle of_find_device_by_node() and kstrdup() failures
Prevent possible NULL pointer dereference of pointer returned by
of_find_device_by_node(). Handle this by skipping such power domain.
Additionally fail the init on kstrdup() failure. Such case is actually
not fatal because the name for power domain allocated by kstrdup() is
used only in printk. Still as a precaution handle this as an error
condition.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
Arnd Bergmann [Fri, 29 May 2015 09:28:05 +0000 (11:28 +0200)]
ARM: imx: imx7d requires anatop
Like i.MX6, the i.MX7 code calls into the anatop driver, which fails
if that is disabled:
arch/arm/mach-imx/built-in.o: In function `imx7d_init_machine':
arch/arm/mach-imx/mach-imx7d.c:24: undefined reference to `imx_anatop_init'
arch/arm/mach-imx/built-in.o: In function `imx7d_init_irq':
arch/arm/mach-imx/mach-imx7d.c:29: undefined reference to `imx_init_revision_from_anatop'
This patch ensures that for an imx7-only build, we still get anatop
built-in, matching what we do for imx6. We also need to select
HAVE_IMX_MMDC, as that is needed by the anatop code.
Shawn Guo [Fri, 22 May 2015 14:42:55 +0000 (22:42 +0800)]
ARM: imx: provide gpt device specific irq functions
It splits irq enable/disable/acknowledge operations into device specific
functions as the hooks in imx_gpt_data, so that we can save the use of
timer_is_xxx() and cpu_is_xxx() checking in these irq functions.
Shawn Guo [Fri, 22 May 2015 14:23:28 +0000 (22:23 +0800)]
ARM: imx: get rid of variable timer_base
We now have pointer to imx_timer structure available where timer base
address is needed, so we can just kill global timer_base by using
imxtm->base instead.
Shawn Guo [Fri, 22 May 2015 13:39:55 +0000 (21:39 +0800)]
ARM: imx: define gpt register offset per device type
It defines offset of gpt registers TSTAT, TCN and TCMP per device
type in imx_gpt_data, so that these registers can be accessed in an
way without timer_is_v2() checking.
Shawn Guo [Fri, 22 May 2015 08:38:49 +0000 (16:38 +0800)]
ARM: imx: move clock event variables into imx_timer
Since we now have imx_timer structure, it makes more sense to move those
clock event related variables into the structure, so that we can save
some global variables.
Shawn Guo [Fri, 15 May 2015 03:41:39 +0000 (11:41 +0800)]
ARM: imx: define an enum for gpt timer device type
Define an enum for gpt timer device type in include/soc/imx/timer.h to
tell the gpt block differences among SoCs. Update non-DT users (clock
drivers) to pass the device type.
As we now have include/soc/imx/timer.h, the declaration of
mxc_timer_init() is moved into there as the best fit.
Shawn Guo [Fri, 22 May 2015 05:53:45 +0000 (13:53 +0800)]
ARM: imx: move timer resources into a structure
Instead of passing around as individual argument, let's move timer
resources like irq and clocks together with base address into a data
structure, and pass pointer of the structure as argument to simplify
the function call interface.
Shawn Guo [Tue, 19 May 2015 10:47:47 +0000 (18:47 +0800)]
ARM: imx: use relaxed IO accessor in timer driver
Replace the __raw_readl/__raw_writel with readl_relaxed/writel_relaxed
which is endian-safe, as a step of moving the driver code into folder
drivers/clocksource.
Arnd Bergmann [Thu, 21 May 2015 12:06:30 +0000 (14:06 +0200)]
ARM: imx: make imx51/3 suspend optional
A recent change to the imx53 power management caused a build
regression when CONFIG_SOC_IMX53 is disabled:
mach-imx/built-in.o:(.init.rodata+0x60): undefined reference to `imx53_suspend'
mach-imx/built-in.o:(.init.rodata+0x64): undefined reference to `imx53_suspend_sz'
This avoids the problem by compiling the code in question
conditionally on the presence of CONFIG_SOC_IMX53. For
consistency, I'm also changing the same thing for
CONFIG_SOC_IMX51.
An additional benefit of this approach is reduced code size
for kernels that only include support for one of the two
SoCs.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 1579c7b9fe01 ("ARM: imx53: Set DDR pins to high impedance when in suspend to RAM.") Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Frank Li [Mon, 18 May 2015 18:45:03 +0000 (02:45 +0800)]
ARM: imx: add imx7d clk tree support
Add i.MX7D clk tree support.
Enable all clock to bring up imx7.
Clock framework need be modified a little since imx7d
change clock design. otherwise system will halt and block the
other part upstream.
All clock refine need wait for Dong Aisheng's patch
clk: support clocks which requires parent clock on during operation
Or other solution ready.
Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Stefan Agner [Sun, 17 May 2015 22:13:33 +0000 (00:13 +0200)]
ARM: imx: clk-vf610: enable debug access port by default
Enabled DAP (debug access port) by default. This enables the hw-
breakpoint framework to make use of the breakpoints and watchpoints
supported by hardware.
[ 0.215805] hw-breakpoint: found 2 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.224624] hw-breakpoint: maximum watchpoint size is 4 bytes.
Without this clock, the hw-breakpoint driver claims an undefined
instruction during initialization:
[ 0.227380] hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 0
[ 0.227519] hw-breakpoint: CPU 0 failed to disable vector catch
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Martin Fuzzey [Tue, 12 May 2015 13:31:03 +0000 (15:31 +0200)]
ARM: imx53: Set DDR pins to high impedance when in suspend to RAM.
In order to save power the DDR pins should be put into high
impedance when in suspend to RAM.
This requires manually requesting self refresh (rather than using the
automatic mode implemented by the CCM / ESDCTL), followed by
reconfiguring the IOMUXC.
Of course the code to do this cannot itself run from DDR so the
code is copied to and executed from internal memory.
In my tests using a custom i.MX53 board with LPDDR2 RAM
this reduced the suspend power consumption from 200mW to 60mW.
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shenwei Wang [Wed, 29 Apr 2015 21:40:27 +0000 (16:40 -0500)]
ARM: imx: Correct the comments in time.c
The comments were corrected as the following to reflect
the real situation of Freescale MXC timer IP block.
There are totally 4 version of the timer on Freescale i.MX SoCs.
Signed-off-by: Shenwei Wang <shenwei.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Anson Huang [Thu, 7 May 2015 16:16:51 +0000 (00:16 +0800)]
ARM: imx: using unsigned variable for do_div
The definition of do_div uses unsigned long long
variable as its first parameter, better to pass
a u64 variable as first parameter when calling
do_div function.
ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier
Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function")
moves imx6_set_lpm() from clock init function into
imx6_pm_common_init(). This causes a hang when cpuidle support is
enabled. The reason for that is ARM core clock is shut down
unexpectedly by WAIT mode. It happens with the following call stack:
When wait_for_completion() is called as above, all cores are idle/WFI.
Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a
hardware shutdown of the ARM core clock.
To fix the regression, we need to ensure that CCM_CLPCR_LPM is
initialized into RUN mode earlier than cpuidle governor registration,
which is a postcore_initcall. This patch creates function
imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into
RUN mode, and have the function called from machine .init_irq hook,
which should be early enough.
Reported-by: Kevin Hilman <khilman@kernel.org> Fixes: 8fb76a07e2cb ("ARM: imx6: set initial power mode in pm function") Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Tyler Baker <tyler.baker@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM: imx: drop epit timer initialization from imx35 clock driver
EPIT provides another timer implementation besides the default GPT
timer. The imx35 clock driver will use EPIT timer when option
CONFIG_MXC_USE_EPIT is enabled. However, initializing timers from
clock driver is a workaround solution and causes problem when we move
clock drivers into driver/clk.
Let's simply drop the EPIT initialization from there. If people really
want this EPIT option, EPIT timer driver needs to be reworked to do the
initialization in a standard way - use CLOCKSOURCE_OF_DECLARE() with
device tree support.
Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
With the cleanup done before, we now can simply define base address and
irq as needed in clock driver, to get those platform header inclusions
removed.
Instead of calling cpu_is_xxx() in clk-pllv1 driver, let's add clk-pllv1
type support to handle the difference/quirk in particular SoC designs.
Doing so will help get clk-pllv1 driver ready for being moved out of
arch/arm/mach-imx folder.
ARM: imx6: do not use cpu_is_xxx() in clock driver
As we're about to move clock drivers out of arch/arm/mach-imx,
cpu_is_xxx() shouldn't be used any more. Let's avoid the call by
looking at the device tree machine compatible string to determine
which SoC the clock driver is running on.
We are about to move imx6 clock driver into drivers/clk, so let's get
imx6 pm code map CCM block on its own rather than relying on clock
driver to do the mapping.
Rather than setting initial low-power mode in every single i.MX6 clock
initialization function, we should really do that in pm code. Let's
move imx6q_set_lpm(WAIT_CLOCKED) call into imx6_pm_common_init().
While at it, let's rename the function to imx6_set_lpm() since it's
actually common for all i.MX6 SoCs.
We are about to move imx5 clock driver into drivers/clk, so let's get
imx5 pm code map CCM block on its own rather than relying on clock
driver to do the mapping.
ARM: imx: move revision definitions and declarations into a header
The revision definitions and declarations are widely used by clock
drivers. As a step of moving clock drivers out of arch/arm/mach-imx,
let's create header include/soc/imx/revision.h to accommodate them.
Pass physical address of timer block to mxc_timer_init() call, which in
turn does dynamic mapping within the function. Thus, we can avoid using
static mapping in clock drivers.
Arnd Bergmann [Mon, 1 Jun 2015 15:54:31 +0000 (17:54 +0200)]
Merge tag 'arm-soc/for-4.2/soc-part2' of http://github.com/broadcom/stblinux into next/soc
Merge "changes for Broadcom SoCs":
- Dan fixes an error path in the BCM63xx SMP code
- Ray adds the relevant Kconfig selects to enable the Broadcom NAND driver on Cygnus
- Kevin provides a change to the Broadcom GISB arbiter driver to make it work with
MIPS-based big-endian STB SoCs (this was a long-standing change that had dependencies on
code in drivers/of/*)
- Gregory enables the use of GPIOLIB for brcmstb SoCs and bumps the number of GPIOs for
these platforms
* tag 'arm-soc/for-4.2/soc-part2' of http://github.com/broadcom/stblinux:
ARM: brcmstb: Add default gpio number
ARM: brcmstb: Select ARCH_WANT_OPTIONAL_GPIOLIB
bus: brcmstb_gisb: Honor the "big-endian" and "native-endian" DT properties
ARM: BCM: Enable NAND support for iProc SoCs
ARM: BCM63xx: fix an error path in bcm63xx_pmb_power_on_cpu()
Gregory Fong [Fri, 29 May 2015 02:14:10 +0000 (19:14 -0700)]
ARM: brcmstb: Add default gpio number
Out of the brcmstb SoCs that I know, BCM3390 has the largest numbers
of GPIOs, with its
- 320 "peripheral" GPIOs
- 5*32 = 160 UPG GPIOs (counting unused lines, which do get counted)
- 2*32 = 64 UPG AON GPIOs (counting unused lines)
Total: 544
I suspect that the upper limit will only need to be higher in the
future, so set it to 1024.
Arnd Bergmann [Tue, 19 May 2015 13:40:37 +0000 (15:40 +0200)]
ARM: shmobile: only select sound drivers that build
A couple of codec drivers are selected by shmobile platform code,
but depend on I2C, which results in a build error:
sound/soc/codecs/ak4642.c:638:1: warning: data definition has no type or storage class
module_i2c_driver(ak4642_i2c_driver);
^
sound/soc/codecs/ak4642.c:638:1: error: type defaults to 'int' in declaration of 'module_i2c_driver' [-Werror=implicit-int]
sound/soc/codecs/ak4642.c:638:1: warning: parameter names (without types) in function declaration
sound/soc/codecs/ak4642.c:627:26: warning: 'ak4642_i2c_driver' defined but not used [-Wunused-variable]
This ensures that we do not enable the respective drivers when I2C
is disabled.
Stefan Agner [Wed, 20 May 2015 22:35:44 +0000 (00:35 +0200)]
ARM: use ARM_SINGLE_ARMV7M for ARMv7-M platforms
Use the new config symbol ARM_SINGLE_ARMV7M which groups config
symbols used by modern ARMv7-M platforms. This allows supporting
multiple ARMv7-M platforms in one kernel image. However, a common
kernel image requires the combined platforms to share the same
main memory layout to be bootable.
Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 21 May 2015 08:36:42 +0000 (10:36 +0200)]
ARM: zx: fix building with CONFIG_THUMB2_KERNEL
The newly added zx platform causes a build error when
CONFIG_THUMB2_KERNEL is enabled:
arch/arm/mach-zx/headsmp.S:16: Error: invalid immediate for address calculation (value = 0x00000004)
I'm assuming that the ROM code that is calling these entry
points runs in ARM mode, so there would be another problem
in the same file, and we can solve both problems at once
by adding a '.arm' statement that will make zx_resume_jump
and zx_secondary_startup both be built as ARM code.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jun Nie <jun.nie@linaro.org> Tested-by: Jun Nie <jun.nie@linaro.org>
Arnd Bergmann [Fri, 22 May 2015 14:34:06 +0000 (16:34 +0200)]
Merge tag 'omap-for-v4.2/omap1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge fixed up omap1 sparse irq support for v4.2 from Tony Lindgren:
Add support for CONFIG_SPARSE_IRQ for omap1. This takes us a bit closer
to making omap1 support multiarch. After this series we still need to
make omap1 use the common clock framework and fix up the drivers to not
rely on includes from mach and plat directories.
Note that this branch depends on a GPIO driver fix in v4.1-rc3 d2d05c65c40e ("gpio: omap: Fix regression for MPUIO interrupts").
* tag 'omap-for-v4.2/omap1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: Fix section mismatch warnings for omap_cfg_reg
ARM: OMAP1: Fix randconfig builds if ARCH_OMAP15XX not selected
ARM: OMAP1: Change interrupt numbering for sparse IRQ
ARM: omap1: Switch to use MULTI_IRQ
ARM: OMAP1: Switch to use generic irqchip in preparation for sparse IRQ
ARM: OMAP1: Move UART defines to prepare for sparse IRQ
Arnd Bergmann [Fri, 22 May 2015 14:32:02 +0000 (16:32 +0200)]
Merge tag 'arm-soc/for-4.2/soc-take2' of http://github.com/broadcom/stblinux into next/soc
Merge mach-bcm changes from Florian Fainelli:
This pull request contains the following changes:
- Rafal adds an additional fault code to be ignored by the kernel on BCM5301X SoC
- BCM63138 SMP support which:
* common code to control the PMB bus, to be shared with a reset
controller driver in drivers/reset
* secondary CPU initialization sequence using PMB helpers
* small changes suggested by Russell King to allow platforms to disable VFP
* tag 'arm-soc/for-4.2/soc-take2' of http://github.com/broadcom/stblinux:
ARM: BCM63xx: Add SMP support for BCM63138
ARM: vfp: Add vfp_disable for problematic platforms
ARM: vfp: Add include guards
ARM: BCM63xx: Add secondary CPU PMB initialization sequence
ARM: BCM63xx: Add Broadcom BCM63xx PMB controller helpers
ARM: BCM5301X: Ignore another (BCM4709 specific) fault code
Tony Lindgren [Thu, 21 May 2015 21:50:23 +0000 (14:50 -0700)]
ARM: OMAP1: Fix section mismatch warnings for omap_cfg_reg
This is cleary used after init time too for example for
configuring UART wake-up events during runtime. This fixes
section mismatch warnings for randconfig builds that happen
because __init_or_module.
Tony Lindgren [Thu, 21 May 2015 21:50:23 +0000 (14:50 -0700)]
ARM: OMAP1: Fix randconfig builds if ARCH_OMAP15XX not selected
With the omap1 SPARSE_IRQ changes mach/irqs.h is no longer
automatically included. Turns out now we rely on ARCH_OMAP15XX
including hardware.h from memory.h, so without ARCH_OMAP15XX
we get build failures.
As we have legacy drivers still relying on these indirect
includes, let's not add more mach includes to the drivers.
Those have to be removed anyways for multiplatform support.
Let's fix up mach-omap1 to include soc.h where cpu_is_omap
checks are done, and common.h for board-*.c files.
But let's keep the indirect memory.h include for now to avoid
unnecessary churn in the drivers.
Florian Fainelli [Fri, 15 Aug 2014 02:37:45 +0000 (19:37 -0700)]
ARM: BCM63xx: Add SMP support for BCM63138
Add support for booting the secondary CPU on BCM63138, this involves:
- locating the bootlut to write the reset vector
- powering up the second CPU when we need to using the DT-supplied PMB
references
- disabling VFP when enabled such that we can keep having SMP
ARM: vfp: Add vfp_disable for problematic platforms
Some platforms might not be able to fully utilize VFP when e.g: one CPU
out of two in a SMP complex lacks a VFP unit. Adding code to migrate
task to the CPU which has a VFP unit would be cumbersome and not
performant, instead, just add the ability to disable VFP.
ARM: BCM63xx: Add secondary CPU PMB initialization sequence
The sequence to initialize a secondary CPU using the BCM63138 PMB is
extremely specific and represents much more code than any other on-chip
peripheral (AHCI, USB 3.0 or integrated Ethernet switch), as such we
keep that code local and utilize Device Tree to lookup all the resources
we need from the CPU device tree node.
This patch adds both common register definitions and helper functions
used to issue read/write commands to the Broadcom BCM63xx PMB controller
which is used to power on and release from reset internal on-chip
peripherals such as the integrated Ethernet switch, AHCI, USB, as well
as the secondary CPU core.
This is going to be utilized by the BCM63138 SMP code, as well as by the
BCM63138 reset controller later.
Stefan Agner [Tue, 19 May 2015 22:03:52 +0000 (00:03 +0200)]
ARM: vf610: enable Cortex-M4 configuration on Vybrid SoC
This patch allows to build the Kernel for Vybrid (VF6xx) SoC
when ARMv7-M CPU is selected. The resulting image runs on the
secondary Cortex-M4 core. This core has equally access to all
peripherals as the main Cortex-A5 core. However, there is no
resource control mechanism, hence when both cores are used
simultaneously, orthogonal device tree's are required.
The boot CPU is dependent on the SoC variant. The available
boards use mostly variants where the Cortex-A5 is the primary
and hence the boot CPU. Booting the secondary Cortex-M4 CPU
needs SoC specific registers written. There is no in kernel
support for this right now, a external userspace utility
called "m4boot" can be used to boot the kernel:
Stefan Agner [Tue, 19 May 2015 22:03:51 +0000 (00:03 +0200)]
ARM: introduce ARM_SINGLE_ARMV7M for ARMv7-M platforms
This introduces a new top level config symbol ARM_SINGLE_ARMV7M
for non-MMU, ARMv7-M platforms. It also support multiple ARMv7-M
platforms in one kernel image since the cores share the same
basic memory layout and interrupt controller. However, this works
only if the combined platforms also have a similar (main) memory
layout.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Stefan Agner [Tue, 19 May 2015 22:03:50 +0000 (00:03 +0200)]
ARM: unify MMU/!MMU addruart calls
Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rafał Miłecki [Wed, 11 Feb 2015 15:40:58 +0000 (16:40 +0100)]
ARM: BCM5301X: Ignore another (BCM4709 specific) fault code
Broadcom ARM devices seem to generate some fault once per boot. We
already have an ignoring handler for BCM4707/BCM4708, but BCM4709
generates different code.
Tony Lindgren [Wed, 20 May 2015 16:01:21 +0000 (09:01 -0700)]
ARM: OMAP1: Change interrupt numbering for sparse IRQ
Change interrupt numbering for sparse IRQ. We do this using
a fixed offset until we can drop irqs.h once all it's users
have been updated.
Note that this depends on the GPIO fix for the MPUIO IRQs
"gpio: omap: Fix regression for MPUIO interrupts".
Also note that this patch adds some extra irq alloc warnings
that will go away when we stop calling irq_alloc_descs
in gpio-omap.c with a follow-up patch.
Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Wed, 20 May 2015 16:01:21 +0000 (09:01 -0700)]
ARM: omap1: Switch to use MULTI_IRQ
This allows us to get a bit further with SPARSE_IRQ and
MULTIARCH support.
Note that we now also rename omap_irq_flags to omap_l2_irq
as that's the omap_irq_flags naming is confusing. It just
contains the interrupt number for the l2 irq.
Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
projects / karo-tx-linux.git / log