pinctrl: ns2: fix return value check in ns2_pinmux_probe()
In case of error, the function pinctrl_register() returns
NULL not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.
After some digging around I found documentation (!) of the APQ8060
EBI2 pin groups. It turns out I first need to split the group in
two: ebi2cs and ebi2 proper. The chip select pins are kind of
orthogonal to the other EBI2 pins since CS1B and CS2B can be muxed
over address bits 7 and 6 (don't know why, but they can). This
is good to fix up before we add users.
Also found what the "holes" in the assignment all the way up to
gpio158 was actually for.
All mux documentation comes from "Snapdragon(TM) S3 APQ8060-based
DragonBoard(TM) GPIO User Guide Rev. E August 10, 2012", published
by Bsquare Corporation.
As the documentation seems a bit hard to come by I put some comments
in the group definitions so that it is clear to all readers what
is going on here and what the lines are used for.
Cc: Björn Andersson <bjorn.andersson@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: imx21: Remove the MODULE_DEVICE_TABLE() macro
Commit e2756baa4217 ("pinctrl: imx21: make it explicitly non-modular")
missed the removal of the MODULE_DEVICE_TABLE() macro causing the
following build error:
drivers/pinctrl/freescale/pinctrl-imx21.c:328:1: error: data definition has no type or storage class [-Werror]
MODULE_DEVICE_TABLE(of, imx21_pinctrl_of_match);
In sun4/5/6/7i, all the pin function related to NAND0 controller is
named "nand0". However, in sun8i, some of the functions are named as
"nand". This patch renamed them to "nand0", for the consistency.
Linus Walleij [Thu, 9 Jun 2016 13:14:31 +0000 (15:14 +0200)]
pinctrl: qcom: add support for EBI2
Add support to mux in the second external bus interface as
follows:
- CS1 and CS2 on GPIO39 and GPIO40 as func 2
- ADDR_7 thru ADDR_0 on GPIO123 thru GPIO130 as func 1
- CS4, CS3 and CS0 on GPIO132, GPIO133, GPIO134 as func 1
- DATA_15 thru DATA_0 on GPIO135 thru GPIO150 as func 1
- OE on GPIO151 as func 1
- ADV on GPIO153 as func 1
- WE on GPIO157 as func 1
This external bus is used on the APQ8060 Dragonboard to connect
an external SMSC9211 ethernet adapter, but there are many other
usecases for the EBI2.
Cc: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Björn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Stephen Boyd [Sun, 26 Jun 2016 05:21:32 +0000 (22:21 -0700)]
pinctrl: qcom: msm8974: Add hsic_ctl pinmux
The msm8974 pinctrl variant has a couple USB HSIC "glue"
registers that let us mux between the pinctrl register settings
or the HSIC core settings for the HSIC pins (gpio 144 and gpio
145). Support this method of operation by adding hsic_data and
hsic_strobe pins that can select between hsic_ctl and gpio
functions. This allows us to toggle the hsic pin configuration
over to the HSIC core at runtime.
Stephen Boyd [Sun, 26 Jun 2016 05:21:31 +0000 (22:21 -0700)]
pinctrl: qcom: Clear all function selection bits
The function selection bitfield is not always 3 bits wide.
Sometimes it is 4 bits wide. Let's use the npins struct member to
determine how many bits wide the function selection bitfield is
so we clear the correct amount of bits in the register while
remuxing the pins.
of_find_node_by_name does an of_node_get on its return value,
so an of_node_put is needed on this value before the corresponding
variable goes out of scope.
The Coccinelle semantic patch used to make this change is as follows:
@@
struct device_node *n;
struct device_node *n1;
statement S;
identifier f;
expression E;
constant C;
@@
n = of_find_node_by_name(...)
...
if (!n) S
... when != of_node_put(n)
when != n1 = f(n,...)
when != E = n
when any
when strict
(
+ of_node_put(n);
return -C;
|
of_node_put(n);
|
n1 = f(n,...)
|
E = n
|
return ...;
)
Andy Shevchenko [Thu, 23 Jun 2016 10:49:36 +0000 (13:49 +0300)]
pinctrl: intel: Add Intel Merrifield pin controller support
This driver adds pinctrl support for Intel Merrifield. The IP block which is
called Family-Level Interface Shim is a separate entity in SoC. The GPIO driver
(gpio-intel-mid.c) will be updated accordingly to support pinctrl interface.
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
...meaning that it currently is not being built as a module by anyone.
It also doesn't have any modular functionality, so it doesn't need
module.h included at all.
What it does have is an exported function that was used as a shared
".remove" by other drivers, but those use cases (imx23 and imx28)
are now gone, and hence this can disappear as well.
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.
We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.
Since module_init was not in use by this driver, the init ordering
remains unchanged with this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.
We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.
Since module_init wasn't actually used by this driver, the init
ordering remains unchanged with this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.
Jon Hunter [Fri, 17 Jun 2016 12:03:40 +0000 (13:03 +0100)]
pinctrl: pinconf: Add generic helper function for freeing mappings
The pinconf-generic.h file exposes functions for creating generic mappings
but it does not expose a function for freeing the mappings. Add a function
for freeing generic mappings.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Ben Dooks [Tue, 21 Jun 2016 17:38:21 +0000 (18:38 +0100)]
pinctrl: rockchip: make rockchip_irq_gc_mask_set_bit static
The rockchip_irq_gc_mask_set_bit() function is not exported our used
outside of ppinctrl-rockchip.c so fix the following sparse error by
making it static:
drivers/pinctrl/pinctrl-rockchip.c:2010:6: warning:
symbol 'rockchip_irq_gc_mask_set_bit' was not declared.
Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Commit 546c6d79301 (pinctrl: digicolor: make it explicitly non-modular) removed
the platform_get_drvdata() call, so platform_set_drvdata() is no longer needed.
Paul Gortmaker [Mon, 13 Jun 2016 21:10:22 +0000 (17:10 -0400)]
pinctrl: as3722: convert PINCTRL_AS3722 from bool to tristate
The Kconfig currently controlling compilation of this code is:
config PINCTRL_AS3722
bool "Pinctrl and GPIO driver for ams AS3722 PMIC"
...meaning that it currently is not being built as a module by anyone.
During an audit for non-modular drivers using modular infrastructure
this driver showed up.
But rather than demodularize it, Laxman indicated that it would be
prefereable to instead convert the driver option to tristate.
This does that, and confirms that it will compile and modpost as
such. However, since I do not have the hardware to confirm that
no new runtime issues exist when modular, that remains untested.
Paul Gortmaker [Mon, 13 Jun 2016 21:10:21 +0000 (17:10 -0400)]
pinctrl: palmas: convert PINCTRL_PALMAS from bool to tristate
The Kconfig currently controlling compilation of this code is:
config PINCTRL_PALMAS
bool "Pinctrl driver for the PALMAS Series MFD devices"
...meaning that it currently is not being built as a module by anyone.
During an audit for non-modular drivers using modular infrastructure
this driver showed up.
But rather than demodularize it, Laxman indicated that it would be
prefereable to instead convert the driver option to tristate.
This does that, and confirms that it will compile and modpost as
such. However, since I do not have the hardware to confirm that
no new runtime issues exist when modular, that remains untested.
pinctrl: sh-pfc: Improve core and user API separation
The Renesas Pin Function Controller uses two header files:
- sh_pfc.h, for use by both core code and SoC-specific drivers,
- core.h, for internal use by the core code only.
Several SoC-specific drivers include core.h, as they need the sh_pfc
structure, which is passed explicitly to the various SoC-specific
callbacks, and used there.
Hence move its definition from core.h to sh_pfc.h, and remove the
inclusion of core.h from all SoC-specific files.
pinctrl: sh-pfc: Move SoC-specific forward declarations to sh_pfc.h
With C=1:
drivers/pinctrl/sh-pfc/pfc-emev2.c:1695:30: warning: symbol 'emev2_pinmux_info' was not declared. Should it be static?
drivers/pinctrl/sh-pfc/pfc-r8a7779.c:3888:30: warning: symbol 'r8a7779_pinmux_info' was not declared. Should it be static?
Note that there are more warnings on SH.
The sh_pfc_soc_info structure is defined in sh_pfc.h, while all forward
declarations for the SoC-specific versions are in core.h.
Move the forward declarations from core.h to sh_pfc.h to fix this.
Jon Hunter [Thu, 16 Jun 2016 15:27:41 +0000 (16:27 +0100)]
pinctrl: OF: Don't create a pinctrl handle if no pinctrl entries exist
When pinctrl_get() is called for a device, it will return a valid handle
even if the device itself has no pinctrl state entries defined in
device-tree. This is caused by the function pinctrl_dt_to_map() which
will return success even if the first pinctrl state, 'pinctrl-0', is not
found in the device-tree node for a device.
According to the pinctrl device-tree binding documentation, pinctrl
states must be numbered starting from 0 and so 'pinctrl-0' should always
be present if a device uses pinctrl and therefore, if 'pinctrl-0' is not
present it seems valid that we should not return a valid pinctrl handle.
Fix this by returning an error code if the property 'pinctrl-0' is not
present for a device.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Mika Westerberg [Thu, 16 Jun 2016 08:25:37 +0000 (11:25 +0300)]
pinctrl: intel: Prevent force threading of the interrupt handler
The pinctrl-intel needs to use request_irq() instead of chained interrupt
handling because it shares the interrupt with multiple GPIO host
controllers found on Intel CPUs. In -rt all such interrupts are forced to
run in thread context which triggers following warning:
The handle_irq_event_* functions (and I suppose generic_handle_irq()) is
expected to be called with interrupts disabled and they rightfully complain
here because we run in thread context with interrupts enabled.
Fix this by adding IRQF_NO_THREAD flag when the master interrupt is
requested. This prevents forced threading of the interrupt used by the GPIO
host controllers.
Reported-by: Kim Tatt Chuah <kim.tatt.chuah@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The reason why this happens is because intel_gpio_irq_ack() is called with
desc->lock raw_spinlock locked which cannot sleep but our normal spinlock
(which is converted to rtmutex in -rt) is allowed to sleep. This causes
might_sleep() to trigger.
Fix this by converting the normal spinlock to a raw_spinlock.
Reported-by: Kim Tatt Chuah <kim.tatt.chuah@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Wed, 15 Jun 2016 08:18:05 +0000 (17:18 +0900)]
pinctrl: uniphier: prohibit drive control for pin 61-66 of PH1-LD11
According to the hardware document, setting the drive control is
prohibited for these pins (N-channel Open Drain pins). Set their
drive control attribute to "fixed".
Tan Jui Nee [Tue, 7 Jun 2016 06:55:51 +0000 (14:55 +0800)]
pinctrl/broxton: enable platform device in the absence of ACPI enumeration
This is to cater the need for non-ACPI system whereby
a platform device has to be created in order to bind
with the Apollo Lake Pinctrl GPIO platform driver.
Signed-off-by: Tan Jui Nee <jui.nee.tan@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Arnd Bergmann [Mon, 13 Jun 2016 15:18:35 +0000 (17:18 +0200)]
pinctrl: max77620: select PINMUX
The recently added max77620 driver fails to build when CONFIG_PINMUX
is not set:
pinctrl/pinctrl-max77620.c:272:21: error: variable 'max77620_pinmux_ops' has initializer but incomplete type
static const struct pinmux_ops max77620_pinmux_ops = {
^~~~~~~~~~
pinctrl/pinctrl-max77620.c:273:2: error: unknown field 'get_functions_count' specified in initializer
This adds the Kconfig 'select' statement that was clearly meant
to be there and is used in all other pinmux drivers.
Dan O'Donovan [Fri, 10 Jun 2016 12:23:36 +0000 (13:23 +0100)]
pinctrl: cherryview: add handlers for pin_config_group_get/set
Pin config get/set handlers for pin groups were previously not
implemented by this driver. The pin_config_group_set is
particularly useful for applying a common config setting to all
pins in a specified group with a single call, without the caller
needing to reference each individual pin by name.
Signed-off-by: Dan O'Donovan <dan@emutex.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dan O'Donovan [Fri, 10 Jun 2016 12:23:35 +0000 (13:23 +0100)]
pinctrl: cherryview: add option to set open-drain pin config
On some CHV platforms, we need an option to configure the
open-drain setting for these pins. This adds support for the
PIN_CONFIG_DRIVE_PUSH_PULL and PIN_CONFIG_DRIVE_OPEN_DRAIN to
disable/enable open-drain mode for a specific pin.
Signed-off-by: Dan O'Donovan <dan@emutex.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dan O'Donovan [Fri, 10 Jun 2016 12:23:34 +0000 (13:23 +0100)]
pinctrl: cherryview: prevent concurrent access to GPIO controllers
Due to a silicon issue on the Atom X5-Z8000 "Cherry Trail" processor
series, a common lock must be used to prevent concurrent accesses
across the 4 GPIO controllers managed by this driver.
See Intel Atom Z8000 Processor Series Specification Update
(Rev. 005), errata #CHT34, for further information.
Cc: stable <stable@vger.kernel.org> Signed-off-by: Dan O'Donovan <dan@emutex.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 3 Jun 2016 11:55:00 +0000 (13:55 +0200)]
pinctrl: qcom-ssbi: support for PM8058
The PM8058 is found in connection to the APQ8060 on the APQ8060
Dragonboard. Works the same as all others, just add the compatible
string for this variant.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Andy Gross <andy.gross@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/bcm/Makefile properly builds individual drivers based on
their respective Kconfig symbols. ARCH_BCM is currently a menuconfig
option from arch/arm/mach-bcm/Kconfig, which is fine, but prevents ARM64
platforms which do not have such menuconfig option from building their
pinctrl drivers, so let's get rid of that dependency.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Ben Dooks [Wed, 8 Jun 2016 16:07:42 +0000 (17:07 +0100)]
pinctrl: nomadik: fix warnings from unexported functions
There are five functions in the driver that are defined but
only used locally. Since these are not used in the current
kernel, delete them to avoid the following warnings:
drivers/pinctrl/nomadik/pinctrl-nomadik.c:1036:6: warning: symbol 'nmk_gpio_clocks_enable' was not declared. Should it be static?
drivers/pinctrl/nomadik/pinctrl-nomadik.c:1050:6: warning: symbol 'nmk_gpio_clocks_disable' was not declared. Should it be static?
drivers/pinctrl/nomadik/pinctrl-nomadik.c:1073:6: warning: symbol 'nmk_gpio_wakeups_suspend' was not declared. Should it be static?
drivers/pinctrl/nomadik/pinctrl-nomadik.c:1094:6: warning: symbol 'nmk_gpio_wakeups_resume' was not declared. Should it be static?
drivers/pinctrl/nomadik/pinctrl-nomadik.c:1120:6: warning: symbol 'nmk_gpio_read_pull' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.
We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.
We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
Paul Gortmaker [Tue, 7 Jun 2016 02:43:04 +0000 (22:43 -0400)]
pinctrl: amd: make it explicitly non-modular
The Kconfig currently controlling compilation of this code is:
config PINCTRL_AMD
bool "AMD GPIO pin control"
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.
We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.
Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Ken Xue <Ken.Xue@amd.com> Cc: Jeff Wu <Jeff.Wu@amd.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.
We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.
Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Joachim Eastwood <manabian@gmail.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.
We explicitly disallow a driver unbind, since that doesn't have a
sensible use case anyway, and it allows us to drop the ".remove"
code for non-modular drivers.
Since module_init() was already not in use in this driver, we don't
have any concerns with init ordering changes here.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Wolfram Sang [Mon, 6 Jun 2016 16:08:25 +0000 (18:08 +0200)]
pinctrl: sh-pfc: refactor voltage setting
All known hardware being able to switch voltages has the same POCCTRL
register. So, factor out the common code to the core and keep only
the pin-to-bit mapping SoC specific. Convert the only user, r8a7790.
In case POCCTRL should ever get more complex (more voltages to select?),
we should probably switch over to a describing array like drive strength
does currently.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ben Dooks [Tue, 7 Jun 2016 17:07:45 +0000 (18:07 +0100)]
pinctrl: at91-pio4: fix non-exported functions
The atmel_pctl_find_group_by_pin() and the atmel_pinctrl_remove()
functions are not exported, so fix the warnings about these
being exported without definitions by making them static.
drivers/pinctrl/pinctrl-at91-pio4.c:424:20: warning: symbol 'atmel_pctl_find_group_by_pin' was not declared. Should it be static?
drivers/pinctrl/pinctrl-at91-pio4.c:1077:5: warning: symbol 'atmel_pinctrl_remove' was not declared. Should it be static?
Ben Dooks [Tue, 7 Jun 2016 16:58:15 +0000 (17:58 +0100)]
pinctrl: nsp-gpio: fix non-static functions
Fixup warnings from functions that are not exported and
therefore should be marked static. Fixes:
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c:461:5:
warning: symbol 'nsp_pin_config_group_get' was not declared.
Should it be static?
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c:467:5:
warning: symbol 'nsp_pin_config_group_set' was not declared.
Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
An irq which is a wake up source maybe masked unexpectedly if the wake
up source irq was triggered after pinctrl irqchip suspend and before
suspend_device_irqs finished.
Use *_noirq callbacks to guarantee pinctrl irqchip suspend would be
called after suspend_devices_irqs.
Neil Armstrong [Tue, 31 May 2016 09:36:15 +0000 (11:36 +0200)]
pinctrl: oxnas: Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map
Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map, introduced in d32f7fd3bbc3 ("pinctrl: Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map")
but not reported into oxnas driver.
Fixes: 611dac1e48a4 ("pinctrl: Add Oxford Semiconductor OXNAS pinctrl and gpio driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Tue, 31 May 2016 08:05:21 +0000 (17:05 +0900)]
pinctrl: uniphier: allow to have pinctrl node under syscon node
Currently, the UniPhier pinctrl driver itself is a syscon, but it
turned out much more reasonable to make it a child node of a syscon
because our syscon node consists of a bunch of system configuration
registers, not only pinctrl, but also phy, and misc registers.
It is difficult to split the node.
To allow to migrate to the new DT structure, this commit adds new
compatible strings to not disturb the existing DT. After a while,
the old binding will be removed.
Masahiro Yamada [Tue, 31 May 2016 08:05:18 +0000 (17:05 +0900)]
pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Masahiro Yamada [Tue, 31 May 2016 08:05:17 +0000 (17:05 +0900)]
pinctrl: uniphier: support per-pin input enable for new SoCs
Upcoming new pinctrl drivers for PH1-LD11 and PH-LD20 support input
signal gating for each pin. (While, existing ones only support it
per pin-group.) This commit updates the core part for that.
Masahiro Yamada [Tue, 31 May 2016 08:05:16 +0000 (17:05 +0900)]
pinctrl: uniphier: introduce capability flag
The core part of the UniPhier pinctrl driver needs to support a new
capability for upcoming UniPhier ARMv8 SoCs. This sometimes happens
because pinctrl drivers include really SoC-specific stuff.
This commit intends to tidy up SoC-specific parameters of the existing
drivers before adding the new one. Having just one flag would be
better than adding a new struct member every time a new SoC-specific
capability comes up.
At this time, there is one flag, UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE.
This capability (I'd say rather quirk) was added for PH1-Pro4 and
PH1-Pro5 as requirement from a customer. For those SoCs, one pin-mux
setting is controlled by the combination of two separate registers; the
LSB bits at register offset (8 * N) and the MSB bits at (8 * N + 4).
Because it is impossible to update two separate registers atomically,
the LOAD_PINCTRL register should be set in order to make the pin-mux
settings really effective.
Masahiro Yamada [Tue, 31 May 2016 08:05:15 +0000 (17:05 +0900)]
pinctrl: uniphier: support pin configuration in sparse pin space
Unfortunately, the pin number of the new SoC, PH1-LD11, is not
contiguous. The base frame work must be adjusted to support the new
SoC pinctrl driver. The pin_desc_get() exploits radix-tree for pin
look-up, so it works more efficiently with sparse pin space.
Masahiro Yamada [Tue, 31 May 2016 08:05:14 +0000 (17:05 +0900)]
pinctrl: uniphier: support 3-bit drive strength control
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control. Drive strength of some pins are controlled by
3-bit width registers (8-level granularity).
projects / karo-tx-linux.git / log