Stefano Babic [Fri, 24 Jun 2011 03:04:38 +0000 (03:04 +0000)]
ARM: versatile: fix board support
Versatile board is used as example to run u-boot under qemu.
The patch fixes relocation for all versatile boards and adds
a versatileqemu target to be used under qemu.
Patch tested only under qemu, not on real boards.
Tested with QEMU emulator version 0.14.50.
ARMv7: u8500_href: Add missing header to fix compiler warning
Fix the compiler warning
u8500_href.c: In function 'hrefplus_mmc_power_init':
u8500_href.c:258: warning: implicit declaration of function 'prcmu_i2c_read'
u8500_href.c:265: warning: implicit declaration of function 'prcmu_i2c_write'
Andreas Bießmann [Thu, 30 Jun 2011 22:03:20 +0000 (22:03 +0000)]
avr32: add grasshopper (ICnova AP7000) board
The grasshopper board is a neat avr32 evaluation kit produced by In-Circuit
GmbH.
See http://www.ic-board.de/product_info.php?info=p75_ICnova-AP7000-Base.html
for detailed information about this device.
Signed-off-by: Andreas Bießmann <biessmann@corscience.de> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Andreas Bießmann [Mon, 18 Jul 2011 09:41:07 +0000 (09:41 +0000)]
net/eth.c: drop obsolete at91rm9200 support
All available at91rm9200 boards have migrated to ar920t/at91 and
therefore to CONFIG_NET_MULTI.
The obsolete at91rm9200_miiphy_initialize() was removed in "ARM: remove
obsolete at91rm9200".
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Mon, 18 Jul 2011 09:41:03 +0000 (09:41 +0000)]
ARM: remove obsolete at91rm9200
The big "ARM: remove broken boards" series deletes all boards using
obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove
this code now.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Aneesh V [Thu, 21 Jul 2011 13:10:27 +0000 (09:10 -0400)]
omap: add MMC and FAT support to SPL
- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
payload size and load address from this header. If the
header is not detected assume u-boot.bin as payload
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Aneesh V [Thu, 21 Jul 2011 13:10:21 +0000 (09:10 -0400)]
omap: add basic SPL support
- Provide alternate implementations of board_init_f()
board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
it to board config header from config.mk
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Aneesh V [Thu, 21 Jul 2011 13:10:18 +0000 (09:10 -0400)]
armv7: start.S: fixes and enhancements for SPL
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
vector
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Aneesh V [Thu, 21 Jul 2011 13:10:15 +0000 (09:10 -0400)]
omap4: automatic sdram detection
Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.
This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.
Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Aneesh V [Thu, 21 Jul 2011 13:10:12 +0000 (09:10 -0400)]
omap4: calculate EMIF register values
Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.
For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Aneesh V [Thu, 21 Jul 2011 13:10:01 +0000 (09:10 -0400)]
omap4: cleanup pin mux data
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
to SoC directory). Will help in having single SPL for all
boards.
- Non-essential part(the pins not essential for u-boot to function)
need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Aneesh V [Thu, 21 Jul 2011 13:09:59 +0000 (09:09 -0400)]
omap4: utility function to identify the context of hw init
The basic hardware init of OMAP4(s_init()) can happen in 4
different contexts:
1. SPL running from SRAM
2. U-Boot running from FLASH
3. Non-XIP U-Boot loaded to SDRAM by SPL
4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
Configuration Header feature
What level of hw initialization gets done depends on this
context. Add a utility function to find this context.
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
The function davinci_emac_mii_mode_sel() is defined in
board/davinci/common/misc.c for any DA8xx CPU which has
CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being
declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board.
This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC
is enabled.
Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned
on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface
specified in <asm/gpio.h> . The driver has support for both manipulating
GPIO pins as well as automatically configuring the pin multiplexor
registers to set the pin function to GPIO.
In preparation for a generic GPIO driver for the DA8xx processors,
rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files
which include it.
Wolfgang Denk [Tue, 2 Aug 2011 19:46:53 +0000 (21:46 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
* 'master' of git://git.denx.de/u-boot-blackfin:
Blackfin: jtag-console: fix timer usage
Blackfin: switch to common display_options()
Blackfin: serial: move early debug strings into .rodata section
Blackfin: adi boards: also set stderr to nc with helper
Blackfin: update anomaly lists to latest public info
Blackfin: serial: convert to bfin_{read,write} helpers
Blackfin: split out async setup
Blackfin: adi boards: enable pretty flash progress output
Blackfin: drop unused dma.h header from start code
Blackfin: portmux: allow header to be included in assembly files
Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi support
Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settings
Blackfin: sync MMR read/write helpers with Linux
Blackfin: gpio: optimize free path a little
Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR
Blackfin: uart: fix printf warning
Blackfin: add init.elf helper code
Blackfin: dont reset SWRST on newer bf526 parts
Blackfin: adi boards: enable multi serial support by default
Blackfin: uart: add multiple serial support
Blackfin: uart: move debug buffers into local bss
Wolfgang Denk [Sat, 30 Jul 2011 13:33:49 +0000 (13:33 +0000)]
fpga: constify to fix build warning
Fix compiler warning:
cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
from incompatible pointer type
Adding the needed 'const' here entails a whole bunch of additonal
changes all over the FPGA code.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
Signed-off-by: Zhong hongbo <bocui107@gmail.com>
Changed commit message Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr>
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.
This patch makes the cache operation mode configurable via board config.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
The INCA-IP SoC belongs to the Lantiq XWAY SoC product portfolio.
For the upcoming support of other Lantiq SoC devices this tool should
not solely depend on the INCA-IP board.
Rename the tool to xway-swap-bytes and add an config option
to enable compilation optionally.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Wolfgang Denk [Fri, 29 Jul 2011 23:39:14 +0000 (01:39 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
powerpc/8xxx: Remove dependency on <usb.h>
powerpc/85xx: enable USB2 gadget mode for corenet ds board
powerpc/85xx: verify the device tree before booting Linux
MPC8xxx: drop redundant boot messages
powerpc/85xx: Fix build failure for P1023RDS
powerpc/p2041rdb: Enable SATA support
powerpc/85xx: Cleanup handling of PVR detection for e500/e500mc/e5500
powerpc/85xx: Fix up clock_freq property in CAN node of dts
85xx: enable FDT support for STX SSA board
powerpc/85xx: provide 85xx flush_icache for cmd_cache
powerpc/p2041rdb: Enable backside L2 cache support
powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
powerpc/85xx: Add support for P2041[e] XAUI in SERDES
powerpc/85xx: Rename P2040 id & SERDES to P2041
powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
powerpc/85xx: Fix setting of EPAPR_MAGIC value
Kumar Gala [Fri, 29 Jul 2011 13:51:26 +0000 (08:51 -0500)]
powerpc/8xxx: Remove dependency on <usb.h>
We used <usb.h> for USB_MAX_DEVICE. However this requires we actual
build in support for USB into u-boot (which should not be required for
device tree fixup).
At this time no FSL SoC that utilizies this code (83xx/85xx) has more
than 2 USB controllers. So we replace USB_MAX_DEVICE with a local
define FSL_MAX_NUM_USB_CTRLS.
If/when a device shows up with more than 2 controllers we can easily
bump this value or refactor into a proper define per SoC.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: enable USB2 gadget mode for corenet ds board
to make USB2 worked in gadget mode, we need to set it's 'dr_mode' to
'peripheral' in hwconfig, but driver starts scan from 'usb1', it'll break
out if it cannot find 'usb1', so drop the 'else' clause to make driver scan
all the 'usbx'.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Tue, 3 May 2011 18:24:08 +0000 (13:24 -0500)]
powerpc/85xx: verify the device tree before booting Linux
Introduce ft_verify_fdt(), a function that is called after the device tree
has been fixed up, that displays warning messages if there is a mismatch
between the physical addresses of some devices that U-Boot has configured
with what the device tree says the addresses are.
This is a particular problem when booting a 36-bit device tree from a
32-bit U-Boot (or vice versa), because the physical address of CCSR is
wrong in the device tree. When the operating system boots, no messages are
displayed, so the user generally has no idea what's wrong.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 28 Jul 2011 19:34:30 +0000 (14:34 -0500)]
powerpc/85xx: Fix build failure for P1023RDS
When we added the fman fdt fixup we forgot to fixup the P1023RDS
platform. So we would get:
fdt.c: In function 'fdt_fixup_fman_firmware':
fdt.c:465:15: error: 'CONFIG_SYS_FMAN_FW_LENGTH' undeclared (first use in this function)
fdt.c:465:15: note: each undeclared identifier is reported only once for each function it appears in
Add the needed #defines in P1023RDS.h to fix this.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 21 Jul 2011 05:20:21 +0000 (00:20 -0500)]
powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
The P2040/P2040E have no L2 cache. So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.c
and release. For the device tree we skip the updating of the L2 cache
properties but we still update the chain of caches so the CPC/L3 node
can be properly updated.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 21 Jul 2011 05:20:20 +0000 (00:20 -0500)]
powerpc/85xx: Add support for P2041[e] XAUI in SERDES
We add XAUI_FM1 into the SERDES tables for P2041[e] devices. However
for the P2040[e] devices that dont support XAUI we handle this at
runtime via SVR checks. If we are on a P2040[e] device the SERDES
functions will behave as follows:
is_serdes_prtcl_valid() will always report invalid if prtcl passed in is
XAUI_FM1.
serdes_get_prtcl() will report NONE if the prtcl in the table is set to
XAUI_FM1.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 21 Jul 2011 05:20:19 +0000 (00:20 -0500)]
powerpc/85xx: Rename P2040 id & SERDES to P2041
P2041 is the superset part that covers both P2040 & P2041. The only
difference between the two devices is that P2041 supports 10g/XAUI and
has an L2 cache.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Stephen George [Wed, 20 Jul 2011 14:47:26 +0000 (09:47 -0500)]
powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
Configuring DCSRCR to define the DCSR space to be 1G instead
of the default 4M. DCSRCR only allows selection of either 4M
or 1G.
Most DCSR registers are within 4M but the Nexus trace buffer
is located at offset 16M within the DCSR.
Configuring the LAW to be 32M to allow access to the Nexus
trace buffer. No TLB modification is required since accessing
the Nexus trace buffer from within u-boot is not required.
Signed-off-by: Stephen George <stephen.george@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
post, memory test: add memory_post_test() to include file
This include is needed, if this memory test is used "outside"
from post code, for example booting with nand_spl, and using
this memory test before copying u-boot code to RAM and jumping
to it.
projects / karo-tx-uboot.git / log