Ivan T. Ivanov [Sun, 4 May 2014 01:24:41 +0000 (09:24 +0800)]
usb: chipidea: msm: Add device tree support
Allows controller to be specified via device tree.
Pass PHY phandle specified in DT to core driver.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Fabio Estevam [Sun, 4 May 2014 01:24:39 +0000 (09:24 +0800)]
chipidea: usbmisc_imx: Allow USB OTG to work on mx51
The field PLLDIVVALUE of register PHY_CTRL_1 selects the reference clock source
for the PHY:
00 = sysclock uses 19.2 MHz
01 = sysclock uses 24 MHz
10 = sysclock uses 26 MHz
11 = sysclock uses 27 MHz
The reset value for this field is 10 according to the reference manual, and
even though this reset value works for mx53, it does not work for mx51.
So instead of relying on the reset value for the PLLDIVVALUE field, explicitly
set it to 01 so that a 24MHz clock can be selected for the PHY and allowing both
mx51 and mx53 to have USB OTG port functional.
Succesfully tested 'g_ether' on a imx51-babbage and on a imx53-qsb boards.
Peter Chen [Tue, 29 Apr 2014 00:35:58 +0000 (08:35 +0800)]
usb: move usb/usb-common.c to usb/common/usb-common.c
Since we will have more usb-common things, and it will let
usb-common.c be larger and larger, we create a folder named usb/common
for all usb common things.
Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Peter Chen [Sun, 4 May 2014 01:24:43 +0000 (09:24 +0800)]
Doc: usb: chipidea: need to build both kernel Image and modules
When tried to enable OTG FSM, we need to rebuild both kernel Image
and modules, since there are some codes at gadget modules which are
controlled by related configurations.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Peter Chen [Fri, 23 May 2014 00:12:49 +0000 (08:12 +0800)]
usb: chipidea: using one inline function to cover queue work operations
The otg queue work include operations: one is disable interrupt,
another one is call kernel queue work API. Many codes do this
operation, using one inline function to instead of them.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:54 +0000 (15:56 +0800)]
Documentation: usb: add chipidea.txt for how to demo usb OTG HNP and SRP
This patch adds a file chipidea.txt for how to demo chipidea usb OTG HNP and SRP
functions via sysfs input files, any other possible information should be
documented for chipidea usb driver in future can be added into this file.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:53 +0000 (15:56 +0800)]
Documentation: ABI: usb: sysfs Description for chipidea USB OTG HNP and SRP
This patch adds sysfs interface description for chipidea USB OTG HNP and SRP.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:52 +0000 (15:56 +0800)]
usb: chipidea: debug: add debug file for OTG variables
This patch adds a debug file for OTG vairables show.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:51 +0000 (15:56 +0800)]
usb: chipidea: add sys inputs for OTG fsm input
This patch adds sys input to control and show OTG fsm inputs by application,
user can do host and preipheral role switch by change these inputs.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:50 +0000 (15:56 +0800)]
usb: chipidea: OTG HNP and SRP fsm implementation
USB OTG interrupt handling and fsm transitions according to USB OTG
and EH 2.0.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:49 +0000 (15:56 +0800)]
usb: chipidea: OTG fsm timers initialization
This patch adds OTG fsm timers initialization, which use controller's 1ms
interrupt as timeout counter, also adds some local timers which are not
in otg_fsm_timer list.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:47 +0000 (15:56 +0800)]
usb: chipidea: udc: driver update for OTG HNP
Add b_hnp_enable request handling and enable gadget->is_otg
Signed-off-by: Peter Chen <peter.chen@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:46 +0000 (15:56 +0800)]
usb: chipidea: host: init otg port number
Init otg_port number of otg capable host to be 1 at host start.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:45 +0000 (15:56 +0800)]
usb: chipidea: host: vbus control change for OTG HNP
Leave vbus on/off hanlded by OTG fsm if in OTG mode.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:44 +0000 (15:56 +0800)]
usb: chipidea: usb OTG fsm initialization.
This patch adds OTG fsm related initialization when do otg init,
add a seperate file for OTG fsm related utilities.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:43 +0000 (15:56 +0800)]
usb: phy: otg-fsm: export symbol of otg_statemachine
This patch exports symbol of otg_statemachine for kernel module
can use it.
Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 26 Feb 2014 23:38:19 +0000 (07:38 +0800)]
usb: phy: fsm: update OTG HNP state transition conditions according to OTG and EH 2.0 spec.
According to:"On-The-Go and Embedded Host Supplement to the USB Revision 2.0
Specification July 27, 2012 Revision 2.0 version 1.1a"
- From a_host to a_wait_bcon if !b_conn
- Add transition from a_host to a_wait_vfall if id state is high or a_bus_drop
- From a_wait_vfall to a_idle if a_wait_vfall_tmout
Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Peter Chen [Wed, 23 Apr 2014 07:56:41 +0000 (15:56 +0800)]
usb: chipidea: add proper delay for waiting correct PHY status
After the PHY has powered and initialized, it needs some delay
for controller to reflect PHY's status. Some status and values
for id, vbus, dp/dm are only stable after this delay. The current
code tries to clear id/vbus status without enough delay, it
causes the status are not cleared properly.
This patch add 2ms delay after phy has initialized, and clear the
unexpected status after that.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Tested-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:40 +0000 (15:56 +0800)]
usb: chipidea: debug: add debug file for controller registers dump
This patch adds below registers dump for debug:
- USBINTR
- USBSTS
- USBMODE
- USBCMD
- PORTSC
- OTGSC
Signed-off-by: Peter Chen <peter.chen@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:39 +0000 (15:56 +0800)]
usb: chipidea: export interrupt enable and status register read functions
This patch moves usb interrupt enable and status register read functions
from udc driver to core driver to use them in all ci drivers.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Li Jun [Wed, 23 Apr 2014 07:56:38 +0000 (15:56 +0800)]
usb: chipidea: operate on otgsc register in a general way
Use a more general way to read and write otgsc register.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Peter Chen [Wed, 23 Apr 2014 07:56:37 +0000 (15:56 +0800)]
usb: chipidea: coordinate usb phy initialization for different phy type
For internal PHY (like UTMI), the phy clock may from internal pll,
it is on/off on the fly, the access PORTSC.PTS will hang without
phy clock. So, the usb_phy_init which will open phy clock needs to
be called before hw_phymode_configure.
See: http://marc.info/?l=linux-arm-kernel&m=139350618732108&w=2
For external PHY (like ulpi), it needs to configure portsc.pts before
visit viewport, or the viewport can't be visited. so phy_phymode_configure
needs to be called before usb_phy_init.
See: cd0b42c2a6d2a74244f0053f8960f5dad5842278
It may not the best solution, but it can work for all situations.
Daniel Tang [Tue, 11 Mar 2014 05:47:39 +0000 (13:47 +0800)]
usb: chipidea: add support for USB OTG controller on LSI Zevio SoCs
The USB controller in TI-NSPIRE calculators (LSI Zevio SoC) are based off either
Freescale's USB OTG controller or the USB controller found in the IMX233, both
of which are Chipidea compatible.
This patch adds a device tree binding for the controller.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Jingoo Han [Wed, 19 Feb 2014 05:41:42 +0000 (13:41 +0800)]
usb: chipidea: use dev_get_platdata()
Use the wrapper function for retrieving the platform data instead
of accessing dev->platform_data directly. This is a cosmetic change
to make the code simpler and enhance the readability.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Sparse complains about fec_enet_select_queue() not being static.
Feedback from David Miller [1] was to remove this function instead of making it
static:
"Please just delete this function.
It's overriding code which does exactly the same thing.
Actually, more precisely, this code is duplicating code in a way that
bypasses many core facilitites of the networking. For example, this
override means that socket based flow steering, XPS, etc. are all
not happening on these devices.
Without ->ndo_select_queue(), the flow dissector does __netdev_pick_tx
which is exactly what you want to happen."
Commit 63288b721a80 ("ARM: imx: fix shared gate clock") attempted to fix
an issue with particular enable/disable sequence from two shared gate
clocks. But unfortunately, while it partially fixed the issue, it also
did something wrong in .is_enabled() function hook. In case of shared
gate, the function shouldn't really query the hardware state via
share_count, because the function is trying to query the enabling state
of the clock in question, not the hardware state which is shared by
multiple clocks.
Fix the issue by returning the enable_count of the clock itself which is
maintained by clock core, in case it's a clock sharing hardware gate
with others. As the result, the initialization of share_count per
hardware state is not needed now. So remove it.
shawn.guo: cherry-pick commit 9e1ac462b982 from upstream
Robin Gong [Wed, 24 Sep 2014 09:31:53 +0000 (17:31 +0800)]
ENGR00332994: ARM: dts: imx6sl: fix gpu power up failed
In ldo-bypass mode, antop regulator will bypass vddarm and vddsoc
if found these two have been bypassed,and keep internal vddsoc as 0.
That caused vddpu always set 0 because it tracked with vddsoc while enable.
Add 'regulator-allow-bypass' to set anatop_reg->bypass 1 to avoid this
case.
ENGR00279946 dts: imx6qdl-sabreauto: add baseboard sd card slot support
NOTE since SD Card in main board takes a long route hence with
Drive Speed High 80 OHMS causing error on high speed cards.
Per suggestion DSE 40 OHMS is used.
And the SD1 on sabreauto baseboard is conflict with gpmi nand.
The conflict pins are DAT4~DAT7. Since the SD3 on cpu board
already supports 8 bit bus width, we do not want add an extra
dts file for it, so we disable 8 bit and use 4 bit width for
this issue.
ENGR00333303 dts: imx6sx-sdb-emmc: add emmc support on uSDHC4
The eMMC interface is shared with uSDHC4 BOOT card slot and the eMMC chip is
DNP by default. User needs burn the eMMC chip onto the board manually and
do hw rework to enable eMMC signals.
We create a new dts imx6sx-sdb-emmc.dts for easy eMMC test after doing hw rework.
Robby Cai [Fri, 19 Sep 2014 10:38:08 +0000 (18:38 +0800)]
ENGR00332319 lcdif: imx6sl: disable the pixel rate before call clk_set_rate
After the following commit is pushed, the lcdif framebuffer driver need
the adjustment. 93a9e3d0b88203cb523dd92e85590683d6a85fdf ENGR00318063-6:
ARM: imx6: add CLK_SET_RATE_GATE flag for PLL clocks
CLK_SET_RATE_GATE flag means "must be gated across rate change".
PLL5 video is the parent clock of the pixel clock, and only used by it.
This patch gates the clock before call clk_set_rate() to meet the requirement.
ERROR (phandle_references): Reference to non-existent node or label "reg_sensor"
ERROR: Input tree has errors, aborting (use -f to force output)
make[1]: *** [arch/arm/boot/dts/imx6dl-cubox-i.dtb] Error 2
make[1]: *** Waiting for unfinished jobs....
DTC arch/arm/boot/dts/imx6dl-sabresd-enetirq.dtb
...
The label "reg_sensor" is defined in imx6qdl-sabresd.dts, not in
imx6dl.dtsi. The patch moves the epdc parts to imx6dl-sabresd.dts,
which also sounds better since EPDC module is available not on i.mx6q
but i.mx6dl.
Dong Aisheng [Fri, 10 Jan 2014 13:31:21 +0000 (21:31 +0800)]
ENGR00333129 dts: imx6qdl-sabreauto: use external vmmc for sd3 optionally
SD3.0 cards require power cycle the card during suspend/resume,
or the card re-enumeration after resume will fail to be identified
as UHS card since the card is already working on 1.8v mode and refuse
to ack the S18R request, thus, it will then work on normal high speed
mode instead.
We have to use external vmmc regulator to power cycle the card during
suspend/resume to reset card signal voltage to 3.3v frist for the later
1.8v voltage switch.
However, due to the sabreauto board limitation, we can not use external
regulator to powere off card by default since the card power is shared
with card detect pullup. Disabling the vmmc regulator will also shutdown
the cd pullup which causes incorrect illusion of card exist.
(e.g. plug out the card, mmc core wll think the card is exist since cd pin
is low but it never can find the card)
HW rework removing R695 and enable PAD internal pullup is needed to
fix this isssue.
User can manually open the mask of vmmc in dts to enable using external
regulator if your board has done the rework as said above.
Or by default we still do not power off card during suspend.
Dong Aisheng [Tue, 24 Jun 2014 09:25:03 +0000 (17:25 +0800)]
ENGR00319936-1 mmc: sdhci-esdhc-imx: do not enable wakeup by default
After adding mega fast support, the default enabled usdhc wakeup will block
M/F to gate off power domain.
To avoid this issue, we only claim wakeup capability and reply on user to enable
it via sysfs according to real needs.
The drawback of such change is that for SDIO WiFi Wakeup On Wireless feature,
User has to enable both uSDHC and WiFi WoW wakeup mannually to make
WoW work well.
BTW, due to the wakeup feature is controller itself, so we do not need to reply
on WiFi PM flags to enable it.
Dong Aisheng [Thu, 6 Mar 2014 08:04:19 +0000 (16:04 +0800)]
ENGR00332937-1 mmc: sdhci-esdhc-imx: add imx6sx support
The imx6sx usdhc is derived from imx6sl, the difference is minor.
imx6sx have the errata ESDHC_FLAG_ERR004536 fixed.
So introduce a new compatible string for imx6sx to distinguish them.
Dong Aisheng [Fri, 17 Jan 2014 02:23:22 +0000 (10:23 +0800)]
ENGR00295564 mmc: sdhci-esdhc-imx: no need busfreq for imx6qdl
The usdhc of i.MX6Q/DL can work well under low power mode without
request high bus freq. So we do not need request bus freq for i.MX6Q/DL.
It can save power for i.MX6D/DL due to it saves a lot busfreq switch
cost as well as the CPU time runing on high bus freq after switch
during low power mode.
A new flag ESDHC_FLAG_BUSFREQ is added to indicated this requirement.
Currently only i.MX6SL is using it.
Dong Aisheng [Tue, 31 Dec 2013 08:22:44 +0000 (16:22 +0800)]
ENGR00295184-1 mmc: sdhci: do not enable card detect interrupt for gpio cd type
Except SDHCI_QUIRK_BROKEN_CARD_DETECTION and MMC_CAP_NONREMOVABLE,
we also do not need to handle controller native card detect interrupt
for gpio as card detect case.
If we wrong enabled the card detect interrupt for gpio case,
it will cause a lot of unexpected card detect interrupts during data transfer
which should not happen.
Dong Aisheng [Mon, 16 Dec 2013 06:42:14 +0000 (14:42 +0800)]
ENGR00292140 mmc: sdhci: fix possible sleep in atomic in sdio_irq enable function
The sdhci_runtime_pm_get API is able to sleep, so should not call it in
sdhci_enable_sdio_irq_nolock which is executed with spin_lock_irqsave in
sdhci_enable_sdio_irq.
Move it out of spin lock to fix this issue.
The max timeout counter for uSDHC is SDCLK x (1 << 28), not as standard
controller defined as TMCLK x (1 <<27).
Add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to handle it.
Dong Aisheng [Fri, 22 Nov 2013 12:34:38 +0000 (20:34 +0800)]
ENGR00289406-1 mmc: sdhci: add quirk for get max timeout counter
The max timeout counter of some SoCs like i.MX6 uSDHC may not be standard,
add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to get the correct max timeout
counter from platform specific code.
Then we can calculate the correct max_discard_to value.
Dong Aisheng [Fri, 15 Nov 2013 09:54:36 +0000 (17:54 +0800)]
ENGR00289279 mmc: sdhci: get runtime pm when sdio irq is enabled
SDIO cards may need clock to send the card interrupt to host.
Thus, we get runtime pm when sdio irq is enabled to prevent the clock
resource is released and put it when sdio irq is disabled.
The uSDHC has an ADMA Length Mismatch errata ERR004536 which may cause ADMA
work abnormally. The errata has already been fixed for i.MX6Q TO1.2
and i.MX6DL TO1.1 by enable the bit 7 in 0x6c register.
Unfortunately this fix is not included in i.MX6SL.
So we disable ADMA for i.MX6SL and use SDMA instead.
Nimrod Andy [Fri, 19 Sep 2014 06:26:03 +0000 (14:26 +0800)]
net: fec: fix code identation
There have extra identation before .skb_copy_to_linear_data_offset(),
this patch just remove the identation.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nicolin Chen [Tue, 25 Mar 2014 12:56:18 +0000 (20:56 +0800)]
ENGR00305648-1 ASoC: imx-sgtl5000: Support non-ssi cpu-dai
The current imx-sgtl5000 driver always attaches the cpu-dai to ssi while
in fact it could be attached to other cpu-dais like SAI. Thus this patch
use a general code to support another cpu-dai. And meanwhile update the
devicetree for i.MX6 Series.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit cb5dfaf44d2fdbce4329c2e4762e8450c8cd3b3c)
Nicolin Chen [Tue, 24 Jun 2014 06:44:18 +0000 (14:44 +0800)]
ENGR00320241 ASoC: fsl_spdif: Complete the volatile register list
Not only SIS but also other read-only or write-only reigsters should be marked
as volatile register so as not to let regcache cache them. So this patch just
adds those missing registers.
Nicolin Chen [Thu, 15 May 2014 10:53:25 +0000 (18:53 +0800)]
ENGR00318773-10 ASoC: imx-audmux: Add driver suspend and resume to support MEGA Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, AUDMUX needs to
save all the values of registers before the system suspend and restore them
after the system resume.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 3f3781143ba2800f7e3e46dbecc0c7a76d22a146)
Nicolin Chen [Thu, 15 May 2014 10:51:56 +0000 (18:51 +0800)]
ENGR00318773-9 ASoC: fsl_ssi: Add driver suspend and resume to support MEGA Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, SSI needs to save
all the values of registers before the system suspend and restore them after
the system resume.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 34c50abd9df28580b367070bc20b8bca6cd7655c)
Nicolin Chen [Wed, 14 May 2014 10:54:27 +0000 (18:54 +0800)]
ENGR00318773-8 ASoC: fsl_spdif: Add driver suspend and resume to support MEGA Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, SPDIF needs to save
all the values of registers before the system suspend and restore them after
the system resume.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit fd7d2c1a137c1b9d7adb58aaf06b90938172b964)
Nicolin Chen [Mon, 12 May 2014 12:00:48 +0000 (20:00 +0800)]
ENGR00318773-7 ASoC: fsl_esai: Add driver suspend and resume to support MEGA Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, ESAI needs to save
all the values of registers before the system suspend and restore them after
the system resume.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit fc69de0b0cc1d9a85ad7f7363da6dec02945964a)
Nicolin Chen [Mon, 12 May 2014 05:47:52 +0000 (13:47 +0800)]
ENGR00318773-6 ASoC: fsl_sai: Add driver suspend and resume to support MEGA Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, SAI needs to save
all the values of registers before the system suspend and restore them after
the system resume.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 88efde0cec71d7d70948eeaf1d22ab52b8bc8f2d)
Nicolin Chen [Thu, 17 Oct 2013 10:24:29 +0000 (18:24 +0800)]
ENGR00283079-1 ASoC: fsl: Implement different DMA buffer sizes
Each CPU DAI driver has its own defined DMA buffer size, so this patch just
drops the original one that uses a fixed size for all drivers and implements
a different DMA buffer size to each driver.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit d2589c6bcdfbcac420999e15d36ecd48a7df2742)
projects / karo-tx-linux.git / log