]> git.karo-electronics.de Git - karo-tx-linux.git/log
karo-tx-linux.git
11 years agoENGR00173397 MTD: add NAND_BBT_USE_FLASH macro
Huang Shijie [Tue, 31 Jan 2012 08:50:03 +0000 (16:50 +0800)]
ENGR00173397 MTD: add NAND_BBT_USE_FLASH macro

add the new macro to fix a compiling error.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agomtd: abstract last MTD partition parser argument
Dmitry Eremin-Solenikov [Fri, 10 Jun 2011 14:18:28 +0000 (18:18 +0400)]
mtd: abstract last MTD partition parser argument

Encapsulate last MTD partition parser argument into a separate
structure. Currently it holds only 'origin' field for RedBoot parser,
but will be extended in future to contain at least device_node for OF
devices.

Amended commentary to make kerneldoc happy

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com>
11 years agomtd: add new API for handling MTD registration
Dmitry Eremin-Solenikov [Fri, 25 Mar 2011 19:26:25 +0000 (22:26 +0300)]
mtd: add new API for handling MTD registration

Lots (nearly all) mtd drivers contain nearly the similar code that
calls parse_mtd_partitions, provides some platform-default values, if
parsing fails, and registers  mtd device.

This is an aim to provide single implementation of this scenario:
mtd_device_parse_register() which will handle all this parsing and
defaults.

Artem: amended comments

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
11 years agoclk: add helper functions clk_prepare_enable and clk_disable_unprepare
Richard Zhao [Tue, 15 Nov 2011 06:47:56 +0000 (14:47 +0800)]
clk: add helper functions clk_prepare_enable and clk_disable_unprepare

It's for migrating to generic clk framework API.

The helper functions  help cases clk_enable/clk_disable is used
in non-atomic context.
For example, Call clk_enable in probe and clk_disable in remove.

Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
11 years agoclk: provide prepare/unprepare functions
Russell King [Thu, 22 Sep 2011 10:30:50 +0000 (11:30 +0100)]
clk: provide prepare/unprepare functions

As discussed previously, there's the need on some platforms to run some
parts of clk_enable() in contexts which can schedule.  The solution
which was agreed upon was to provide clk_prepare() and clk_unprepare()
to contain this parts, while clk_enable() and clk_disable() perform
the atomic part.

This patch provides a common definition for clk_prepare() and
clk_unprepare() in linux/clk.h, and provides an upgrade path for
existing implementation and drivers: drivers can start using
clk_prepare() and clk_unprepare() once this patch is merged without
having to wait for platform support.  Platforms can then start to
provide these additional functions.

Eventually, HAVE_CLK_PREPARE will be removed from the kernel, and
everyone will have to provide these new APIs.

Acked-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
11 years agodma: mxs-dma: convert to clk_prepare/clk_unprepare
Shawn Guo [Tue, 20 Dec 2011 05:54:00 +0000 (13:54 +0800)]
dma: mxs-dma: convert to clk_prepare/clk_unprepare

The patch converts mxs-dma driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels
Lothar Waßmann [Thu, 8 Dec 2011 08:15:44 +0000 (09:15 +0100)]
dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels

This is how the original Freescale code (unintentionally) worked,
because the code path which would have asserted the CLKGATE bit was
never actually reached in their code.
This fixes the nefarious "DMA timout" bug when multiple DMA channels
(e.g. GPMI NAND and MMC) are used at the same time.
If a better fix for this problem should be found, the clkgate handling
could be reinstated.
See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/065228.html

Also reverse the order of mxs_dma_disable_chan() and
mxs_dma_reset_chan() in mxs_dma_control() because mxs_dma_reset_chan()
can only work when the DMA channel is enabled.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe
Lothar Waßmann [Thu, 8 Dec 2011 08:15:43 +0000 (09:15 +0100)]
dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe

Using a static variable for counting the number of CCWs attached to
a DMA channel when appending a new descriptor is not multi user safe.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: Always leave mxs_dma_init() with the clock disabled.
Lothar Waßmann [Thu, 8 Dec 2011 08:15:42 +0000 (09:15 +0100)]
dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled.

There is no need to have the clock enabled all the time the driver is
loaded.
It will be enabled anyway in mxs_dma_alloc_chan_resources() when a
channel is actually going to be used.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: fix a typo in comment
Lothar Waßmann [Thu, 8 Dec 2011 08:15:41 +0000 (09:15 +0100)]
dma: mxs-dma: fix a typo in comment

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodmaengine: move drivers to dma_transfer_direction
Vinod Koul [Thu, 13 Oct 2011 17:04:23 +0000 (22:34 +0530)]
dmaengine: move drivers to dma_transfer_direction

fixup usage of dma direction by introducing dma_transfer_direction,
this patch moves dma/drivers/* to use new enum

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Viresh Kumar <viresh.kumar@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Mika Westerberg <mika.westerberg@iki.fi>
Cc: H Hartley Sweeten <hartleys@visionengravers.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Zhang Wei <zw@zh-kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Yong Wang <yong.y.wang@intel.com>
Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Cc: Barry Song <Baohua.Song@csr.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agoARM: mxs-dma: include <linux/dmaengine.h>
Dong Aisheng [Wed, 13 Jul 2011 03:40:54 +0000 (11:40 +0800)]
ARM: mxs-dma: include <linux/dmaengine.h>

Other files using dma.h may fail to compile as follows:
In file included from sound/soc/mxs/mxs-pcm.h:22,
                 from sound/soc/mxs/mxs-saif.h:112,
                 from sound/soc/mxs/mxs-sgtl5000.c:34:
arch/arm/mach-mxs/include/mach/dma.h:16: warning: 'struct dma_chan' declared inside parameter list
arch/arm/mach-mxs/include/mach/dma.h:16: warning: its scope is only this definition or declaration, which is probably not what you want
arch/arm/mach-mxs/include/mach/dma.h: In function 'mxs_dma_is_apbh':
arch/arm/mach-mxs/include/mach/dma.h:18: error: dereferencing pointer to incomplete type
arch/arm/mach-mxs/include/mach/dma.h: At top level:
arch/arm/mach-mxs/include/mach/dma.h:21: warning: 'struct dma_chan' declared inside parameter list
arch/arm/mach-mxs/include/mach/dma.h: In function 'mxs_dma_is_apbx':
arch/arm/mach-mxs/include/mach/dma.h:23: error: dereferencing pointer to incomplete type
make[3]: *** [sound/soc/mxs/mxs-sgtl5000.o] Error 1
make[2]: *** [sound/soc/mxs] Error 2
make[1]: *** [sound/soc] Error 2
make: *** [sound] Error 2

It seems it's better for dma.h to include dmaengine.h himself.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
11 years agodmaengine: add DMA_TRANS_NONE to dma_transfer_direction
Shawn Guo [Tue, 13 Dec 2011 15:48:03 +0000 (23:48 +0800)]
dmaengine: add DMA_TRANS_NONE to dma_transfer_direction

Before dma_transfer_direction was introduced to replace
dma_data_direction, some dmaengine device uses DMA_NONE of
dma_data_direction for some talk with its client drivers.
The mxs-dma and its clients mxs-mmc and gpmi-nand are such case.

This patch adds DMA_TRANS_NONE to dma_transfer_direction and
migrate the DMA_NONE use in mxs-dma to it.

It also fixes the compile warning below.

CC      drivers/dma/mxs-dma.o
drivers/dma/mxs-dma.c: In function ‘mxs_dma_prep_slave_sg’:
drivers/dma/mxs-dma.c:420:16: warning: comparison between ‘enum dma_transfer_direction’ and ‘enum dma_data_direction’

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agolinux/dmaengine.h: fix implicit use of bitmap.h and asm/page.h
Paul Gortmaker [Fri, 29 Jul 2011 06:55:11 +0000 (16:55 +1000)]
linux/dmaengine.h: fix implicit use of bitmap.h and asm/page.h

The implicit presence of module.h and all its sub-includes was
masking these implicit header usages:

include/linux/dmaengine.h:684: warning: 'struct page' declared inside parameter list
include/linux/dmaengine.h:684: warning: its scope is only this definition or declaration, which is probably not what you want
include/linux/dmaengine.h:687: warning: 'struct page' declared inside parameter list
include/linux/dmaengine.h:736:2: error: implicit declaration of function 'bitmap_zero'

With input from Stephen Rothwell <sfr@canb.auug.org.au>

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
11 years agodmaengine: add new enum dma_transfer_direction
Vinod Koul [Thu, 13 Oct 2011 09:45:27 +0000 (15:15 +0530)]
dmaengine: add new enum dma_transfer_direction

This new enum removes usage of dma_data_direction for dma direction. The new
enum cleans tells the DMA direction and mode
This further paves way for merging the dmaengine _prep operations and also for
interleaved dma

Suggested-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodmaengine: remove struct scatterlist for header
Vinod Koul [Tue, 9 Aug 2011 04:38:10 +0000 (10:08 +0530)]
dmaengine: remove struct scatterlist for header

Commit 90b44f8 introduces dmaengine_prep_slave_single API which adds
scatterlist.h in dmaengine.h, so defining struct scatterlist is not required

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
11 years agodmaengine: add helper function for slave_single
Vinod Koul [Mon, 25 Jul 2011 14:27:52 +0000 (19:57 +0530)]
dmaengine: add helper function for slave_single

For clients which require a single slave transfer and dont want to be bothered
about the scatterlist api, this helper gives simple API for this transfer and
creates single scatterlist for DMA API

Idea from Russell King

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
11 years agonet: remove mm.h inclusion from netdevice.h
Alexey Dobriyan [Thu, 16 Jun 2011 11:01:34 +0000 (11:01 +0000)]
net: remove mm.h inclusion from netdevice.h

Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).

To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.

Hope people are OK with tiny include file.

Note, that mm_types.h is still dragged in, but it is a separate story.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
11 years agoENGR00173369-3 Revert "ENGR00143126-3 ARM: add DMA driver for mx50"
Huang Shijie [Tue, 31 Jan 2012 02:54:39 +0000 (10:54 +0800)]
ENGR00173369-3 Revert "ENGR00143126-3 ARM: add DMA driver for mx50"

This reverts commit 6257fa54c1c66de2c9f72172895ea7e0e3c0845c.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173369-2 Revert "ENGR00139247-6 DMA : add DMA support for imx6q"
Huang Shijie [Tue, 31 Jan 2012 02:54:24 +0000 (10:54 +0800)]
ENGR00173369-2 Revert "ENGR00139247-6 DMA : add DMA support for imx6q"

This reverts commit ab11e98c15ecb29eaf93114cb928478c98d637e9.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173369-1 Revert "ENGR00169906-4 MXS-DMA : change the last parameter...
Huang Shijie [Tue, 31 Jan 2012 02:53:46 +0000 (10:53 +0800)]
ENGR00173369-1 Revert "ENGR00169906-4 MXS-DMA : change the last parameter...

This reverts commit a1a43335ccbf5578eb48edbf16c11e53d76c0123.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agomtd: gpmi-lib: convert to clk_prepare/clk_unprepare
Shawn Guo [Tue, 20 Dec 2011 06:02:05 +0000 (14:02 +0800)]
mtd: gpmi-lib: convert to clk_prepare/clk_unprepare

The patch converts gpmi nand driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Huang Shijie <b32955@freescale.com>
Cc: Artem Bityutskiy <artem.bityutskiy@intel.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
11 years agoENGR00171746 LVDS: Disable channel mode to enter low power when suspend
Wayne Zou [Wed, 11 Jan 2012 06:22:29 +0000 (14:22 +0800)]
ENGR00171746 LVDS: Disable channel mode to enter low power when suspend

1. During suspend, LVDS didn't enter low power status.
   It needs to disable channel mode and mux control.
   It can save ~8mA@3.2V.

2. Clean up the LDB route function for better readability.

3. Fix lvds clk_enable/disable bug,
   clk_enable/disable should base on setting_idx variable.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agomtd: gpmi-nand bugfix: reset the BCH module when it is not MX23
Huang Shijie [Wed, 4 Jan 2012 03:18:46 +0000 (11:18 +0800)]
mtd: gpmi-nand bugfix: reset the BCH module when it is not MX23

In MX28, if we do not reset the BCH module. The BCH module may
becomes unstable when the board reboots for several thousands times.
This bug has been catched in customer's production.

The patch adds some comments(some from Wolfram Sang), and fixes it now.

Also change gpmi_reset_block() to static.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
11 years agomtd: gpmi-nand: move to dma_transfer_direction
Shawn Guo [Tue, 13 Dec 2011 15:48:06 +0000 (23:48 +0800)]
mtd: gpmi-nand: move to dma_transfer_direction

This patch fixes usage of dma direction to adopt dma_transfer_direction.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agomtd: gpmi: add missing include 'module.h'
Wolfram Sang [Wed, 23 Nov 2011 14:57:06 +0000 (15:57 +0100)]
mtd: gpmi: add missing include 'module.h'

Fixes:

drivers/mtd/nand/gpmi-nand/gpmi-nand.c: In function 'gpmi_nfc_init':
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: error: 'THIS_MODULE' undeclared (first use in this function)
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: note: each undeclared identifier is reported only once for each function it appears in
drivers/mtd/nand/gpmi-nand/gpmi-nand.c: At top level:
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:15: error: expected declaration specifiers or '...' before string constant
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: data definition has no type or storage class
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: type defaults to 'int' in declaration of 'MODULE_AUTHOR'

and some more...

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
11 years agoENGR00173287 remove build warning in SDHC driver platform code
Ryan QIAN [Mon, 9 Jan 2012 08:08:18 +0000 (16:08 +0800)]
ENGR00173287 remove build warning in SDHC driver platform code

- remove unused 'u32 reg' in platform code

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173286 merge "eMMC: improve boot_info message output"
Ryan QIAN [Sat, 7 Jan 2012 04:38:06 +0000 (12:38 +0800)]
ENGR00173286 merge "eMMC: improve boot_info message output"

ENGR133884 eMMC: improve boot_info message output

Output bit means of important esd_csd register

Read esd_csd info each time when cat boot_info
becasue user may change config affect esd_csd
value.

boot_info:0x07;
  ALT_BOOT_MODE:1 - Supports alternate boot method
  DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot
  HS_BOOTMODE:1 - Supports high speed timing during boot
boot_size:0512KB
  boot_partition:0x48;
  BOOT_ACK:1 - Boot acknowledge sent during boot operation
  BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled
  PARTITION_ACCESS:0 - No access to boot partition
boot_bus:0x01
  BOOT_MODE:0 - Use single data rate + backward compatible timings
in boot operation
  RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate
and backward compatible timings after boot operation
  BOOT_BUS_WIDTH:1 - x4 (sdr/ddr) bus width in boot operation mode

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173284 merge "eMMC: Configure boot_partition_enable"
Ryan QIAN [Sat, 7 Jan 2012 04:32:40 +0000 (12:32 +0800)]
ENGR00173284 merge "eMMC: Configure boot_partition_enable"

ENGR126228 eMMC: Configure boot_partition_enable

Enable the configurations of the boot enable on the eMMC cards.

Add the interface that used to configure the boot_bus_width

In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.

NOTE:
The following are the valid inputs when configure the boot
bus width of the eMMC cards.
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2                 | Bit1 Bit0      |
|----------------|----------------------------------|----------------|
| X              | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved

The following are the valid inputs when configure the boot
partitions of the eMMC cards.
+------------------------------------------------------------+
| Bit7 | Bit6     | Bit5 Bit4 Bit3        | Bit2 Bit1 Bit0   |
|------|----------|-----------------------|------------------|
| X    | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
So only the '0, 1, 2; 8, 9, 10; 16, 17, 18; 56, 57, 58' are
valid parameters when configure the boot_partiton.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173283 merge "eMMC: Boot Partition switch func used in MFG tool"
Ryan QIAN [Sat, 7 Jan 2012 04:20:28 +0000 (12:20 +0800)]
ENGR00173283 merge "eMMC: Boot Partition switch func used in MFG tool"

ENGR125411 eMMC: Boot Partition switch func used in MFG tool

User can get eMMC partitions info from user space layer in
linux OS enviroment.
User can do switch operations between the eMMC boot partitions
and the user partition.
User can access the eMMC boot partitions from user space layer
in linux OS enviroment.
NOTE:This func had been verified on TOSHIBA eMMC44 card only.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agomtd: fix compile error for gpmi-nand
Huang Shijie [Tue, 13 Dec 2011 15:48:05 +0000 (23:48 +0800)]
mtd: fix compile error for gpmi-nand

The driver gpmi-nand should compile at least.  This patch adds the
missing gpmi-nand.h to fix the compile error below.

  CC      drivers/mtd/nand/gpmi-nand/gpmi-nand.o
  CC      drivers/mtd/nand/gpmi-nand/gpmi-lib.o
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:25:33: fatal error: linux/mtd/gpmi-nand.h: No such file or directory
drivers/mtd/nand/gpmi-nand/gpmi-lib.c:21:33: fatal error: linux/mtd/gpmi-nand.h: No such file or directory

This header is grabbed from patch below, which has not been postponed
for merging.

  [PATCH v8 1/4] ARM: mxs: add GPMI-NAND support for imx23/imx28
  http://permalink.gmane.org/gmane.linux.drivers.mtd/37338

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agomtd: add the common code for GPMI-NAND controller driver
Huang Shijie [Thu, 8 Sep 2011 02:47:09 +0000 (10:47 +0800)]
mtd: add the common code for GPMI-NAND controller driver

These files contain the common code for the GPMI-NAND driver.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
11 years agomtd: add GPMI-NAND driver in the config and Makefile
Huang Shijie [Thu, 8 Sep 2011 02:47:11 +0000 (10:47 +0800)]
mtd: add GPMI-NAND driver in the config and Makefile

add the GPMI-NAND driver in the relevant Kconfig and Makefile in the MTD.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
11 years agomtd: add helper functions library and header files for GPMI NAND driver
Huang Shijie [Thu, 8 Sep 2011 02:47:10 +0000 (10:47 +0800)]
mtd: add helper functions library and header files for GPMI NAND driver

bch-regs.h : registers file for BCH module
gpmi-regs.h: registers file for GPMI module
gpmi-lib.c: helper functions library.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
11 years agoENGR00172362 mx6q-ard cleanup i2c board settings
Adrian Alonso [Wed, 18 Jan 2012 20:56:32 +0000 (14:56 -0600)]
ENGR00172362 mx6q-ard cleanup i2c board settings

* Clean i2c board settings for sabreauto platform
* Remove and unregister i2c0 device not used in this board
* Move i2c3 pads to general mx6q_sabreauto_pads[]
* [v2] add camera module ov3640 module to i2c2 bus

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00171946 SPI nor chip select update
Francisco Munoz [Fri, 13 Jan 2012 01:13:36 +0000 (19:13 -0600)]
ENGR00171946 SPI nor chip select update

SPI nor cannot be probed, due to a previous patch which
modified its chip select settings.

Signed-off-by: Francisco Munoz <b37752@freescale.com>
11 years agoENGR00172360-2 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock code
Danny Nold [Thu, 19 Jan 2012 20:56:33 +0000 (14:56 -0600)]
ENGR00172360-2 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock code

Due to the use of some higher frequencies for HDMI video modes, the
IPU clock set/get/round functions need to use 64-bit variables
for clock calculations instead of 32-bit variables.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00172360-1 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock co
Danny Nold [Thu, 19 Jan 2012 20:53:51 +0000 (14:53 -0600)]
ENGR00172360-1 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock co

Update get_rate, set_rate, and round_rate for audio_video PLLs
to account for new dividers added for MX6Q TO1.1.  Since default value
for one of these dividers is 4, this is important for function of clocks
derived from PLL4 and PLL5.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00172476 [USB Host]change the default wakeup value of RH
Tony LIU [Fri, 20 Jan 2012 03:14:54 +0000 (11:14 +0800)]
ENGR00172476 [USB Host]change the default wakeup value of RH

- change the default wakeup value of RH from enabled to disabled

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00172475 [USB]Add wakeup entry for USB device on Kernel3.0
Tony LIU [Fri, 20 Jan 2012 03:02:18 +0000 (11:02 +0800)]
ENGR00172475 [USB]Add wakeup entry for USB device on Kernel3.0

- in Kernel 3.0, all the wakeup entry is removed by default,
  we need add it manually

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00173271 [mx6q] Fix build break in imx6_updater_defconfig
Nancy Chen [Fri, 27 Jan 2012 10:55:42 +0000 (04:55 -0600)]
ENGR00173271 [mx6q] Fix build break in imx6_updater_defconfig

Enable PFUZE regulator.

Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172375 MX6Q Sabresd: Enable camera sensors
Nancy Chen [Wed, 25 Jan 2012 15:39:01 +0000 (09:39 -0600)]
ENGR00172375 MX6Q Sabresd: Enable camera sensors

1. Enable parallel csi camera sensor, default sensor is ov5640
2. Enable mipi csi2 camera sensor, default sensor is ov5640
3. Rename to sabresd

Signed-off-by: Even Xu <b21019@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172752-2 Remove usless code in pfuze100 regulator driver
Nancy Chen [Wed, 25 Jan 2012 15:01:36 +0000 (09:01 -0600)]
ENGR00172752-2 Remove usless code in pfuze100 regulator driver

Remove usless code in pfuze100 regulator driver

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172752-1 MX6Q: Add pfuze100 support for Sabre SD
Nancy Chen [Wed, 25 Jan 2012 15:00:48 +0000 (09:00 -0600)]
ENGR00172752-1 MX6Q: Add pfuze100 support for Sabre SD

  1. Add pfuze100's init fuction on board level
  2. Add mx6q_sabresd_pmic_pfuze100.c
  3. Rename to sabresd

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172676 MX6Q: Add suport for i.MX 6Q Sabre Smart Device
Nancy Chen [Tue, 24 Jan 2012 22:11:28 +0000 (16:11 -0600)]
ENGR00172676 MX6Q: Add suport for i.MX 6Q Sabre Smart Device

Add suport for i.MX 6Quad SABRE Smart Device.
Rename to SABRESD.

Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172427 SPDIF: Add spdif build support.
Alan Tull [Thu, 12 Jan 2012 15:44:41 +0000 (09:44 -0600)]
ENGR00172427 SPDIF: Add spdif build support.

Add spdif to Makefile.

Signed-off-by: Alan Tull <r80115@freescale.com>
11 years agoENGR00172374-7 Sound: Asoc: fix the snd_soc_resume resume crash
Jason Liu [Tue, 10 Jan 2012 04:54:23 +0000 (12:54 +0800)]
ENGR00172374-7 Sound: Asoc: fix the snd_soc_resume resume crash

[  330.922320] [<800417e0>] (__bug+0x1c/0x24) from [<8007b4dc>] (__queue_work+0x24c/0x3f0)
[  330.930333] [<8007b4dc>] (__queue_work+0x24c/0x3f0) from [<8007b6e0>] (queue_work_on+0x38/0x40)
[  330.939039] [<8007b6e0>] (queue_work_on+0x38/0x40) from [<8007d568>] (queue_work+0x2c/0x58)
[  330.947401] [<8007d568>] (queue_work+0x2c/0x58) from [<803b83a4>] (snd_soc_resume+0x98/0xb8)
[  330.955852] [<803b83a4>] (snd_soc_resume+0x98/0xb8) from [<80280aa4>] (platform_pm_resume+0x2c/0x4c)
[  330.964996] [<80280aa4>] (platform_pm_resume+0x2c/0x4c) from [<80284388>] (pm_op+0xe4/0x11c)
[  330.973441] [<80284388>] (pm_op+0xe4/0x11c) from [<80284780>] (device_resume+0x78/0x13c)
[  330.981537] [<80284780>] (device_resume+0x78/0x13c) from [<802849d0>] (dpm_resume+0x144/0x194)
[  330.990154] [<802849d0>] (dpm_resume+0x144/0x194) from [<80284a2c>] (dpm_resume_end+0xc/0x18)
[  330.998692] [<80284a2c>] (dpm_resume_end+0xc/0x18) from [<8009cf18>] (suspend_devices_and_enter+0x78/0xb8)
[  331.008355] [<8009cf18>] (suspend_devices_and_enter+0x78/0xb8) from [<8009d010>] (enter_state+0xb8/0xe4)
[  331.017842] [<8009d010>] (enter_state+0xb8/0xe4) from [<8009c5b4>] (state_store+0x8c/0xc0)
[  331.026116] [<8009c5b4>] (state_store+0x8c/0xc0) from [<80223b20>] (kobj_attr_store+0x18/0x1c)
[  331.034740] [<80223b20>] (kobj_attr_store+0x18/0x1c) from [<801352ec>] (sysfs_write_file+0x104/0x184)
[  331.043969] [<801352ec>] (sysfs_write_file+0x104/0x184) from [<800e4ce8>] (vfs_write+0xb4/0x148)
[  331.052762] [<800e4ce8>] (vfs_write+0xb4/0x148) from [<800e4e4c>] (sys_write+0x40/0x70)
[  331.060781] [<800e4e4c>] (sys_write+0x40/0x70) from [<8003e380>] (ret_fast_syscall+0x0/0x30)

The commit:c4e133f ASoC: core: Don't schedule deferred_resume_work twice
commit c4e133f4e253b57e5d4409964a3b51f2d887e94b
Author: Stephen Warren <swarren@nvidia.com>
Date:   Wed May 25 14:06:41 2011 -0600

    ASoC: core: Don't schedule deferred_resume_work twice

    commit 82e14e8bdd88b69018fe757192b01dd98582905e upstream.

    For cards that have two or more DAIs, snd_soc_resume's loop over all
    DAIs ends up calling schedule_work(deferred_resume_work) once per DAI.
    Since this is the same work item each time, the 2nd and subsequent
    calls return 0 (work item already queued), and trigger the dev_err
    message below stating that a work item may have been lost.

    Solve this by adjusting the loop to simply calculate whether to run the
    resume work immediately or defer it, and then call schedule work (or not)
    one time based on that.

    Note: This has not been tested in mainline, but only in chromeos-2.6.38;
    mainline doesn't support suspend/resume on Tegra, nor does the mainline
    Tegra ASoC driver contain multiple DAIs. It has been compile-checked in
    mainline.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
changed the defaut behaviour for non-ac97 class which cause deferred_resume_work
was scheduled not by desire when card->num_rdt is zero.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172374-6: fix the mlb modules build errors
Jason Liu [Mon, 9 Jan 2012 07:58:11 +0000 (15:58 +0800)]
ENGR00172374-6: fix the mlb modules build errors

/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mlb_tx_isr':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: (Each undeclared identifier is reported only once
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: for each function it appears in.)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mlb_rx_isr':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1400: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mxc_mlb150_read':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: implicit declaration of function 'signal_pending'
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: implicit declaration of function 'schedule'

missing one header file: sched.h, add it to fix it.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172374-5: GPIO: use chained_irq_enter/exit pair
Jason Liu [Mon, 9 Jan 2012 07:28:39 +0000 (15:28 +0800)]
ENGR00172374-5: GPIO: use chained_irq_enter/exit pair

Kernel oops when plug in/out sd card and throw out null pointer

this is due to: commit: 1a01753 ARM: gic: use handle_fasteoi_irq for SPIs

commit 1a01753ed90a4fb84357b9b592e50564c07737f7
Author: Will Deacon <will.deacon@arm.com>
Date:   Wed Feb 9 12:01:12 2011 +0000

    ARM: gic: use handle_fasteoi_irq for SPIs

    Currently, the gic uses handle_level_irq for handling SPIs (Shared
    Peripheral Interrupts), requiring active interrupts to be masked at
    the distributor level during IRQ handling.

    On a virtualised system, only the CPU interfaces are virtualised in
    hardware. Accesses to the distributor must be trapped by the
    hypervisor, adding latency to the critical interrupt path in Linux.

    This patch modifies the GIC code to use handle_fasteoi_irq for handling
    interrupts, which only requires us to signal EOI to the CPU interface
    when handling is complete. Cascaded IRQ handling is also updated to use
    the chained IRQ enter/exit functions to honour the flow control of the
    parent chip.

    Note that commit 846afbd1 ("GIC: Dont disable INT in ack callback")
    broke cascading interrupts by forgetting to add IRQ masking. This is
    no longer an issue because the unmask call is now unnecessary.

    Tested on Versatile Express and Realview EB (1176 w/ cascaded GICs).

Tested-and-reviewed-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Tested-and-acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
the above commit has removed the irq_ack from gic chip tus the following call:
desc->irq_data.chip->irq_ack(&desc->irq_data);
will trow the kernel oops, to fix it, just involve the pair to fix it.

chained_irq_enter(chip, desc);
chained_irq_exit(chip, desc);

This also aligns the upstream kernel doing such as v3.2

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172374-4: remove platform _adjust_dma_zone function
Jason Liu [Mon, 9 Jan 2012 05:11:57 +0000 (13:11 +0800)]
ENGR00172374-4: remove platform _adjust_dma_zone function

fix the compiling warnings when upgrade to v3.0

arch/arm/mm/init.c:215: warning: 'arm_adjust_dma_zone' defined but not used

The commit: be20902 ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizes by
Russell has make the _adjust_dma_zone function the common help function, thus
we can remove platform _adjust_dma_zone function by just define:ARM_DMA_ZONE_SIZE

commit be20902ba67de70b38c995903321f4152dee57b7
Author: Russell King <rmk+kernel@arm.linux.org.uk>
Date:   Wed May 11 15:39:00 2011 +0100

    ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizes

    Rather than each platform providing its own function to adjust the
    zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this
    adjustment.  This ensures that the actual DMA zone size and the
    ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with
    each other, and moves this complexity out of the platform code.

Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172374-3: flexcan: use irq_set_irq_wake
Jason Liu [Thu, 19 Jan 2012 06:04:43 +0000 (14:04 +0800)]
ENGR00172374-3: flexcan: use irq_set_irq_wake

fix the building errors when upgrade to v3.0

The following commit change the function name:
commit a0cd9ca2b907d7ee26575e7b63ac92dad768a75e
Author: Thomas Gleixner <tglx@linutronix.de>
Date:   Thu Feb 10 11:36:33 2011 +0100

    genirq: Namespace cleanup

    The irq namespace has become quite convoluted. My bad.  Clean it up
    and deprecate the old functions. All new functions follow the scheme:

    irq number based:
        irq_set/get/xxx/_xxx(unsigned int irq, ...)

    irq_data based:
         irq_data_set/get/xxx/_xxx(struct irq_data *d, ....)

    irq_desc based:
         irq_desc_get_xxx(struct irq_desc *desc)

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
We need give one fix to change the function call name to align this change,

-       ret = set_irq_wake(dev->irq, 1);
+       ret = irq_set_irq_wake(dev->irq, 1);

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172374-2: pfuze: use pdata_size from mfd_cell struct
Jason Liu [Thu, 19 Jan 2012 05:52:13 +0000 (13:52 +0800)]
ENGR00172374-2: pfuze: use pdata_size from mfd_cell struct

fix the building errors when upgrade to v3.0

we use data_size from mfd_cell struct on 2.6.38, but after that
there are some changes for this field of mfd_cell struct, see:

commit 40e03f571b2e63827f2afb90ea9aa459612c29e3
Author: Andres Salomon <dilinger@queued.net>
Date:   Thu Feb 17 19:07:24 2011 -0800

    mfd: Drop data_size from mfd_cell struct

    Now that there are no more users of this, drop it.

Signed-off-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
and this:

commit eb8956074e7652e802be5f078080c704c2c87104
Author: Samuel Ortiz <sameo@linux.intel.com>
Date:   Wed Apr 6 16:52:52 2011 +0200

    mfd: Add platform data pointer back

    Now that we have a way to pass MFD cells down to the sub drivers,
    we can gradually get rid of mfd_data by putting the platform pointer
    back in place.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
But the above commit also change the name from data_size to pdata_size,
This patch just give one fix for the pfuze driver to use pdata_size field.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172374-1 i.mx: CPUFREQ: not use cpufreq_debug_printk
Jason Liu [Fri, 6 Jan 2012 09:37:29 +0000 (17:37 +0800)]
ENGR00172374-1 i.mx: CPUFREQ: not use cpufreq_debug_printk

fix the building errors when upgrade to v3.0

commit: d06d8c [CPUFREQ] use dynamic debug instead of custom infrastructure
has removed cpufreq_debug_printk, we will give one update for i.mx driver

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172281 GPMI : fix the wrong flag for send_page()
Huang Shijie [Wed, 18 Jan 2012 04:45:45 +0000 (12:45 +0800)]
ENGR00172281 GPMI : fix the wrong flag for send_page()

There is only one DMA command in the chain,
So MXS_DMA_F_APPEND is not needed.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00172222:imx6_defconfig: enable ARM errata software workaround 764369
Jason Liu [Tue, 17 Jan 2012 11:00:30 +0000 (19:00 +0800)]
ENGR00172222:imx6_defconfig: enable ARM errata software workaround 764369

We need enable the following ARM errata software workaround:

    CONFIG_ARM_ERRATA_764369=y

This errata is TKT078684 in i.MX6Q errata list.

In order to enable this errata, we need cherry-pick the following commit:
ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed:
f64f6df4241093ea928b0a263ec53b93b65efc08

In order to apply the above patch successfully and keep the git history, we also
need cherry-pick the following commit:

ARM: pm: add function to set WFI low-power mode for SMP CPUs
292ec42af7c6361435fe9df50cd59ec76f6741c6

These ERRATAs applied to i.MX6Q(cortex-a9:r2p10 smp)

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172008 HDMI audio continues playing after doing ctrl-z
Alan Tull [Tue, 17 Jan 2012 14:34:44 +0000 (08:34 -0600)]
ENGR00172008 HDMI audio continues playing after doing ctrl-z

The bug is that HDMI audio continues playing after doing ctrl-z,
repeating playing a small part of the buffer.

Mask HDMI audio irq when we receive SNDRV_PCM_TRIGGER_STOP command.
Unmask when we receive SNDRV_PCM_TRIGGER_START.

Signed-off-by: Alan Tull <r80115@freescale.com>
11 years agoENGR00169906-5 GPMI : change the code for new interface
Huang Shijie [Mon, 16 Jan 2012 07:01:55 +0000 (15:01 +0800)]
ENGR00169906-5 GPMI : change the code for new interface

If we do not set the WAIT4END in the middle DMA command structure
of the long DMA command chain, a DMA timeout may occurs.

The reason of the DMA timeout is:
[1] We do not set the WAIT4END in the DMA command structure
    which do the ECC READ PAGE by the BCH.
[2] So the following DMA command structure (maybe in other DMA
CHAIN)may disable the BCH module.
[3] If the time delay between [2] and [1] is long enough,
    it's ok. But if the time delay is not long enough, the BCH
    module may become unnormal, so it can not finish its job.
    The DMA will timeout in this case.

We have changed the DMA interface to fix the bug, now use the new
interface.

Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169906-4 MXS-DMA : change the last parameter of mxs_dma_prep_slave_sg()
Huang Shijie [Mon, 16 Jan 2012 09:39:12 +0000 (17:39 +0800)]
ENGR00169906-4 MXS-DMA : change the last parameter of mxs_dma_prep_slave_sg()

For a long DMA chain which may have more then two DMA Command Structures,
the current DMA code sets the WAIT4END bit at the last one, such as:

+-----+       +-----+    +-----+
| cmd | ------------> | cmd | ------------------>  | cmd |
+-----+       +-----+    +-----+
       ^
       |
       |
      set WAIT4END here

But in the NAND ECC read case, the WAIT4END bit should be set
not only at the last DMA Command Structure, but also at the middle one,
such as:

+-----+       +-----+    +-----+
| cmd | ------------> | cmd | ------------------>  | cmd |
+-----+       +-----+    +-----+
                         ^                            ^
 |                            |
 |                            |
set WAIT4END here too        set WAIT4END here

We set the WAIT4END in the middle DMA Command Structure to ensure
the BCH module finishs its job. If we do not wait in this situation,
the BCH module may be changed in the following DMA Command Structures,
and it maybe becomes unstable which will cause a DMA timeout
This has been catched in the MX6Q board.

So rewrite the last parameter of mxs_dma_prep_slave_sg().
Add some more flags to let the driver sets the WAIT4END as it needs.

Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169906-3 MXS-DMA : add new flags
Huang Shijie [Mon, 16 Jan 2012 09:37:10 +0000 (17:37 +0800)]
ENGR00169906-3 MXS-DMA : add new flags

We catch a DMA timeout bug in the NAND in mx6q.

If we do not set the WAIT4END in the middle DMA command structure
of the long DMA command chain, a DMA timeout may occurs.

In order to fix the bug, we should let the driver to
set the proper DMA flags in the DMA command structrues.

So add the new flags for MXS-DMA.

The driver can use these flags to control the DMA in a flexible way.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169906-2 GPMI : setup the TIMING1 for ready/busy
Huang Shijie [Mon, 9 Jan 2012 07:59:01 +0000 (15:59 +0800)]
ENGR00169906-2 GPMI : setup the TIMING1 for ready/busy

The TIMING1 specifies the timeouts used when monitoring the
NAND READY pin and IOWAIT signals.

We should set a default value for it.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169906-1 GPMI : set the GPMI to 20M by default
Huang Shijie [Mon, 16 Jan 2012 09:09:34 +0000 (17:09 +0800)]
ENGR00169906-1 GPMI : set the GPMI to 20M by default

The 11M for GPMI is too slow.

Change the GPMI to 20MHz by default, most of the NAND
chips can run with this frequency.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00172175 MX6Q: OV5640_MIPI support fast configure
Even Xu [Tue, 17 Jan 2012 02:04:31 +0000 (10:04 +0800)]
ENGR00172175 MX6Q: OV5640_MIPI support fast configure

OV5640_MIPI need to be configure faster to get capture image
quickly. So change the configures, when change the resolution
OV5640_MIPI sensor will not do reset.

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00171462-2 vpu: fix vpu cannot run after suspend/resume
Sammy He [Thu, 12 Jan 2012 05:15:33 +0000 (13:15 +0800)]
ENGR00171462-2 vpu: fix vpu cannot run after suspend/resume

This patch fix vpu cannot run issue after suspend/resume
with stop mode. Need to re-load vpu firmware if current PC
is zero.

Signed-off-by: Sammy He <r62914@freescale.com>
11 years agoENGR00171462-1 vpu: add BIT_PIC_RUN register in mxc_vpu.h
Sammy He [Thu, 12 Jan 2012 05:00:24 +0000 (13:00 +0800)]
ENGR00171462-1 vpu: add BIT_PIC_RUN register in mxc_vpu.h

Add BIT_PIC_RUN register definition in mxc_vpu.h of arch/arm

Signed-off-by: Sammy He <r62914@freescale.com>
11 years agoENGR00171949:gpu-viv: change from mutex to completion for waiting pm events
wu guoxing [Fri, 13 Jan 2012 01:57:41 +0000 (09:57 +0800)]
ENGR00171949:gpu-viv: change from mutex to completion for waiting pm events

viv code is using mutex to wait for pm events,
kernel will see this as a dead lock and give a warrning, as the mutex
can be hold for a long time.

Signed-off-by: Wu Guoxing <b39297@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00171383 HDMI: blank and unblank display can not resume.
Sandor Yu [Wed, 11 Jan 2012 08:42:53 +0000 (16:42 +0800)]
ENGR00171383 HDMI: blank and unblank display can not resume.

It cause by HDMI Blank/Unblank function not implement.
Implement the HDMI blank/unblank function.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00171890 [MX6Q_ARD]fix the boot fail when otg power is not initialized
Anson Huang [Thu, 12 Jan 2012 12:53:07 +0000 (20:53 +0800)]
ENGR00171890 [MX6Q_ARD]fix the boot fail when otg power is not initialized

Add u43 setting back

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Hake Huang <b20222@freescale.com>
11 years agoENGR00171116 [MX6]Remove unnecessary workaround for suspend/resume
Anson Huang [Sat, 31 Dec 2011 11:00:55 +0000 (19:00 +0800)]
ENGR00171116 [MX6]Remove unnecessary workaround for suspend/resume

The root cause of suspend/resume fail has been found,
the i-cache should be invalidated before resume. So
the workaround can be removed.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00171731 ipuv3 dev: add time statistic for each task
Jason Chen [Wed, 11 Jan 2012 06:03:42 +0000 (14:03 +0800)]
ENGR00171731 ipuv3 dev: add time statistic for each task

add time statistic for each task

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00171622 - FEC : workaround for Gb enet in sabrelite board.
Fugang Duan [Wed, 11 Jan 2012 05:34:40 +0000 (13:34 +0800)]
ENGR00171622 - FEC : workaround for Gb enet in sabrelite board.

Micrel phy KSZ9021 Gb speed cannot work well in i.MX6 sabrelite
board. Advertise PHY is not 1000Base-T capable.

If nfs boot kernel, phy will work at 100Mbps, or else phy will
work at Gbps mode. And if hot-plugin cable, phy will work at Gbps
mode. Enet can work well in all of them.

But in Gbps mode, uDMA sometime cannot write  frame "L" bit in
exuberate transfer, so driver will print some warning message:
"FEC ENET: rcv is not +last"

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00171708: [v2] Remove build warnings in ENGR00170444
B37753 [Wed, 11 Jan 2012 05:24:01 +0000 (05:24 +0000)]
ENGR00171708: [v2] Remove build warnings in ENGR00170444

Remove ddc_dvi_init and ddc_dvi_update functions because
    those generate a compiler warning.
Also remove I2C duplicate IOMUXES and devices.

Signed-off-by: Israel Perez <B37753@freescale.com>
11 years agoENGR00171792: MX6Q_ARD: fix the pad setting conflicts between can0 and enet
Hake Huang [Wed, 11 Jan 2012 10:39:08 +0000 (18:39 +0800)]
ENGR00171792: MX6Q_ARD: fix the pad setting conflicts between can0 and enet

1. need add 'can0' in kernel commandline to enable can1,
the default enet is enabled, can2 is not affected by this.
2. add  MX6Q_PAD_SD2_DAT0__GPIO_1_15 back in pad setting,
as this is required for enet rework.
   add 4.7k pull down and GPIO_1_15 will reset the u39,
   to make it functional, we need pull high.
3. the ENET PHY steering is configured by u39 setting.

Signed-off-by: Hake Huang <b20222@freescale.com>
11 years agoENGR00170453-1 ssi: disable ssi2 clk after probe
Gary Zhang [Wed, 11 Jan 2012 02:47:11 +0000 (10:47 +0800)]
ENGR00170453-1 ssi: disable ssi2 clk after probe

disable ssi2 clk after init ssi.

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00171544 usb-core: usb host will be broken after system pm test
Peter Chen [Wed, 11 Jan 2012 03:27:45 +0000 (11:27 +0800)]
ENGR00171544 usb-core: usb host will be broken after system pm test

At i.mx6q sabrelite, there is a usb hub on board. After several
suspend suspend/resume iterations, the usb host will be broken.
It is IC limitation, and similar with:
574b9641d5846e58273dac6bf80fcf1ff312c5c9

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00169489-2 Add OV5642 csi camera support for i.mx6 sabre-lite board.
Yi Li [Mon, 2 Jan 2012 20:02:19 +0000 (14:02 -0600)]
ENGR00169489-2 Add OV5642 csi camera support for i.mx6 sabre-lite board.

Add OV5642 csi camera support for i.mx6 sabre-lite board

Signed-off-by: Yi Li <R80015@freescale.com>
11 years agoENGR00169489-1 Add OV5642 csi camera support for i.mx6 sabre-lite board.
Yi Li [Mon, 2 Jan 2012 20:01:46 +0000 (14:01 -0600)]
ENGR00169489-1 Add OV5642 csi camera support for i.mx6 sabre-lite board.

Add OV5642 csi camera support for i.mx6 sabre-lite board

Signed-off-by: Yi Li <R80015@freescale.com>
11 years agoENGR00171721 MX6Q: Add ADV7180 build as a module
Even Xu [Wed, 11 Jan 2012 03:06:58 +0000 (11:06 +0800)]
ENGR00171721 MX6Q: Add ADV7180 build as a module

Add ADV7180 build as a module

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00171444 HDMI: Change video mode system will hang.
Sandor Yu [Mon, 9 Jan 2012 13:23:33 +0000 (21:23 +0800)]
ENGR00171444 HDMI: Change video mode system will hang.

There are two couples register for HDMI PHY interrupt/mask:
HDMI_FC_INT2, HDMI_FC_MASK2 and HDMI_IH_FC_STAT2, HDMI_IH_MUTE_FC_STAT2.
The register can not mixed use it, otherwise the interrupt will missing
and not clean.
Mask interrupt with HDMI_IH_MUTE_FC_STAT2 so check interrupt
should use register HDMI_IH_FC_STAT2.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00170740 enable pwm3 and pwm both lvds backlight
Guillermo Michel [Mon, 9 Jan 2012 18:59:47 +0000 (10:59 -0800)]
ENGR00170740 enable pwm3 and pwm both lvds backlight

configured GPIOs, added pwms iomux configuration, added both backlights

Signed-off-by: Guillermo Michel <guillermo.michel@freescale.com>
11 years agoENGR00170817 UART2 iomux fix configuration
Alejandro Sierra [Thu, 22 Dec 2011 15:29:55 +0000 (09:29 -0600)]
ENGR00170817 UART2 iomux fix configuration

Added iomux configuration pads to support UART2 through GPIO 7 and GPIO 8
Add flag to enable uart2. This flag avoids configure GPIO7 as CAN mode
when the uart2 is used. The flag is passed through bootargs and is called
uart2.

Signed-off-by: Alejandro Sierra <b18039@freescale.com>
11 years agomxs-dma: enable CLKGATE before accessing registers
Lothar Waßmann [Mon, 8 Aug 2011 12:47:47 +0000 (14:47 +0200)]
mxs-dma: enable CLKGATE before accessing registers

After calling mxs_dma_disable_chan() for a channel, that channel
becomes unusable because some controller registers can only be written
when the clock is enabled via CLKGATE.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
11 years agoARM: mxs-dma: reset after disable channel
Dong Aisheng [Tue, 19 Jul 2011 04:09:56 +0000 (12:09 +0800)]
ARM: mxs-dma: reset after disable channel

We met some channels in abnormal state after disable.
Reset it to get a clean state.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
11 years agodma: mxs-dma: fix unterminated platform_device_id table
Axel Lin [Tue, 12 Jul 2011 10:53:52 +0000 (18:53 +0800)]
dma: mxs-dma: fix unterminated platform_device_id table

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
11 years agodmaengine: mxs-dma: skip request_irq for NO_IRQ
Shawn Guo [Thu, 30 Jun 2011 08:06:33 +0000 (16:06 +0800)]
dmaengine: mxs-dma: skip request_irq for NO_IRQ

In general, the mxs-dma users get separate irq for each channel,
but gpmi is special one which has only one irq shared by all gpmi
channels.  It causes mxs_dma channel allocation function fail for
all other gpmi channels except the first one calling into the
function.

The patch gets request_irq call skipped for NO_IRQ case, and leaves
this gpmi specific quirk to gpmi driver to sort out.  It will fix
above problem if gpmi driver sets chan_irq as gpmi irq for only one
channel and NO_IRQ for all the rest channels.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
11 years agoENGR00170323-mx6q:sabreauto:fix_flexcan_IO_expander_and_pad_settings
Oscar Luna [Mon, 9 Jan 2012 20:41:48 +0000 (14:41 -0600)]
ENGR00170323-mx6q:sabreauto:fix_flexcan_IO_expander_and_pad_settings

Fix CAN1 STBY, EN and STEER pins to be managed through
the IO expander(2) using GPIO's 3,5 and 6. Routes CAN2
TX pin correctly.STEER pin is managed dynamically when
either of the CAN interfaces is UP and/or DOWN.
CAN definitions removed for code clarification.

Signed-off-by: Oscar Luna <r01160@freescale.com>
11 years agoENGR00170880 Add gpio key support
Alejandro Sierra [Thu, 22 Dec 2011 14:37:13 +0000 (08:37 -0600)]
ENGR00170880 Add gpio key support

Adding gpio keys to support Android buttons. Button
functionality are back, menu, home, vol up, vol down

Signed-off-by: Alejandro Sierra <b18039@freescale.com>
11 years agoENGR00171564-3 MX6Q ARM2: Enable TVIN based on AutoBoard
Even Xu [Mon, 9 Jan 2012 08:44:31 +0000 (16:44 +0800)]
ENGR00171564-3 MX6Q ARM2: Enable TVIN based on AutoBoard

- Add adv7180 driver to ARM2 support
- Add adv7180 configure
- Chenge CSI configure for BT656 support

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00171564-2 MX6Q ARM2: Enable TVIN based on AutoBoard
Even Xu [Mon, 9 Jan 2012 08:41:33 +0000 (16:41 +0800)]
ENGR00171564-2 MX6Q ARM2: Enable TVIN based on AutoBoard

- Add TVin platform data
- Configure TVin io: such as RESET, POWERDOWN

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00171564-1 MX6Q ARM2: Enable TVin based on AUTO Board
Even Xu [Mon, 9 Jan 2012 08:37:02 +0000 (16:37 +0800)]
ENGR00171564-1 MX6Q ARM2: Enable TVin based on AUTO Board

Add TVin struct to Head file.

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00171535:gpu-viv: ENGR00170946 is missed when upgrading to viv 4.6.4
wu guoxing [Mon, 9 Jan 2012 01:56:37 +0000 (09:56 +0800)]
ENGR00171535:gpu-viv: ENGR00170946 is missed when upgrading to viv 4.6.4

rmmod fix for gpu is missed, add it back.
and also, change from manual reset to auto reset when gckOS_CreateSignal

Signed-off-by: Wu Guoxing <b39297@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00170912 HDMI: system hang if set hdmi_mode video=mxcfb1
Sandor Yu [Thu, 5 Jan 2012 12:29:52 +0000 (20:29 +0800)]
ENGR00170912 HDMI: system hang if set hdmi_mode video=mxcfb1

System will hang at PHY PLL lock wating loop, if HDMI PHY is down.
Added timeout check for HDMI PHY PLL lock waiting.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00170444: [v3]imx6sabreauto adv7180 TVin port
b37753 [Fri, 6 Jan 2012 21:50:40 +0000 (15:50 -0600)]
ENGR00170444: [v3]imx6sabreauto adv7180 TVin port

Kconfig and Makefile was modified in order to
enable adv7180 driver for mx6q architecture.
adv7180.c mutex was changed to semaphore as is described in
"https://lwn.net/Articles/304725/ ".
sensor data structure is added in fsl_devices.h.
mxc_v4l2_capture.c condition in mxc_v4l2_sparam
was removed because is going to be always true
capture mode only have 1 possible value as is described in
"https://lwn.net/Articles/235023/".
ipu_capture.c clock divisor setup was added at init the csi.

Signed-off-by: B37753 <B37753@freescale.com>
11 years agoENGR00170444: [v3]imx6sabreauto adv7180 TVin port
b37753 [Fri, 6 Jan 2012 21:03:08 +0000 (15:03 -0600)]
ENGR00170444: [v3]imx6sabreauto adv7180 TVin port

imx6sabreauto adv7180 TVin port
ioexpanders addresss were incorrect, modification in
board-mx6q_sabreauto.c was done.
adv7180 boot structures and i2c structures were added in board-mx6q_sabreauto.c
i2c3 was not configured properly modified in iomux-mx6q.h.

Signed-off-by: B37753 <B37753@freescale.com>
11 years agoENGR00170124: Fix for USBH1 OTG IOMUX and GPIOs in board-mx6q_sabreauto.c
Francisco Munoz [Fri, 16 Dec 2011 23:16:03 +0000 (17:16 -0600)]
ENGR00170124: Fix for USBH1 OTG IOMUX and GPIOs in board-mx6q_sabreauto.c

USBH1 was not responding to plug events
USBH1 power up settings trough Port Exp B
OTG power up settings trough Port Exp C
Functionality was tested using a mx6qsabreauto cpu board + 53ARD main board

Signed-off-by: Francisco Munoz <b37752@freescale.com>
11 years agoENGR00171452 [MX6Qsabrelite]:wifi failed to work after system resume.
Ryan QIAN [Fri, 6 Jan 2012 05:58:12 +0000 (13:58 +0800)]
ENGR00171452 [MX6Qsabrelite]:wifi failed to work after system resume.

Set keep power on suspend flag for sd3 & sd4

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR0017124 Merge vivante 4.6.4 kernel driver
Loren Huang [Wed, 4 Jan 2012 10:47:33 +0000 (18:47 +0800)]
ENGR0017124 Merge vivante 4.6.4 kernel driver

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00171259 mx6 Fix warning while remove GPU module
Larry Li [Wed, 4 Jan 2012 09:07:50 +0000 (17:07 +0800)]
ENGR00171259 mx6 Fix warning while remove GPU module

Avoid necessary clk_disable operation

Signed-off-by: Larry Li <b20787@freescale.com>
11 years agoENGR00169747 MX6Q:ARD:Enable SD1 Card reader from ARD Main board
Prabhu Sundararaj [Mon, 2 Jan 2012 20:12:06 +0000 (15:12 -0500)]
ENGR00169747 MX6Q:ARD:Enable SD1 Card reader from ARD Main board

Fix to enable SD1 Card reader for MX6Q ARD. This enables SD1 reader
from main board. SD1 does not support SD3.0 to maintain compatiblity
of MX53 Mainboard.

Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@freescale.com>
11 years agoENGR00171115 mx6_ard: Enable the enet on mx6q ard
Hake Huang [Sat, 31 Dec 2011 09:37:35 +0000 (17:37 +0800)]
ENGR00171115 mx6_ard: Enable the enet on mx6q ard

Fix Mux config
Need hardware rework:
1. Add R450 10.0k
2. Remove R1105 1k
3. short Pin 1,2 of u516: will impact CAN1

Signed-off-by: Hake Huang <b20222@freescale.com>
11 years agoENGR00171113 flexcan: add self wakeup function
Dong Aisheng [Sat, 31 Dec 2011 09:08:03 +0000 (17:08 +0800)]
ENGR00171113 flexcan: add self wakeup function

Flexcan can use the self wakeup function to wakeup system in system
suspend state.

Signed-off-by: Dong Aisheng <b29396@freescale.com>