]> git.karo-electronics.de Git - karo-tx-linux.git/log
karo-tx-linux.git
10 years agoMerge branch for-3.14/dt into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:39 +0000 (13:08 -0700)]
Merge branch for-3.14/dt into for-next

10 years agoMerge branch for-3.14/soc into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:39 +0000 (13:08 -0700)]
Merge branch for-3.14/soc into for-next

10 years agoMerge branch for-3.14/powergate into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:39 +0000 (13:08 -0700)]
Merge branch for-3.14/powergate into for-next

10 years agoMerge branch for-3.14/dmas-resets-rework into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:34 +0000 (13:08 -0700)]
Merge branch for-3.14/dmas-resets-rework into for-next

10 years agoMerge branch for-3.14/trusted-foundations into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:33 +0000 (13:08 -0700)]
Merge branch for-3.14/trusted-foundations into for-next

10 years agoMerge branch for-3.14/deps-from-clk-tegra into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:31 +0000 (13:08 -0700)]
Merge branch for-3.14/deps-from-clk-tegra into for-next

10 years agoMerge branch for-3.14/deps-from-dma-of into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:30 +0000 (13:08 -0700)]
Merge branch for-3.14/deps-from-dma-of into for-next

10 years agoMerge branch for-3.14/deps-from-asoc-dma into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:30 +0000 (13:08 -0700)]
Merge branch for-3.14/deps-from-asoc-dma into for-next

10 years agoMerge branch for-3.14/deps-from-dma-defer_probe into for-next
Stephen Warren [Thu, 19 Dec 2013 20:08:29 +0000 (13:08 -0700)]
Merge branch for-3.14/deps-from-dma-defer_probe into for-next

10 years agoARM: tegra: Enable HDMI support on Dalmore
Mikko Perttunen [Thu, 19 Dec 2013 15:59:33 +0000 (16:59 +0100)]
ARM: tegra: Enable HDMI support on Dalmore

Add HDMI node to the Dalmore device tree and hook up the VDD and PLL
regulators as well as the I2C adapter used for DDC and the GPIO used
for hotplug detection.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Enable DSI support on Dalmore
Thierry Reding [Thu, 19 Dec 2013 15:59:32 +0000 (16:59 +0100)]
ARM: tegra: Enable DSI support on Dalmore

Dalmore has a 10.1" WUXGA panel connected to one of the DSI outputs of
the Tegra114.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add Tegra114 gr3d support
Thierry Reding [Thu, 19 Dec 2013 15:59:31 +0000 (16:59 +0100)]
ARM: tegra: Add Tegra114 gr3d support

Add the gr3d device tree node. The gr3d block on Tegra114 is backwards-
compatible with the one on Tegra20.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add Tegra114 gr2d support
Thierry Reding [Thu, 19 Dec 2013 15:59:30 +0000 (16:59 +0100)]
ARM: tegra: Add Tegra114 gr2d support

Add the device tree for the gr2d hardware found on Tegra114 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add Tegra114 DSI support
Thierry Reding [Thu, 19 Dec 2013 15:59:29 +0000 (16:59 +0100)]
ARM: tegra: Add Tegra114 DSI support

Add device tree nodes for the DSI controllers found on Tegra114 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree
Mikko Perttunen [Thu, 19 Dec 2013 15:59:28 +0000 (16:59 +0100)]
ARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree

Add host1x, DC (display controller) and HDMI devices to Tegra114
device tree.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add MIPI calibration DT entries for Tegra114
Thierry Reding [Thu, 19 Dec 2013 15:59:27 +0000 (16:59 +0100)]
ARM: tegra: Add MIPI calibration DT entries for Tegra114

Add a device node for the MIPI calibration block on Tegra114. There is
no need to disable it by default because it only enables the clock while
performing calibration and therefore shouldn't be consuming any power
when unused.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Enable LVDS on Cardhu
Thierry Reding [Thu, 19 Dec 2013 15:59:26 +0000 (16:59 +0100)]
ARM: tegra: Enable LVDS on Cardhu

Add backlight and panel nodes for the Cardhu 10.1" WXGA TFT LCD panel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Enable LVDS on Harmony
Thierry Reding [Thu, 19 Dec 2013 15:59:25 +0000 (16:59 +0100)]
ARM: tegra: Enable LVDS on Harmony

Add backlight and panel nodes for the Harmony TFT LCD panel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: set up /aliases for RTCs on Venice2
Stephen Warren [Thu, 19 Dec 2013 18:32:15 +0000 (11:32 -0700)]
ARM: tegra: set up /aliases for RTCs on Venice2

This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add ams AS3722 device to Venice2 DT
Laxman Dewangan [Wed, 18 Dec 2013 12:52:59 +0000 (18:22 +0530)]
ARM: tegra: add ams AS3722 device to Venice2 DT

Add ams AS3722 entry for gpio/pincontrol and regulators
to venice2 DT.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: fix missing pincontrol configuration for Venice2
Laxman Dewangan [Wed, 18 Dec 2013 12:52:58 +0000 (18:22 +0530)]
ARM: tegra: fix missing pincontrol configuration for Venice2

Compare the initial population of default pinmux configuration of Venice2
with the chrome branch and add/fix the missing configurations.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: set up /aliases entries for RTCs
Stephen Warren [Mon, 9 Dec 2013 21:43:59 +0000 (14:43 -0700)]
ARM: tegra: set up /aliases entries for RTCs

This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

tegra124-venice2.dts isn't touched yet since we haven't added any off-
SoC RTC device to its device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add SPI controller nodes for Tegra124
Thierry Reding [Fri, 13 Dec 2013 16:24:05 +0000 (17:24 +0100)]
ARM: tegra: Add SPI controller nodes for Tegra124

The SPI controllers on Tegra124 are compatible with those found on the
Tegra114 SoC.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Fix misconfiguration of pin PH2 on Venice2
Thierry Reding [Fri, 13 Dec 2013 16:25:04 +0000 (17:25 +0100)]
ARM: tegra: Fix misconfiguration of pin PH2 on Venice2

This pin needs to be configured in pull-down, non-tristate mode in order
for the backlight to work correctly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: fix pinctrl misconfiguration on Venice2
Stephen Warren [Thu, 12 Dec 2013 21:40:30 +0000 (14:40 -0700)]
ARM: tegra: fix pinctrl misconfiguration on Venice2

Other boards use PULL_NONE for their debug UART pins, and without this
change, the board doesn't accept any serial input.

Don't set the I2S port pins to tristate mode, or no audio signal will
be sent out.

Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add default pinctrl nodes for Venice2
Laxman Dewangan [Mon, 9 Dec 2013 10:33:51 +0000 (16:03 +0530)]
ARM: tegra: add default pinctrl nodes for Venice2

Add the default pinmux configuration for the Tegra124 based
Venice2 platform.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: correct Colibri T20 regulator settings
Stefan Agner [Fri, 6 Dec 2013 12:51:47 +0000 (13:51 +0100)]
ARM: tegra: correct Colibri T20 regulator settings

Set the parent of the regulators LDO2 to LDO9 according to the
schematic. Set the base voltage to 3.3V, there is only 3.3V on the
module itself.

Set the Core and CPU voltage to the specified voltages of 1.2V and
1.0V respectivly.

LDO6 should deliver 2.85V. The attached peripherals were not in
use so far.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
Laxman Dewangan [Thu, 5 Dec 2013 10:44:09 +0000 (16:14 +0530)]
ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines

Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra30 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines
Laxman Dewangan [Thu, 5 Dec 2013 10:44:08 +0000 (16:14 +0530)]
ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines

Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra20 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines
Laxman Dewangan [Thu, 5 Dec 2013 10:44:07 +0000 (16:14 +0530)]
ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines

Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra114 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add header file for pinctrl constants
Laxman Dewangan [Thu, 5 Dec 2013 10:44:06 +0000 (16:14 +0530)]
ARM: tegra: Add header file for pinctrl constants

This new header file defines pincontrol constants for Tegra to
use from Tegra's DTS file for pincontrol properties option.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: convert device tree files to use key defines
Laxman Dewangan [Mon, 2 Dec 2013 13:09:57 +0000 (18:39 +0530)]
ARM: tegra: convert device tree files to use key defines

Use key code macros for all key code refernced for keys.

For tegra20-seaboard.dts and tegra20-harmony.dts:
  The key comment for key (16th row and 1st column) is KEY_KPSLASH but
  code is 0x004e which is the key code for KEY_KPPLUS. As there other
  key exist with KY_KPPLUS, I am assuming key code is wrong and comment
  is fine. With this assumption, I am keeping the key code as KEY_KPSLASH.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Enable PWM on Venice2
Thierry Reding [Mon, 18 Nov 2013 16:00:35 +0000 (17:00 +0100)]
ARM: tegra: Enable PWM on Venice2

Subsequent patches will need to reference a PWM channel for backlight
support, so enable the PWM device and assign a label to it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add Tegra124 PWM support
Thierry Reding [Mon, 18 Nov 2013 16:00:34 +0000 (17:00 +0100)]
ARM: tegra: Add Tegra124 PWM support

The PWM controller on Tegra124 is the same as the one on earlier SoC
generations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
[swarren, added reset properties]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add sound card to Venice2 DT
Stephen Warren [Wed, 4 Dec 2013 00:26:12 +0000 (17:26 -0700)]
ARM: tegra: add sound card to Venice2 DT

Venice2 uses the MAX98090 audio CODEC, and supports built-in speakers,
and a combo headphones/microphone jack. Add a top-level sound card node
to represent this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add audio-related device to Tegra124 DT
Stephen Warren [Wed, 4 Dec 2013 22:05:51 +0000 (15:05 -0700)]
ARM: tegra: add audio-related device to Tegra124 DT

Tegra124 contains a similar set of audio devices to previous Tegra chips.
Specifically, there is an AHUB device which contains DMA FIFOs and audio
routing, and which hosts various audio-related components such as I2S
controllers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: enable I2C controllers on Venice2
Stephen Warren [Tue, 3 Dec 2013 23:44:35 +0000 (16:44 -0700)]
ARM: tegra: enable I2C controllers on Venice2

Enable all the I2C controllers that are wired up on Venice2. I don't
know the correct I2C bus clock rates, so set them all to a conservative
100KHz for now.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add I2C controllers to Tegra124 DT
Stephen Warren [Tue, 3 Dec 2013 23:29:04 +0000 (16:29 -0700)]
ARM: tegra: add I2C controllers to Tegra124 DT

Tegra124 has 6 I2C controllers. The first 5 have identical configuration
to Tegra114, but the sixth obviously has different interrupt/... IDs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add MMC controllers to Tegra124 DT
Stephen Warren [Thu, 31 Oct 2013 23:23:05 +0000 (17:23 -0600)]
ARM: tegra: add MMC controllers to Tegra124 DT

Tegra124 has 4 MMC controllers just like previous versions of the SoC.
Note that there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW.

Also enable the relevant controllers in the Venice2 board DT.

power-gpios property suggested by Thierry Reding.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
10 years agoARM: tegra: add Tegra124 pinmux node to DT
Stephen Warren [Fri, 1 Nov 2013 20:03:59 +0000 (14:03 -0600)]
ARM: tegra: add Tegra124 pinmux node to DT

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked by: Laxman Dewangan <ldewangan@nvidia.com>

10 years agoARM: tegra: add APB DMA controller to Tegra124 DT
Stephen Warren [Fri, 15 Nov 2013 19:22:53 +0000 (12:22 -0700)]
ARM: tegra: add APB DMA controller to Tegra124 DT

Instantiate the APB DMA controller in the Tegra124 DT, and add all
DMA-related properties to other DT nodes that rely on (reference) the
DMA controller's node.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoARM: tegra: add reset properties to Tegra124 DTs
Stephen Warren [Thu, 7 Nov 2013 19:20:57 +0000 (12:20 -0700)]
ARM: tegra: add reset properties to Tegra124 DTs

The DT bindings now require module resets to be specified. The earlier
patches which added these nodes were originally written before that
requirement.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoARM: tegra: add clock properties for devices of Tegra124
Joseph Lo [Tue, 8 Oct 2013 07:47:40 +0000 (15:47 +0800)]
ARM: tegra: add clock properties for devices of Tegra124

This patch adds clock properties for devices in the DT for basic support
of Tegra124 SoC.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren, added missing unit address to "clock" node]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: fix node sort order
Stephen Warren [Tue, 26 Nov 2013 21:43:45 +0000 (14:43 -0700)]
ARM: tegra: fix node sort order

For Tegra DT files, I've been attempting to keep the nodes sorted in
the order:
1) Nodes with reg, in order of reg.
2) Nodes without reg, alphabetically.

This patch fixes a few escapees that I missed:-(

The diffs look larger than they really are, because sometimes when one
node was moved up or down, diff chose to represent this as many other
nodes being moved the other way!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add missing unit addresses to DT
Stephen Warren [Tue, 26 Nov 2013 00:53:16 +0000 (17:53 -0700)]
ARM: tegra: add missing unit addresses to DT

DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add port FF to GPIO IDs
Ashwini Ghuge [Mon, 18 Nov 2013 13:10:41 +0000 (18:40 +0530)]
ARM: tegra: add port FF to GPIO IDs

NVIDIA Tegra124 supports has the new GPIO port as GPIO_FF.
Add the macro for this port name.

Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add IO rail support
Thierry Reding [Mon, 16 Dec 2013 20:42:28 +0000 (21:42 +0100)]
ARM: tegra: Add IO rail support

Add tegra_io_rail_power_off() and tegra_io_rail_power_on() functions to
put IO rails into or out of deep powerdown mode, respectively.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Special-case the 3D clamps on Tegra124
Thierry Reding [Fri, 13 Dec 2013 16:31:04 +0000 (17:31 +0100)]
ARM: tegra: Special-case the 3D clamps on Tegra124

A separate register is used to remove the clamps for the GPU on
Tegra124. In order to be able to use the same API, special-case
this particular partition.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Add Tegra124 powergate support
Thierry Reding [Fri, 13 Dec 2013 16:31:03 +0000 (17:31 +0100)]
ARM: tegra: Add Tegra124 powergate support

Three new gates have been added for Tegra124: SOR, VIC and IRAM. In
addition, PCIe and SATA gates are again supported, like on Tegra20 and
Tegra30.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Export tegra_powergate_remove_clamping()
Thierry Reding [Fri, 6 Dec 2013 15:49:56 +0000 (16:49 +0100)]
ARM: tegra: Export tegra_powergate_remove_clamping()

Drivers can use the tegra_powergate_remove_clamping() API during
initialization. In order to allow such drivers to be built as modules,
export the symbol.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Export tegra_powergate_power_off()
Thierry Reding [Fri, 6 Dec 2013 15:49:55 +0000 (16:49 +0100)]
ARM: tegra: Export tegra_powergate_power_off()

This function can be used by drivers, which in turn may be built as
modules. Export the symbol so it is available to modules.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Rename cpu0 powergate to crail
Thierry Reding [Fri, 6 Dec 2013 15:27:13 +0000 (16:27 +0100)]
ARM: tegra: Rename cpu0 powergate to crail

This matches the name of the powergate as listed in the TRM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: Fix some whitespace oddities
Thierry Reding [Fri, 6 Dec 2013 15:27:12 +0000 (16:27 +0100)]
ARM: tegra: Fix some whitespace oddities

Some of the powergate code uses unusual spacing around == and has a tab
instead of a space before an opening parenthesis.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agospi: tegra: checking for ERR_PTR instead of NULL
Dan Carpenter [Mon, 16 Dec 2013 14:02:10 +0000 (17:02 +0300)]
spi: tegra: checking for ERR_PTR instead of NULL

dma_request_slave_channel() returns NULL on error and not ERR_PTRs.
I've fixed this by using dma_request_slave_channel_reason() which does
return ERR_PTRs.

Fixes: a915d150f68d ('spi: tegra: convert to standard DMA DT bindings')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: support Trusted Foundations by default
Alexandre Courbot [Sun, 24 Nov 2013 06:30:52 +0000 (15:30 +0900)]
ARM: tegra: support Trusted Foundations by default

Support for Trusted Foundations is light and allows the kernel to run on
a wider range of devices, so enable it by default.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: set CPU reset handler using firmware
Alexandre Courbot [Sun, 24 Nov 2013 06:30:51 +0000 (15:30 +0900)]
ARM: tegra: set CPU reset handler using firmware

Use a firmware operation to set the CPU reset handler and only resort to
doing it ourselves if there is none defined.

This supports the booting of secondary CPUs on devices using a TrustZone
secure monitor.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: split setting of CPU reset handler
Alexandre Courbot [Sun, 24 Nov 2013 06:30:50 +0000 (15:30 +0900)]
ARM: tegra: split setting of CPU reset handler

Not all Tegra devices can set the CPU reset handler in the same way.
In particular, devices using a TrustZone secure monitor cannot set it
up directly and need to ask the firmware to do it.

This patch separates the act of setting the reset handler from its
preparation, so the former can be implemented in a different way.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: add support for Trusted Foundations
Alexandre Courbot [Sun, 24 Nov 2013 06:30:49 +0000 (15:30 +0900)]
ARM: tegra: add support for Trusted Foundations

Register the firmware operations for Trusted Foundations if the device
tree indicates it is active on the device.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoof: add Trusted Foundations bindings documentation
Alexandre Courbot [Sun, 24 Nov 2013 06:30:48 +0000 (15:30 +0900)]
of: add Trusted Foundations bindings documentation

Add the Device Tree bindings documentation for the Trusted Foundation
secure monitor.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoof: add vendor prefix for Trusted Logic Mobility
Alexandre Courbot [Sun, 24 Nov 2013 06:30:47 +0000 (15:30 +0900)]
of: add vendor prefix for Trusted Logic Mobility

Add the "tlm" prefix for Trusted Logic Mobility.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: add basic support for Trusted Foundations
Alexandre Courbot [Sun, 24 Nov 2013 06:30:46 +0000 (15:30 +0900)]
ARM: add basic support for Trusted Foundations

Trusted Foundations is a TrustZone-based secure monitor for ARM that
can be invoked using the same SMC-based API on supported platforms.
This patch adds initial basic support for Trusted Foundations using
the ARM firmware API. Current features are limited to the ability to
boot secondary processors.

Note: The API followed by Trusted Foundations does *not* follow the SMC
calling conventions. It has nothing to do with PSCI neither and is only
relevant to devices that use Trusted Foundations (like most Tegra-based
retail devices).

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoASoC: tegra: update module reset list for Tegra124
Stephen Warren [Wed, 4 Dec 2013 18:13:01 +0000 (11:13 -0700)]
ASoC: tegra: update module reset list for Tegra124

Tegra124 adds a number of extra modules into the configlink bus, which
must be taken out of reset before the bus is used. Update the AHUB
driver to know about these extra modules (the AHUB HW module hosts the
configlink bus).

Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Based-on-work-by: Songhee Baek <sbaek@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
---
This patch depends on "ASoC: tegra: use reset framework" to compile,
which is ack'd and slated to go through a (large) topic branch in the
Tegra tree. So, we can either:

a) Merge that Tegra topic branch into the ASoC tree, then apply this.
   Note that I haven't created the topic branch yet, since I'm still
   waiting for DMA dependencies to be applied.

b) Apply this change to the Tegra tree too. This change isn't directly
   related to the changes in the Tegra tree; it just makes use of the new
   reset controller feature that's introduced there.

10 years agoARM: tegra: select PINCTRL_TEGRA124 for Tegra124 SoC
Laxman Dewangan [Thu, 5 Dec 2013 10:57:49 +0000 (16:27 +0530)]
ARM: tegra: select PINCTRL_TEGRA124 for Tegra124 SoC

The pincontrol driver for Tegra124 is build through config
PINCTRL_TEGRA124. Select this config option whenever Tegra124
SoC is enabled.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoclk: tegra: remove bogus PCIE_XCLK
Stephen Warren [Thu, 7 Nov 2013 17:58:21 +0000 (10:58 -0700)]
clk: tegra: remove bogus PCIE_XCLK

The "pcie_xclk" clock is not actually a clock at all, but rather a reset
domain. Now that the custom Tegra module reset API has been removed, we
can remove the definition of any "clocks" that existed solely to support
it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
10 years agoclk: tegra: remove legacy reset APIs
Stephen Warren [Wed, 6 Nov 2013 23:58:16 +0000 (16:58 -0700)]
clk: tegra: remove legacy reset APIs

Now that no code uses the custom Tegra module reset API, we can remove
its implementation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
10 years agoARM: tegra: remove legacy DMA entries from DT
Stephen Warren [Mon, 11 Nov 2013 20:25:54 +0000 (13:25 -0700)]
ARM: tegra: remove legacy DMA entries from DT

Now that all Tegra drivers have been converted to use DMA APIs which
retrieve DMA channel information from standard DMA DT properties, we can
remove all the legacy DT DMA-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoARM: tegra: remove legacy clock entries from DT
Stephen Warren [Thu, 7 Nov 2013 17:59:42 +0000 (10:59 -0700)]
ARM: tegra: remove legacy clock entries from DT

Now that all Tegra drivers have been converted to use the common reset
framework, we can remove all the legacy DT clocks/clock-names entries for
"clocks" that were only used with the old custom Tegra module reset API.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoUSB: EHCI: tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:53:58 +0000 (16:53 -0700)]
USB: EHCI: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoInput: tegra-kbc - use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:48:16 +0000 (16:48 -0700)]
Input: tegra-kbc - use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoserial: tegra: convert to standard DMA DT bindings
Stephen Warren [Mon, 11 Nov 2013 21:16:38 +0000 (14:16 -0700)]
serial: tegra: convert to standard DMA DT bindings

By using dma_request_slave_channel_or_err(), the DMA slave ID can be
looked up from standard DT properties, and squirrelled away during
channel allocation. Hence, there's no need to use a custom DT property
to store the slave ID.

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoserial: tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:50:44 +0000 (16:50 -0700)]
serial: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agospi: tegra: convert to standard DMA DT bindings
Stephen Warren [Mon, 11 Nov 2013 20:13:47 +0000 (13:13 -0700)]
spi: tegra: convert to standard DMA DT bindings

By using dma_request_slave_channel_or_err(), the DMA slave ID can be
looked up from standard DT properties, and squirrelled away during
channel allocation. Hence, there's no need to use a custom DT property
to store the slave ID.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
10 years agospi: tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:31:24 +0000 (16:31 -0700)]
spi: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agostaging: nvec: use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:46:24 +0000 (16:46 -0700)]
staging: nvec: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoi2c: tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:42:05 +0000 (16:42 -0700)]
i2c: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoASoC: tegra: convert to standard DMA DT bindings
Stephen Warren [Mon, 11 Nov 2013 22:21:01 +0000 (15:21 -0700)]
ASoC: tegra: convert to standard DMA DT bindings

By passing no flags when calling snd_dmaengine_pcm_register() from
tegra_pcm.c, we end up using dma_request_slave_channel() rather than
dmaengine_pcm_compat_request_channel(), and hence rely on the standard
DMA DT bindings and stashing the DMA slave ID away during channel
allocation. This means there's no need to use a custom DT property to
store the slave ID. So, remove all the code that parsed it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
10 years agoASoC: tegra: allocate AHUB FIFO during probe() not startup()
Stephen Warren [Fri, 15 Nov 2013 18:48:47 +0000 (11:48 -0700)]
ASoC: tegra: allocate AHUB FIFO during probe() not startup()

The Tegra30 I2S driver currently allocates DMA FIFOs from the AHUB only
when an audio stream starts playback. This is theoretically nice for
resource sharing, but makes no practical difference for any configuration
the drivers currently support. However, this deferral prevents conversion
to the standard DMA DT bindings, since conversion requires knowledge of
the specific DMA channel to be allocated, which in turn depends on which
specific FIFO was allocated.

For this reason, move the FIFO allocation into probe() to allow later
conversion to the standard DMA DT bindings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
10 years agoASoC: tegra: call pm_runtime APIs around register accesses
Stephen Warren [Fri, 15 Nov 2013 18:29:45 +0000 (11:29 -0700)]
ASoC: tegra: call pm_runtime APIs around register accesses

Call pm_runtime_get_sync() before all register accesses; the HW requires
clocks to be running when accessing registers.

This hasn't been needed to date, since all register IO was performed
while playback was active, and hence the ASoC core had already called
pm_runtime_get(). However, an imminent future commit will allocate and
set up the FIFOs and routing during probe(), when that "protection"
won't be in place.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
10 years agoASoC: tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 22:18:22 +0000 (15:18 -0700)]
ASoC: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

This change also renames "clock"/"clk" to "modules"/"mod" in symbols
related to entries in configlink_clocks[], since:
- We don't care about clock handles any more, but rather reset handles,
  so the old name isn't applicable.
- It really is a list of modules on the bus, about which we currently
  only care about reset handles.
If we start caring about any other aspect of the modules in the future,
we won't have to rename all these symbols again.

Note: The addition of "depends COMMON_CLOCK" is something that was missing
before, not a new requirement.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agodma: tegra: register as an OF DMA controller
Stephen Warren [Mon, 11 Nov 2013 20:09:35 +0000 (13:09 -0700)]
dma: tegra: register as an OF DMA controller

Call of_dma_controller_register() so that DMA clients can look up the
Tegra DMA controller using standard APIs. This requires the of_xlate()
function to save off the DMA slave ID, and for tegra_dma_slave_config()
not to over-write this information; once DMA client drivers are converted
to dma_request_slave_channel() and DT-based lookups, they won't set this
field of struct dma_slave_config anymore.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agodma: tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:35:34 +0000 (16:35 -0700)]
dma: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
10 years agoARM: tegra: pass reset to tegra_powergate_sequence_power_up()
Stephen Warren [Wed, 6 Nov 2013 22:45:46 +0000 (15:45 -0700)]
ARM: tegra: pass reset to tegra_powergate_sequence_power_up()

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 23:20:54 +0000 (16:20 -0700)]
drm/tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
10 years agopci: tegra: use reset framework
Stephen Warren [Wed, 6 Nov 2013 22:56:58 +0000 (15:56 -0700)]
pci: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

The old Tegra-specific API used a struct clock to represent the module
to reset. Some of the clocks retrieved during probe() were only used for
reset purposes, and indeed aren't even true clocks. So, there's no need
to get() them any more.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
10 years agoclk: tegra: implement a reset driver
Stephen Warren [Wed, 6 Nov 2013 00:33:17 +0000 (17:33 -0700)]
clk: tegra: implement a reset driver

The Tegra CAR module implements both a clock and reset controller. So
far, the driver exposes the clock feature via the common clock API and
the reset feature using a custom API. This patch adds an implementation
of the common reset framework API (include/linux/reset*.h). The legacy
reset implementation will be removed once all drivers have been
converted.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
10 years agoARM: tegra: select the reset framework
Stephen Warren [Wed, 6 Nov 2013 22:23:29 +0000 (15:23 -0700)]
ARM: tegra: select the reset framework

The Tegra clock driver is built unconditionally when Tegra support is
enabled. In order to avoid having to ifdef the forthcoming reset driver
implementation, have ARCH_TEGRA select RESET_CONTROLLER.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoARM: tegra: update DT files to add DMA properties
Stephen Warren [Mon, 11 Nov 2013 20:05:59 +0000 (13:05 -0700)]
ARM: tegra: update DT files to add DMA properties

This patch switches the Tegra DT files to use the standard DMA DT bindings
rather than custom properties. Note that the legacy properties are not yet
removed; the drivers must be updated to use the new properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
10 years agoARM: tegra: update DT files to add reset properties
Stephen Warren [Wed, 6 Nov 2013 21:01:16 +0000 (14:01 -0700)]
ARM: tegra: update DT files to add reset properties

An earlier patch updated the Tegra DT bindings to require resets and
reset-names properties to be filled in. This patch updates the DT files
to include those properties.

Note that any legacy clocks and clock-names entries that are replaced by
reset properties are not yet removed; the drivers must be updated to use
the new resets and reset-names properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: document use of standard DMA DT bindings
Stephen Warren [Mon, 11 Nov 2013 20:04:19 +0000 (13:04 -0700)]
ARM: tegra: document use of standard DMA DT bindings

Update all the Tegra DT bindings to require the standard dmas/dma-names
properties rather than non-standard nvidia,dma-request-selector property.

This is a DT-ABI-incompatible change. It is the second of two changes
required for me to consider the Tegra DT bindings as stable, the other
being the previous conversion to the common reset bindings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoARM: tegra: document reset properties in DT bindings
Stephen Warren [Thu, 7 Nov 2013 17:11:27 +0000 (10:11 -0700)]
ARM: tegra: document reset properties in DT bindings

Update all the Tegra DT bindings to require resets/reset-names properties
where the HW module has reset inputs. Remove any entries from clocks or
clock-names that were only required to identify reset inputs, rather than
referring to real clocks.

This is a DT-ABI-incompatible change. It is the first of two changes
required for me to consider the Tegra DT bindings as stable, the other
being conversion to the common DMA DT bindings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
10 years agoARM: tegra: add missing clock documentation to DT bindings
Stephen Warren [Wed, 6 Nov 2013 21:00:25 +0000 (14:00 -0700)]
ARM: tegra: add missing clock documentation to DT bindings

Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.

All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
10 years agoMerge tag 'clk-tegra-for-3.14' into for-3.14/dmas-resets-rework
Stephen Warren [Wed, 11 Dec 2013 23:39:59 +0000 (16:39 -0700)]
Merge tag 'clk-tegra-for-3.14' into for-3.14/dmas-resets-rework

Tegra clk branch for 3.14

10 years agoMerge tag 'asoc-dma-v3.14' into for-3.14/dmas-resets-rework
Stephen Warren [Wed, 11 Dec 2013 23:39:48 +0000 (16:39 -0700)]
Merge tag 'asoc-dma-v3.14' into for-3.14/dmas-resets-rework

ASoC: dma: Generic ASoC dmaengine driver enhancements

This is the work so far on dmaengine for v3.14, it is being cross merged
into the Tegra tree to support a large DMA overhaul there.  The main
additions are a change in the DMA request API which allows better
interaction at system startup using deferred probes and methods for
overriding the default device and channel names used to request DMA.

10 years agoMerge branch 'for-3.14/deps-from-dma-of' into for-3.14/dmas-resets-rework
Stephen Warren [Wed, 11 Dec 2013 23:39:35 +0000 (16:39 -0700)]
Merge branch 'for-3.14/deps-from-dma-of' into for-3.14/dmas-resets-rework

This merges git://git.infradead.org/users/vkoul/slave-dma.git topic/of

10 years agoMerge branch 'for-3.14/deps-from-dma-defer_probe' into for-3.14/dmas-resets-rework
Stephen Warren [Wed, 11 Dec 2013 23:38:41 +0000 (16:38 -0700)]
Merge branch 'for-3.14/deps-from-dma-defer_probe' into for-3.14/dmas-resets-rework

This merges git://git.infradead.org/users/vkoul/slave-dma.git topic/defer_probe

10 years agoASoC: dmaengine: fix deferred probe detection
Stephen Warren [Wed, 11 Dec 2013 18:20:50 +0000 (11:20 -0700)]
ASoC: dmaengine: fix deferred probe detection

Check the return value of dma_request_slave_channel_reason() to see if
deferred probe happens, not the variable the return value will be
assigned to later.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Fixes: 5eda87b890f8 ("ASoC: dmaengine: support deferred probe for DMA channels")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
10 years agoASoC: dmaengine: support deferred probe for DMA channels
Stephen Warren [Tue, 10 Dec 2013 18:11:02 +0000 (11:11 -0700)]
ASoC: dmaengine: support deferred probe for DMA channels

Enhance dmaengine_pcm_request_chan_of() to support deferred probe for
DMA channels, by using the new dma_request_slave_channel_or_err() API.
This prevents snd_dmaengine_pcm_register() from succeeding without
acquiring DMA channels due to the relevant DMA controller not yet being
registered.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
10 years agoMerge branch 'topic/defer_probe' of git://git.infradead.org/users/vkoul/slave-dma...
Mark Brown [Wed, 11 Dec 2013 11:12:20 +0000 (11:12 +0000)]
Merge branch 'topic/defer_probe' of git://git.infradead.org/users/vkoul/slave-dma into asoc-dma

The following branch/patch is a dependency for my "ASoC: dmaengine:
support deferred probe for DMA channels". If you could pull the branch
below into your topic/dma, then merge my ASoC patch, that would be
great. I would then like to merge your topic/dma into the Tegra tree as
a baseline for the Tegra conversion to the standard DMA DT bindings.

Vinod has confirmed this his topic/defer_probe branch is stable, and
won't be rebased:

https://lkml.org/lkml/2013/12/10/463

10 years agodma: add dma_get_any_slave_channel(), for use in of_xlate()
Stephen Warren [Tue, 26 Nov 2013 19:40:51 +0000 (12:40 -0700)]
dma: add dma_get_any_slave_channel(), for use in of_xlate()

mmp_pdma.c implements a custom of_xlate() function that is 95% identical
to what Tegra will need. Create a function to implement the common part,
so everyone doesn't just cut/paste the implementation.

Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: dmaengine@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
10 years agodma: add channel request API that supports deferred probe
Stephen Warren [Tue, 26 Nov 2013 17:04:22 +0000 (10:04 -0700)]
dma: add channel request API that supports deferred probe

dma_request_slave_channel() simply returns NULL whenever DMA channel
lookup fails. Lookup could fail for two distinct reasons:

a) No DMA specification exists for the channel name.
   This includes situations where no DMA specifications exist at all, or
   other general lookup problems.

b) A DMA specification does exist, yet the driver for that channel is not
   yet registered.

Case (b) should trigger deferred probe in client drivers. However, since
they have no way to differentiate the two situations, it cannot.

Implement new function dma_request_slave_channel_reason(), which performs
identically to dma_request_slave_channel(), except that it returns an
error-pointer rather than NULL, which allows callers to detect when
deferred probe should occur.

Eventually, all drivers should be converted to this new API, the old API
removed, and the new API renamed to the more desirable name. This patch
doesn't convert the existing API and all drivers in one go, since some
drivers call dma_request_slave_channel() then dma_request_channel() if
that fails. That would require either modifying dma_request_channel() in
the same way, or adding extra error-handling code to all affected
drivers, and there are close to 100 drivers using the other API, rather
than just the 15-20 or so that use dma_request_slave_channel(), which
might be tenable in a single patch.

acpi_dma_request_slave_chan_by_name() doesn't currently implement
deferred probe. It should, but this will be addressed later.

Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>