]> git.karo-electronics.de Git - linux-beck.git/log
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8 years agoMerge tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni...
Olof Johansson [Thu, 25 Feb 2016 01:19:04 +0000 (17:19 -0800)]
Merge tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt

DT changes for 4.6:
 - Addition of the ADC for sama5d2 and sama5d2_xplained

* tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  ARM: dts: at91: sama5d2 Xplained: enable the adc device
  ARM: dts: at91: sama5d2: add adc device

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agodts/ls2080a: Update PCIe compatible
Minghuan Lian [Wed, 17 Feb 2016 02:04:23 +0000 (10:04 +0800)]
dts/ls2080a: Update PCIe compatible

The patch adds LS2085a to PCIe compatible to fix the compatibility
issue when using firmware with LS2085a compatible property.

Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Olof Johansson [Thu, 25 Feb 2016 00:03:21 +0000 (16:03 -0800)]
Merge tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt

Versatile DT cleanups from Linus Walleij:

"this is a first pull request for my cleanups for the Versatile, as
the finished stuff should not be sitting in my tree but in ARM SoC.
This completes the ARM RealView PB1176 and PB11MPCore device trees,
and moves the Versatile to use power/reset.

The idea is to keep working on this cleanup branch and send additional
patches on top of this one as the prerequisites are merged into the MTD
and FBDEV subsystems. So please create a special versatile cleanup branch
(or suggest another approach).

As it happens, board files and device trees need to change at the same
time to make logical sense, especially for Versatile where auxdata is
replaced with DT entries, such as when reset is moved in the last patch
in this set. The MTD and CLCD changes will share this characteristic."

Versatile family cleanups step 1:
- Finalize RealView the PB1176 and PB11MPCore device trees
- Move Versatile to use the power/reset driver instead of a
  custom restart hook

* tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: versatile: move restart to the device tree
  ARM: realview: add the DS1338 RTC to PB1176 DT
  ARM: pb1176: add ethernet to devicetree
  ARM: pb1176: add ISP1761 USB OTG host controller
  ARM: pb1176: add AACI to the device tree
  ARM: pb1176: add ICST307 clocks to the device tree
  ARM: realview: fix up PB11MP flash compat strings
  ARM: realview: add flash devices to the PB1176 DTS

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge tag 'samsung-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Olof Johansson [Wed, 24 Feb 2016 22:30:50 +0000 (14:30 -0800)]
Merge tag 'samsung-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Samsung DeviceTree updates and improvements for v4.6:
1. Add SROM controller device nodes.
2. Add Ethernet chip as child of SROM controller on SMDK5410.
3. Allow simultaneous usage exynos-rng and s5p-sss drivers on Exynos5.
4. Cleanup CPU configuration on Exynos542x/5800.
5. Add necessary nodes for cpufreq-dt driver on Exynos542x/5800 (OPPs,
   regulator supplies) which allows frequency and voltage scalling
   of this SoC.
6. Minor cleanups.

* tag 'samsung-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: Replace legacy *,wakeup property with wakeup-source for exynos boards
  ARM: dts: Add GSCL block parent clock management to pm domain on exynos542x
  ARM: dts: Extend existing CPU OPP for exynos5800
  ARM: dts: Add CPU OPP properties for exynos542x/5800
  ARM: dts: Add cluster regulator supply properties for exynos542x/5800
  ARM: dts: Make CPU configuration more readable on exynos542x/5800
  ARM: dts: Replace legacy *,wakeup property with wakeup-source on s5pv210
  ARM: dts: Allow simultaneous usage exynos-rng and s5p-sss drivers on exynos5
  ARM: dts: Add Ethernet chip to exynos5410-smdk5410
  ARM: dts: Add SROM to exynos5410
  ARM: dts: Add SROM device node for exynos5
  ARM: dts: Add SROM device node for exynos4
  ARM: dts: Add pinctrl support to exynos5410

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git...
Olof Johansson [Wed, 24 Feb 2016 22:02:53 +0000 (14:02 -0800)]
Merge tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.6

* Use SCIF and USBHS fallback compatibility strings
* Add Baud Rate Generator (BRG) support for (H)SCIF
* Enable SCIF_CLK frequency and pins
* Use GIC_* defines
* Enable audio on r8a7793/gose
* Enable HDMI vidio out on r8a7793
* Enable i2c on r8a7793/gose
* Enable QSPI on alt
* Enable GPIO keys and leds on gise
* Enable audio on porter
* Enable DU on porter

* tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (68 commits)
  ARM: dts: silk: Enable SCIF_CLK frequency and pins
  ARM: dts: porter: Enable SCIF_CLK frequency and pins
  ARM: dts: marzen: Enable SCIF_CLK frequency and pins
  ARM: dts: lager: Enable SCIF_CLK frequency and pins
  ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
  ARM: dts: gose: Enable SCIF_CLK frequency and pins
  ARM: dts: bockw: Enable SCIF_CLK frequency and pins
  ARM: dts: alt: Enable SCIF_CLK frequency and pins
  ARM: dts: r8a7794: Add BRG support for (H)SCIF
  ARM: dts: r8a7793: Add BRG support for SCIF
  ARM: dts: r8a7791: Add BRG support for (H)SCIF
  ARM: dts: r8a7790: Add BRG support for (H)SCIF
  ARM: dts: r8a7779: Add BRG support for SCIF
  ARM: dts: r8a7778: Add BRG support for SCIF
  ARM: dts: r8a7794: Rename the serial port clock to fck
  ARM: dts: r8a7793: Rename the serial port clock to fck
  ARM: dts: r8a7791: Rename the serial port clock to fck
  ARM: dts: r8a7790: Rename the serial port clock to fck
  ARM: dts: r8a7779: Rename the serial port clock to fck
  ARM: dts: r8a7778: Rename the serial port clock to fck
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoARM: dts: artpec: add Artpec-6 development board dts
Lars Persson [Thu, 11 Feb 2016 16:06:18 +0000 (17:06 +0100)]
ARM: dts: artpec: add Artpec-6 development board dts

Signed-off-by: Lars Persson <larper@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoARM: dts: artpeg: add Artpec-6 SoC dtsi file
Lars Persson [Thu, 11 Feb 2016 16:06:17 +0000 (17:06 +0100)]
ARM: dts: artpeg: add Artpec-6 SoC dtsi file

Initial device tree for the Artpec-6 SoC.

Signed-off-by: Lars Persson <larper@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoARM: add device-tree SoC bindings for Axis Artpec-6
Lars Persson [Thu, 11 Feb 2016 16:06:16 +0000 (17:06 +0100)]
ARM: add device-tree SoC bindings for Axis Artpec-6

This adds device tree bindings for the Artpec-6 SoC.

Signed-off-by: Lars Persson <larper@axis.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Olof Johansson [Wed, 24 Feb 2016 21:52:42 +0000 (13:52 -0800)]
Merge tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
Most interesting is maybe the enablement of the pl330 option
for handling the broken flushp operation that is present on the
current Rockchip SoCs. Together with the driver-side enablement
this should give us working dma finally.

* tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits)
  ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
  ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
  dt-bindings: rockchip-dw-mshc: add RK3036 dw-mshc description
  ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board
  ARM: dts: rockchip: support the spi for rk3036
  ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board
  ARM: dts: rockchip: add the leds control for rk3036-kylin board
  ARM: dts: rockchip: add tsadc node
  clk: rockchip: Add new id for rk3066 tsadc clock
  ARM: dts: rockchip: add clock-cells for usb phy nodes
  ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally
  ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
  ARM: dts: rockchip: Bump sd card pin drive strength up on firefly boards
  dt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description
  ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
  ARM: dts: rockchip: Add the iodomains for the Rock2 SOM
  ARM: dts: rockchip: add rk3288 mipi_dsi nodes
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Olof Johansson [Wed, 24 Feb 2016 21:46:41 +0000 (13:46 -0800)]
Merge tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32 into next/dt

Highlights:
-----------
 - Add DMA controller node to stm32f429 MCU
 - Add pinctrl & gpio nodes to stm32f429 MCU
 - Remap stm32429-eval board SD-Ram to 0x0 for performance boost

* tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32:
  ARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0
  ARM: dts: Add leds support to STM32F429 boards
  ARM: dts: Add USART1 pin config to STM32F429 boards
  ARM: dts: Add pinctrl node to STM32F429
  includes: dt-bindings: Add STM32F429 pinctrl DT bindings
  ARM: dts: Add STM32 DMA support for STM32F429 MCU

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel...
Olof Johansson [Wed, 24 Feb 2016 21:40:18 +0000 (13:40 -0800)]
Merge tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

Few updates for ARM VExpress/Juno platforms

1. GICv3 support on Foundation models

2. Support for Juno R2 board

3. Support for ARM HDLCD on all Juno platforms

* tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: Add HDLCD support on Juno platforms
  Documentation: drm: Add DT bindings for ARM HDLCD
  arm64: dts: Add support for Juno r2 board
  arm64: dts: move juno pcie-controller to base file
  arm64: dts: add .dts for GICv3 Foundation model
  arm64: dts: split Foundation model dts to put the GIC separately
  arm64: dts: Foundation model: increase GICC region to allow EOImode=1
  arm64: dts: prepare foundation-v8.dts to cope with GICv3

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge branch 'lpc32xx/dt' of https://github.com/vzapolskiy/linux into next/dt
Olof Johansson [Wed, 24 Feb 2016 21:37:02 +0000 (13:37 -0800)]
Merge branch 'lpc32xx/dt' of https://github.com/vzapolskiy/linux into next/dt

Merge DT changes for lpc32xx from Vladimir Zapolskiy:

"The changes add description of clock providers and clock consumers,
define default irq types of SoC controllers and add PHY3250 board
regulators.

I'm adding an official LPC32xx maintainer Roland to Cc, however he seems
to be unresponsive for a quite long time (since 2014)."

* 'lpc32xx/dt' of https://github.com/vzapolskiy/linux:
  arm: dts: phy3250: add SD fixed regulator
  arm: dts: phy3250: add lcd and backlight fixed regulators
  arm: dts: lpc32xx: assign interrupt types
  arm: dts: lpc32xx: remove clock frequency property from UART device nodes
  arm: dts: lpc32xx: add USB clock controller
  arm: dts: lpc32xx: add clock properties to device nodes
  arm: dts: lpc32xx: add clock controller device node
  arm: dts: lpc32xx: add device nodes for external oscillators
  dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoARM: dts: spear: replace gpio-key,wakeup with wakeup-source property
Sudeep Holla [Tue, 9 Feb 2016 15:44:59 +0000 (15:44 +0000)]
ARM: dts: spear: replace gpio-key,wakeup with wakeup-source property

Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.

Few dts files assign value "1" to gpio-key,wakeup which is incorrect.
Since the presence of the boolean property indicates it is enabled,
value of "0" or "1" have no significance.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.

Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoMerge tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu into next/dt
Olof Johansson [Wed, 24 Feb 2016 20:18:36 +0000 (12:18 -0800)]
Merge tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu into next/dt

mvebu dt for 4.6 (part 1)

- Improve Armada 38x device tree (SATA and XHCI)
- Fix SD Card and audio support for OpenRD board
- Provide template for RS-232/485 configuration for the same board
- Use a common dtsi file for linkstation boards
- Add support for Buffalo Linkstation LS-QVL

* tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl
  ARM: dts: kirkwood: fix audio for OpenRD clients
  ARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD
  ARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl
  ARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl
  ARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11
  ARM: dts: kirkwood: fix SD slot default configuration for OpenRD
  ARM: dts: kirkwood: fix pin names for UART/SD selection for OpenRD
  ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370
  ARM: dts: armada-38x: use usb-nop-xceiv PHY for the xhci nodes on Armada 388 GP
  ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
  ARM: dts: armada-38x: adjust board name and compatible for Armada 388 GP

Signed-off-by: Olof Johansson <olof@lixom.net>
8 years agoARM: dts: at91: sama5d2 Xplained: enable the adc device
Ludovic Desroches [Thu, 14 Jan 2016 15:38:16 +0000 (16:38 +0100)]
ARM: dts: at91: sama5d2 Xplained: enable the adc device

Enable the adc on the sama5d2 Xplained board.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 years agoARM: dts: at91: sama5d2: add adc device
Ludovic Desroches [Thu, 14 Jan 2016 15:38:15 +0000 (16:38 +0100)]
ARM: dts: at91: sama5d2: add adc device

Add the ADC device, and remove the adc_op_clk which is useless since the
adc sampling frequency is configured with sysfs.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 years agoARM: versatile: move restart to the device tree
Linus Walleij [Mon, 25 Jan 2016 08:23:02 +0000 (09:23 +0100)]
ARM: versatile: move restart to the device tree

We have a power/reset driver for the Versatile family
in drivers/power/reset so let's just activate that driver
and use it and get rid of some non-DT remnants.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: realview: add the DS1338 RTC to PB1176 DT
Linus Walleij [Mon, 18 Jan 2016 10:02:03 +0000 (11:02 +0100)]
ARM: realview: add the DS1338 RTC to PB1176 DT

This adds the Versatile I2C adapter and the Dallas DS1338
RTC on it to the PB1176 device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: pb1176: add ethernet to devicetree
Linus Walleij [Thu, 14 Jan 2016 12:52:40 +0000 (13:52 +0100)]
ARM: pb1176: add ethernet to devicetree

The PB1176 device tree was missing the SMSC9118 ethernet adapter,
so add it. Since this peripheral is not in either development
chip but on the board itself, it gets defined in the root node
of the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: pb1176: add ISP1761 USB OTG host controller
Linus Walleij [Thu, 14 Jan 2016 12:36:48 +0000 (13:36 +0100)]
ARM: pb1176: add ISP1761 USB OTG host controller

The USB host controller was missing from the device tree so add
it. This device is not inside either the development chip or the
FPGA but mounted on the board, so it ends up in the root node of
the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: pb1176: add AACI to the device tree
Linus Walleij [Thu, 14 Jan 2016 12:23:48 +0000 (13:23 +0100)]
ARM: pb1176: add AACI to the device tree

The device tree was missing the definition of the AACI
Advanced Audio Codec Interface, so add it. Tested on the hardware
and it works.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: pb1176: add ICST307 clocks to the device tree
Linus Walleij [Tue, 12 Jan 2016 13:50:47 +0000 (14:50 +0100)]
ARM: pb1176: add ICST307 clocks to the device tree

This adds the five ICST307 clocks to the device tree, so we
can use these with e.g. CLCD.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: realview: fix up PB11MP flash compat strings
Linus Walleij [Tue, 26 Jan 2016 10:42:25 +0000 (11:42 +0100)]
ARM: realview: fix up PB11MP flash compat strings

The two flash memories in the PB11MPCore have their VPP/WP
lines controlled from the system controller add-on in the MTD
subsystem. "arm,versatile-flash" is the first compatible string
to use to get the right support.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: realview: add flash devices to the PB1176 DTS
Linus Walleij [Tue, 14 Oct 2014 13:05:57 +0000 (15:05 +0200)]
ARM: realview: add flash devices to the PB1176 DTS

This adds the flash memories and ROM to the PB1175 DTS file.
The secure flash is marked as "disabled" by default so as to
protect the user from overwriting the boot monitor.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agoARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0
Maxime Coquelin [Wed, 2 Dec 2015 16:47:17 +0000 (17:47 +0100)]
ARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0

STM32F429 allows to remap FMC SDRAM Bank 1 from 0xc0000000 to 0x0,
by writing 0x4 to SYSCFG_MEMRMP register.

As mentionned in the reference manual (see chapter 9.3.1), the performance
gain is really interresting:
"In remap mode at address 0x0000 0000, the CPU can access the external
memory via ICode bus instead of System bus which boosts up the
performance."

These are the dhrystone results with and without the remap enabled:
Default (SDRAM in 0xc0000000):
---------------------------------
Microseconds for one run through Dhrystone:   31.8
Dhrystones per Second:                      31416.9

Remap (SDRAM in 0x0000000):
-----------------------------
Microseconds for one run through Dhrystone:   20.6
Dhrystones per Second:                      48520.1

This patch first change the SDRAM start address to 0x0 for STM32429i-EVAL
board, and also set the dma-range property as the other masters than the M4
CPU still see SDRAM in 0xc0000000.

Note that the Discovery board cannot benefit from this feature, since the
SDRAM is connected to Bank 2.

Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
8 years agoARM: dts: Add leds support to STM32F429 boards
Maxime Coquelin [Mon, 16 Mar 2015 18:05:57 +0000 (19:05 +0100)]
ARM: dts: Add leds support to STM32F429 boards

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
8 years agoARM: dts: Add USART1 pin config to STM32F429 boards
Maxime Coquelin [Wed, 14 Oct 2015 16:15:04 +0000 (18:15 +0200)]
ARM: dts: Add USART1 pin config to STM32F429 boards

This patch selects USART1 pin configuration on PA9/PA10 pins
for both Eval and Disco boards.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
8 years agoARM: dts: Add pinctrl node to STM32F429
Maxime Coquelin [Wed, 14 Oct 2015 16:12:10 +0000 (18:12 +0200)]
ARM: dts: Add pinctrl node to STM32F429

The STM32F429 MCU has 11 GPIO banks, with 16 pins per bank.

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
8 years agoincludes: dt-bindings: Add STM32F429 pinctrl DT bindings
Maxime Coquelin [Wed, 14 Oct 2015 16:25:11 +0000 (18:25 +0200)]
includes: dt-bindings: Add STM32F429 pinctrl DT bindings

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
8 years agoarm: dts: phy3250: add SD fixed regulator
Vladimir Zapolskiy [Mon, 21 Dec 2015 19:54:26 +0000 (21:54 +0200)]
arm: dts: phy3250: add SD fixed regulator

The change adds fixed voltage regulator for SD controller, ARM MMCI
controller driver uses it to control card power management.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoarm: dts: phy3250: add lcd and backlight fixed regulators
Vladimir Zapolskiy [Mon, 21 Dec 2015 19:54:25 +0000 (21:54 +0200)]
arm: dts: phy3250: add lcd and backlight fixed regulators

Phytec PHY3250 board has GPIO controlled regulators for LCD and
backlight, add their descriptions to board DTS file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoarm: dts: lpc32xx: assign interrupt types
Vladimir Zapolskiy [Fri, 20 Nov 2015 01:28:40 +0000 (03:28 +0200)]
arm: dts: lpc32xx: assign interrupt types

LPC32xx interrupt controller has two cells, instead of zero
specify proper irq types for all consumers.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoarm: dts: lpc32xx: remove clock frequency property from UART device nodes
Vladimir Zapolskiy [Fri, 20 Nov 2015 01:05:11 +0000 (03:05 +0200)]
arm: dts: lpc32xx: remove clock frequency property from UART device nodes

If clock-frequency property is given, then it substitutes calculation
of supplying clock frequency from parent clock, this may break UART,
if parent clock is given and managed by common clock framework.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoarm: dts: lpc32xx: add USB clock controller
Vladimir Zapolskiy [Fri, 20 Nov 2015 01:05:07 +0000 (03:05 +0200)]
arm: dts: lpc32xx: add USB clock controller

The change adds device node of LPC32xx USB clock controller and adds
clock properties to USB OHCI, USB device and I2C controller to USB phy
device nodes.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoarm: dts: lpc32xx: add clock properties to device nodes
Vladimir Zapolskiy [Fri, 20 Nov 2015 01:05:06 +0000 (03:05 +0200)]
arm: dts: lpc32xx: add clock properties to device nodes

The change adds clock properties to all described peripheral devices,
clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

Some existing drivers expect to get clock names, in those cases
clock-names are added as well.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoarm: dts: lpc32xx: add clock controller device node
Vladimir Zapolskiy [Fri, 20 Nov 2015 01:05:05 +0000 (03:05 +0200)]
arm: dts: lpc32xx: add clock controller device node

NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part
of system control block (SCB). CPC is supplied by two external
oscillators and it manages core and most of peripheral clocks, the
change adds SCB and CPC descriptions to shared LPC32xx dtsi file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoarm: dts: lpc32xx: add device nodes for external oscillators
Vladimir Zapolskiy [Fri, 20 Nov 2015 01:05:04 +0000 (03:05 +0200)]
arm: dts: lpc32xx: add device nodes for external oscillators

NXP LPC32xx SoC has two external oscillators - one is mandatory and
always on 32768 Hz oscillator and one optional 10-20MHz oscillator,
which is practically always present on LPC32xx boards, because its
presence is needed to supply USB controller clock and by default it
supplies ARM and most of the peripheral clocks, LPC32xx User's Manual
references it as a main oscillator.

The change adds device nodes for both oscillators, frequency of
the main oscillator is selected to be 13MHz by default, this variant
is found on all LPC32xx reference boards.

The device nodes for external oscillators are needed to describe input
clocks of LPC32xx clock controller.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agodt-bindings: create arm/nxp folder and move LPC32xx SoC description to it
Vladimir Zapolskiy [Fri, 20 Nov 2015 01:28:36 +0000 (03:28 +0200)]
dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it

Create a separate folder for device tree bindings of NXP SoCs devices,
and move lpc32xx.txt to it.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
8 years agoARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
James Chao [Sat, 30 Jan 2016 02:38:24 +0000 (10:38 +0800)]
ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix

The LOCK key is at KSO9/KSI3 for Chromebook Flip and other devices
that use the Chrome OS EC keyboard matrix.

Signed-off-by: James Chao <james_chao@asus.com>
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoarm64: dts: Add HDLCD support on Juno platforms
Liviu Dudau [Thu, 2 Apr 2015 18:50:29 +0000 (19:50 +0100)]
arm64: dts: Add HDLCD support on Juno platforms

ARM's Juno platforms have two HDLCD controllers, each linked to an NXP
TDA19988 HDMI transmitter that provides output encoding. Add them
to the device tree.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
8 years agoDocumentation: drm: Add DT bindings for ARM HDLCD
Liviu Dudau [Thu, 12 Dec 2013 18:23:35 +0000 (18:23 +0000)]
Documentation: drm: Add DT bindings for ARM HDLCD

Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
8 years agoARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
Sudeep Holla [Mon, 8 Feb 2016 21:55:12 +0000 (21:55 +0000)]
ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property

Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.

Few dts files assign value "1" to gpio-key,wakeup and in one instance a
value "0" is assigned probably assuming it won't be enabled as a wakeup
source. Since the presence of the boolean property indicates it is
enabled, value of "0" have no value.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoARM: dts: silk: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:25 +0000 (11:17 +0100)]
ARM: dts: silk: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: porter: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:24 +0000 (11:17 +0100)]
ARM: dts: porter: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: marzen: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:23 +0000 (11:17 +0100)]
ARM: dts: marzen: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: lager: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:22 +0000 (11:17 +0100)]
ARM: dts: lager: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: koelsch: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:21 +0000 (11:17 +0100)]
ARM: dts: koelsch: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates:
  - SCIF:
      - Supports now 50, 75, 110, 115200015000002000000, and
        4000000 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.
      - More accurate 576000 bps.
  - HSCIF:
      - Supports now 50, 75, 110, 134, 150, and 200 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.
      - More accurate 576000, 115200030000003500000, and 4000000
bps.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: gose: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:20 +0000 (11:17 +0100)]
ARM: dts: gose: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: bockw: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:19 +0000 (11:17 +0100)]
ARM: dts: bockw: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: alt: Enable SCIF_CLK frequency and pins
Geert Uytterhoeven [Fri, 29 Jan 2016 10:17:18 +0000 (11:17 +0100)]
ARM: dts: alt: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7794: Add BRG support for (H)SCIF
Geert Uytterhoeven [Fri, 29 Jan 2016 10:04:42 +0000 (11:04 +0100)]
ARM: dts: r8a7794: Add BRG support for (H)SCIF

Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7793: Add BRG support for SCIF
Geert Uytterhoeven [Fri, 29 Jan 2016 10:04:41 +0000 (11:04 +0100)]
ARM: dts: r8a7793: Add BRG support for SCIF

Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7791: Add BRG support for (H)SCIF
Geert Uytterhoeven [Fri, 29 Jan 2016 10:04:40 +0000 (11:04 +0100)]
ARM: dts: r8a7791: Add BRG support for (H)SCIF

Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7790: Add BRG support for (H)SCIF
Geert Uytterhoeven [Fri, 29 Jan 2016 10:04:39 +0000 (11:04 +0100)]
ARM: dts: r8a7790: Add BRG support for (H)SCIF

Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7779: Add BRG support for SCIF
Geert Uytterhoeven [Fri, 29 Jan 2016 10:04:38 +0000 (11:04 +0100)]
ARM: dts: r8a7779: Add BRG support for SCIF

Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF device nodes.

This increases the range and accuracy of supported baud rates on SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7778: Add BRG support for SCIF
Geert Uytterhoeven [Fri, 29 Jan 2016 10:04:37 +0000 (11:04 +0100)]
ARM: dts: r8a7778: Add BRG support for SCIF

Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF device nodes.

This increases the range and accuracy of supported baud rates on SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7794: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:40 +0000 (10:47 +0100)]
ARM: dts: r8a7794: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7793: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:39 +0000 (10:47 +0100)]
ARM: dts: r8a7793: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7791: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:38 +0000 (10:47 +0100)]
ARM: dts: r8a7791: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7790: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:37 +0000 (10:47 +0100)]
ARM: dts: r8a7790: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7779: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:36 +0000 (10:47 +0100)]
ARM: dts: r8a7779: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7778: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:35 +0000 (10:47 +0100)]
ARM: dts: r8a7778: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7740: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:34 +0000 (10:47 +0100)]
ARM: dts: r8a7740: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a73a4: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:33 +0000 (10:47 +0100)]
ARM: dts: r8a73a4: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r7s72100: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:32 +0000 (10:47 +0100)]
ARM: dts: r7s72100: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: sh73a0: Rename the serial port clock to fck
Laurent Pinchart [Fri, 29 Jan 2016 09:47:31 +0000 (10:47 +0100)]
ARM: dts: sh73a0: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7794: Add SCIF fallback compatibility strings
Geert Uytterhoeven [Fri, 29 Jan 2016 09:32:07 +0000 (10:32 +0100)]
ARM: dts: r8a7794: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7793: Add SCIF fallback compatibility strings
Geert Uytterhoeven [Fri, 29 Jan 2016 09:32:06 +0000 (10:32 +0100)]
ARM: dts: r8a7793: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7791: Add SCIF fallback compatibility strings
Geert Uytterhoeven [Fri, 29 Jan 2016 09:32:05 +0000 (10:32 +0100)]
ARM: dts: r8a7791: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7790: Add SCIF fallback compatibility strings
Geert Uytterhoeven [Fri, 29 Jan 2016 09:32:04 +0000 (10:32 +0100)]
ARM: dts: r8a7790: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7779: Add SCIF fallback compatibility strings
Geert Uytterhoeven [Fri, 29 Jan 2016 09:32:03 +0000 (10:32 +0100)]
ARM: dts: r8a7779: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: r8a7778: Add SCIF fallback compatibility strings
Geert Uytterhoeven [Fri, 29 Jan 2016 09:32:02 +0000 (10:32 +0100)]
ARM: dts: r8a7778: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: emev2: use GIC_* defines
Simon Horman [Thu, 28 Jan 2016 01:29:54 +0000 (10:29 +0900)]
ARM: dts: emev2: use GIC_* defines

Use GIC_* defines for GIC interrupt cells in emev2 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
8 years agoARM: dts: sh73a0: use GIC_* defines
Simon Horman [Thu, 28 Jan 2016 01:29:44 +0000 (10:29 +0900)]
ARM: dts: sh73a0: use GIC_* defines

Use GIC_* defines for GIC interrupt cells in sh73a0 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agoARM: dts: r7s72100: use GIC_* defines
Simon Horman [Thu, 28 Jan 2016 01:29:35 +0000 (10:29 +0900)]
ARM: dts: r7s72100: use GIC_* defines

Use GIC_* defines for GIC interrupt cells in r7s72100 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agoarm64: dts: Add support for Juno r2 board
Sudeep Holla [Tue, 22 Dec 2015 17:45:29 +0000 (17:45 +0000)]
arm64: dts: Add support for Juno r2 board

Juno r2 is identical to Juno r1 with Cortex A57 cores replaced by
Cortex A72 cores.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
8 years agoarm64: dts: move juno pcie-controller to base file
Sudeep Holla [Mon, 11 Jan 2016 17:16:08 +0000 (17:16 +0000)]
arm64: dts: move juno pcie-controller to base file

The PCIe controller is found on all Juno SoC version. However it's not
functional on R0 due to some hardware bug.

In preparation to add Juno R2 support, this patch moves the
pcie-controller defination to base DTS file. It's marked as disabled by
default and is enabled for Juno R1 explicitly.

Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
8 years agoarm64: dts: add .dts for GICv3 Foundation model
Andre Przywara [Tue, 15 Dec 2015 13:36:38 +0000 (13:36 +0000)]
arm64: dts: add .dts for GICv3 Foundation model

The ARMv8 Foundation model sports a command line parameter to use
a GICv3 emulation instead of the default GICv2 interrupt controller.
Add a new .dts file which reuses most of the definitions of the
existing model while just adding the required properties for the
GICv3 node.

This allows the public Foundation model to run with a GICv3.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
8 years agoarm64: dts: split Foundation model dts to put the GIC separately
Andre Przywara [Tue, 15 Dec 2015 13:36:37 +0000 (13:36 +0000)]
arm64: dts: split Foundation model dts to put the GIC separately

The ARMv8 Foundation model can be run with a GICv2 or a GICv3.
To prepare for the GICv3 version of the .dts without code duplication,
move most of the nodes of the existing DT (except the GIC) into an
include file and just keep that include statement and the GIC node in
the current foundation-v8.dts.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
8 years agoarm64: dts: Foundation model: increase GICC region to allow EOImode=1
Andre Przywara [Tue, 15 Dec 2015 13:36:36 +0000 (13:36 +0000)]
arm64: dts: Foundation model: increase GICC region to allow EOImode=1

The Foundation model GIC mapping is wrong, as the GICC region should
be 8kB instead of 4kB (the model implements the GICv2 architecture).
This defect prevents the driver from switching to EOImode==1.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
8 years agoarm64: dts: prepare foundation-v8.dts to cope with GICv3
Andre Przywara [Tue, 15 Dec 2015 13:36:35 +0000 (13:36 +0000)]
arm64: dts: prepare foundation-v8.dts to cope with GICv3

To prepare the ARM foundation model to support GICv3, we adjust
the #address-cells property of the current GICv2 node to be
compatible with the two cells required for GICv3 later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
8 years agoARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl
Mario Lange [Mon, 25 Jan 2016 16:44:10 +0000 (01:44 +0900)]
ARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl

Add dts file to support Buffalo Linkstation LS-QVL,
which is marvell kirkwood based 4-bay 3.5" HDD NAS.
Product info:
  - (JPN) http://buffalo.jp/product/hdd/network/ls-qvl_r5/
  - (ENG) http://www.buffalotech.com/products/network-storage/home-and-small-office/linkstation-pro-quad

Signed-off-by: Mario Lange <mario_lange@gmx.net>
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: kirkwood: fix audio for OpenRD clients
Aaro Koskinen [Sat, 23 Jan 2016 22:36:39 +0000 (00:36 +0200)]
ARM: dts: kirkwood: fix audio for OpenRD clients

Fix audio on kirkwood-openrd-client:

1) The audio-controller was left disabled.

2) The probe fails because cs42l51 is missing #sound-dai-cells.

/sound/simple-audio-card,codec: could not get #sound-dai-cells for /ocp@f1000000/i2c@11000/cs42l51@4a
asoc-simple-card sound: parse error -22
asoc-simple-card: probe of sound failed with error -22

3) The mapping is incorrect:

asoc-simple-card sound: cs42l51-hifi <-> spdif mapping ok

   should be:

asoc-simple-card sound: cs42l51-hifi <-> i2s mapping ok

Reported-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD
Aaro Koskinen [Sat, 23 Jan 2016 20:37:17 +0000 (22:37 +0200)]
ARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD

Some OpenRD boards have RS-232 and RS-486 connectors wired, but using them
needs a custom DTB as the current DTB configures SD card slot instead.

This patch adds documentation into the DTS on how to change
the configuration.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl
Roger Shimizu [Thu, 21 Jan 2016 14:38:50 +0000 (23:38 +0900)]
ARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl

LS-WVL/VL are both kirkwood-6282 based NAS devices, which share
many MPP pins. However they are slightly different:
  - LS-WVL is 2-Bay NAS, and LS-VL is only 1-Bay.
  - There're two red LED indicator on LS-WVL to show when HDD fails,
    which is similar to LS-WXL, but there's no such on LS-VL.

So after the split, common part goes into .dtsi file:
  - kirkwood-linkstation-6282.dtsi
while all rest part goes into device specific .dts file:
  - kirkwood-linkstation-lsvl.dts
  - kirkwood-linkstation-lswvl.dts

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl
Roger Shimizu [Thu, 21 Jan 2016 14:38:49 +0000 (23:38 +0900)]
ARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl

LS-WXL/WSXL are both kirkwood-6281 based 2-Bay NAS devices, which share
many MPP pins. However they are slightly different:
  - There're two red LED indicator on LS-WXL to show when HDD fails,
    but there's no such on LS-WSXL.
  - There's 4-level speed adjustable FAN on LS-WXL, but not LS-WSXL.

So after the split, common part goes into .dtsi file:
  - kirkwood-linkstation.dtsi
  - kirkwood-linkstation-duo-6281.dtsi
while all rest part goes into device specific .dts file:
  - kirkwood-linkstation-lswsxl.dts
  - kirkwood-linkstation-lswxl.dts

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11
Roger Shimizu [Thu, 21 Jan 2016 14:38:48 +0000 (23:38 +0900)]
ARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: kirkwood: fix SD slot default configuration for OpenRD
Aaro Koskinen [Tue, 12 Jan 2016 20:07:33 +0000 (22:07 +0200)]
ARM: dts: kirkwood: fix SD slot default configuration for OpenRD

The SD card slot was enabled by default with legacy booting.
It does not work anymore with DT boot. Fix by providing GPIO configuration
that matches the old default.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: kirkwood: fix pin names for UART/SD selection for OpenRD
Aaro Koskinen [Tue, 12 Jan 2016 20:07:32 +0000 (22:07 +0200)]
ARM: dts: kirkwood: fix pin names for UART/SD selection for OpenRD

The UART/SD pin names are swapped, fix that.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370
Gregory CLEMENT [Wed, 23 Dec 2015 14:29:17 +0000 (15:29 +0100)]
ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370

Since the commit a526973e0291 ("pinctrl: mvebu: Fix mapping of pin
63 (gpo -> gpio)"), the mpp63 is no more declared as a GPO but is a
GPIO. Even if in the datasheet this pin is described as GPO, the
experience of the D-Link DNS-327L board shows that it can be used as a
GPIO.

This commits generated warnings for the board using this pin as gpo, with
this patch the dts are fixed by using the new function (gpio) instead of
the old one.

The binding documentation has also been updated accordingly.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
8 years agoARM: dts: armada-38x: use usb-nop-xceiv PHY for the xhci nodes on Armada 388 GP
Gregory CLEMENT [Wed, 23 Dec 2015 14:05:41 +0000 (15:05 +0100)]
ARM: dts: armada-38x: use usb-nop-xceiv PHY for the xhci nodes on Armada 388 GP

Using the usb-nop-xceiv PHY for the xhci nodes allows a better
representation of the hardware but also a better handling of the
regulator. By linking the regulator to the PHY there is no more need to
use the regulator-always-on property, then it allows a better power
management.

The remaining usb node uses the ehci-orion driver which can't be used
with the usb-nop-xceiv PHY and must keeps the direct link to the
regulator with the regulator-always-on property.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
Thomas Petazzoni [Tue, 22 Dec 2015 14:28:42 +0000 (15:28 +0100)]
ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP

Really, what we meant by regulator-always-on is that the regulators
are already turned on by the bootloader, for which regulator-boot-on
is a better description.

A net advantage of using regulator-boot-on is that the regulator is
not touched at boot time by the kernel, which avoids having the hard
drives spinning down and then up again, taking several (~5) seconds of
additional boot time.

In addition, there is no need to have such properties on the child
regulators used for SATA. Having it on the parent regulator that
really controls the GPIO is sufficient.

Without the patch:

[    3.945866] ata2: SATA link down (SStatus 0 SControl 300)
[    3.995862] ata3: SATA link down (SStatus 0 SControl 300)
[    4.005863] ata4: SATA link down (SStatus 0 SControl 300)
[    9.125861] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[    9.144575] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[    9.151471] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)

 (and you can hear the disk spinning down and up during this 5.1
 seconds delay)

With the patch:

[    3.945988] ata2: SATA link down (SStatus 0 SControl 300)
[    4.005980] ata4: SATA link down (SStatus 0 SControl 300)
[    4.011404] ata3: SATA link down (SStatus 0 SControl 300)
[    4.145978] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[    4.153701] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[    4.160597] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: armada-38x: adjust board name and compatible for Armada 388 GP
Thomas Petazzoni [Mon, 21 Dec 2015 14:41:55 +0000 (15:41 +0100)]
ARM: dts: armada-38x: adjust board name and compatible for Armada 388 GP

As the name of the Device Tree file name suggests, the Armada 388 GP
really contains an Armada 388 SoC, so this commit updates the board
name and compatible string in the Device Tree file.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
Caesar Wang [Fri, 22 Jan 2016 11:06:49 +0000 (19:06 +0800)]
ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs

Pl330 integrated in rk3036 platform that doesn't support
DMAFLUSHP function. So we add 'arm,pl330-broken-no-flushp' quirk
for rk3036.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
Shawn Lin [Fri, 22 Jan 2016 11:06:48 +0000 (19:06 +0800)]
ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform

Pl330 integrated in rk3xxx platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
Addy Ke [Fri, 22 Jan 2016 11:06:47 +0000 (19:06 +0800)]
ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform

Pl330 integrated in rk3288 platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoLinux 4.5-rc3
Linus Torvalds [Sun, 7 Feb 2016 23:38:30 +0000 (15:38 -0800)]
Linux 4.5-rc3

8 years agoMerge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Linus Torvalds [Sun, 7 Feb 2016 23:23:20 +0000 (15:23 -0800)]
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "The first real batch of fixes for this release cycle, so there are a
  few more than usual.

  Most of these are fixes and tweaks to board support (DT bugfixes,
  etc).  I've also picked up a couple of small cleanups that seemed
  innocent enough that there was little reason to wait (const/
  __initconst and Kconfig deps).

  Quite a bit of the changes on OMAP were due to fixes to no longer
  write to rodata from assembly when ARM_KERNMEM_PERMS was enabled, but
  there were also other fixes.

  Kirkwood had a bunch of gpio fixes for some boards.  OMAP had RTC
  fixes on OMAP5, and Nomadik had changes to MMC parameters in DT.

  All in all, mostly the usual mix of various fixes"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (46 commits)
  ARM: multi_v7_defconfig: enable DW_WATCHDOG
  ARM: nomadik: fix up SD/MMC DT settings
  ARM64: tegra: Add chosen node for tegra132 norrin
  ARM: realview: use "depends on" instead of "if" after prompt
  ARM: tango: use "depends on" instead of "if" after prompt
  ARM: tango: use const and __initconst for smp_operations
  ARM: realview: use const and __initconst for smp_operations
  bus: uniphier-system-bus: revive tristate prompt
  arm64: dts: Add missing DMA Abort interrupt to Juno
  bus: vexpress-config: Add missing of_node_put
  ARM: dts: am57xx: sbc-am57x: correct Eth PHY settings
  ARM: dts: am57xx: cl-som-am57x: fix CPSW EMAC pinmux
  ARM: dts: am57xx: sbc-am57x: fix UART3 pinmux
  ARM: dts: am57xx: cl-som-am57x: update SPI Flash frequency
  ARM: dts: am57xx: cl-som-am57x: set HOST mode for USB2
  ARM: dts: am57xx: sbc-am57x: fix SB-SOM EEPROM I2C address
  ARM: dts: LogicPD Torpedo: Revert Duplicative Entries
  ARM: dts: am437x: pixcir_tangoc: use correct flags for irq types
  ARM: dts: am4372: fix irq type for arm twd and global timer
  ARM: dts: at91: sama5d4 xplained: fix phy0 IRQ type
  ...

8 years agoMerge branch 'mailbox-devel' of git://git.linaro.org/landing-teams/working/fujitsu...
Linus Torvalds [Sun, 7 Feb 2016 23:17:47 +0000 (15:17 -0800)]
Merge branch 'mailbox-devel' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox fixes from Jassi Brar:

 - fix getting element from the pcc-channels array by simply indexing
   into it

 - prevent building mailbox-test driver for archs that don't have IOMEM

* 'mailbox-devel' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Fix dependencies for !HAS_IOMEM archs
  mailbox: pcc: fix channel calculation in get_pcc_channel()

8 years agoMerge tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Linus Torvalds [Sun, 7 Feb 2016 06:14:46 +0000 (22:14 -0800)]
Merge tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
 "Here are some USB fixes for 4.5-rc3.

  The usual, xhci fixes for reported issues, combined with some small
  gadget driver fixes, and a MAINTAINERS file update.  All have been in
  linux-next with no reported issues"

* tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
  xhci: harden xhci_find_next_ext_cap against device removal
  xhci: Fix list corruption in urb dequeue at host removal
  usb: host: xhci-plat: fix NULL pointer in probe for device tree case
  usb: xhci-mtk: fix AHB bus hang up caused by roothubs polling
  usb: xhci-mtk: fix bpkts value of LS/HS periodic eps not behind TT
  usb: xhci: apply XHCI_PME_STUCK_QUIRK to Intel Broxton-M platforms
  usb: xhci: set SSIC port unused only if xhci_suspend succeeds
  usb: xhci: add a quirk bit for ssic port unused
  usb: xhci: handle both SSIC ports in PME stuck quirk
  usb: dwc3: gadget: set the OTG flag in dwc3 gadget driver.
  Revert "xhci: don't finish a TD if we get a short-transfer event mid TD"
  MAINTAINERS: fix my email address
  usb: dwc2: Fix probe problem on bcm2835
  Revert "usb: dwc2: Move reset into dwc2_get_hwparams()"
  usb: musb: ux500: Fix NULL pointer dereference at system PM
  usb: phy: mxs: declare variable with initialized value
  usb: phy: msm: fix error handling in probe.