Marek Vasut [Sun, 19 Jul 2015 05:00:26 +0000 (07:00 +0200)]
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 2
If d != 0 after sdr_working_phase() finishes, the else branch
of the condition has no impact on anything at all, since work_end
was already set independently of the value of "d" . Zap this
useless code.
Marek Vasut [Sun, 19 Jul 2015 04:45:43 +0000 (06:45 +0200)]
ddr: altera: Clean up find_vfifo_read()
Fix data types, constify where applicable, fix comments and debug
strings. In case enough failing reads are detected, just return
right away instead of breaking from the loop. This lets us make
the error handling at the end much simpler.
Marek Vasut [Sun, 19 Jul 2015 03:35:40 +0000 (05:35 +0200)]
ddr: altera: Clean up sdr_*_phase() part 6
It is now clear that the max_working_cnt variable is totally unused.
Zap the variable and zap other variables which became unused due to
this change too.
Marek Vasut [Sun, 19 Jul 2015 03:26:49 +0000 (05:26 +0200)]
ddr: altera: Clean up sdr_*_phase() part 5
Pull out the loop for eaching working/non-working DQS enable phase
into a separate function, as this is mostly common code between.
Clean up sdr_working_phase() and sdr_nonworking_phase() while switching
these two functions to the common sdr_find_phase().
Marek Vasut [Sun, 19 Jul 2015 03:01:12 +0000 (05:01 +0200)]
ddr: altera: Clean up sdr_*_phase() part 4
Get rid of found_{begin,end} variables. Instead of breaking out
through all of the loops, just return when the begin/end of the
window is found and be done with it. Also clean up the trailing
conditional expression, which is now much easier.
Marek Vasut [Sun, 19 Jul 2015 02:37:08 +0000 (04:37 +0200)]
ddr: altera: Clean up sdr_*_phase() part 3
Fix the arguments passed to these functions. The bit_chk is
overriden by rw_mgr_mem_calibrate_read_test_all_ranks() which
is invoked by all three sdr_*_phase() functions, so just make
this into local variable.
Marek Vasut [Sun, 19 Jul 2015 02:34:12 +0000 (04:34 +0200)]
ddr: altera: Clean up sdr_*_phase() part 2
Fix the arguments passed to these functions. The grp argument
does not have to be passed via reference, it's never modified
within either of those functions, so make it into a value.
Marek Vasut [Sun, 19 Jul 2015 02:14:32 +0000 (04:14 +0200)]
ddr: altera: Clean up sdr_find_window_centre() part 3
Reorder the end of the function a little by moving the conditional
debug output around a little. Rename the function from _centre() to
_center(). Document the function in kerneldoc.
Marek Vasut [Sun, 19 Jul 2015 02:04:33 +0000 (04:04 +0200)]
ddr: altera: Clean up sdr_find_window_centre() part 2
This function is a treasure trove of ad-hoc iterative
implementations of mathematical functions. Replace all
of those with their non-iterative counterpart.
Marek Vasut [Sun, 19 Jul 2015 00:56:59 +0000 (02:56 +0200)]
ddr: altera: Clean up sdr_find_window_centre() part 1
Clean up the arguments of this function. Most of the pointers
passed into the function are either not needed at all, or can
be passed as value instead of reference. Also fix the broken
multiline debug strings. No functional change.
Marek Vasut [Sat, 18 Jul 2015 02:28:42 +0000 (04:28 +0200)]
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 4
This function is only invoked from rw_mgr_mem_calibrate_dqs_enable_calibration()
and at this point, it is just one level of indirection, so wrap the
rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() into
rw_mgr_mem_calibrate_dqs_enable_calibration() to get rid of the level
of indirection.
Marek Vasut [Sat, 18 Jul 2015 02:24:49 +0000 (04:24 +0200)]
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 3
Replace at least one of the loops in this function with call of a
standard function call instead of the ad-hoc implementation. The
other one cannot be replaced, since the delay is incremented for
each group.
Marek Vasut [Sat, 18 Jul 2015 02:16:45 +0000 (04:16 +0200)]
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 1
Start cleaning up this function. In the first part, just fix
the incorrectly broken debug strings and fix return value to
respect the common convention.
Marek Vasut [Sat, 18 Jul 2015 01:55:07 +0000 (03:55 +0200)]
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_patterns()
Rework this function such that the code is more readable. Zap
unused parameter "num_tries" while at it. Also wrap parameter
"bit_chk" into this function as it's value is not used outside.
Finally, fix the return value from this function to match the
common expectation, where 0 means success.
This function is called from one single place and it's sole purpose
is to call one single function with slightly modified arguments.
Zap this function to skip this useless intermediate step.
Marek Vasut [Sat, 18 Jul 2015 01:10:31 +0000 (03:10 +0200)]
ddr: altera: Extract Centering DQ/DQS from rw_mgr_mem_calibrate_vfifo()
Just extract this piece of functionality into separate function
to make the code better separated. This matches the division in
Altera documentation, Altera EMI_RM 2015.05.04 , section 1, the
UniPHY Calibration Stages.
Marek Vasut [Sat, 18 Jul 2015 00:57:32 +0000 (02:57 +0200)]
ddr: altera: Extract DQS enable calibration from rw_mgr_mem_calibrate_vfifo()
Just extract this piece of functionality into separate function
to make the code better separated. This matches the division in
Altera documentation, Altera EMI_RM 2015.05.04 , section 1, the
UniPHY Calibration Stages.
Marek Vasut [Sat, 18 Jul 2015 00:46:56 +0000 (02:46 +0200)]
ddr: altera: Extract guaranteed write from rw_mgr_mem_calibrate_vfifo()
Just extract this piece of functionality into separate function
to make the code better separated. This matches the division in
Altera documentation, Altera EMI_RM 2015.05.04 , section 1, the
UniPHY Calibration Stages.
Marek Vasut [Fri, 17 Jul 2015 02:24:18 +0000 (04:24 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 6
This is kind of microseries-within-series indent cleanup.
It is clear that the read_group and write_group variables
have the same value, to just make them into one variable
called rw_group. While doing this, constify the variables
as they are constant.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Marek Vasut [Fri, 17 Jul 2015 01:50:17 +0000 (03:50 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 4
This is kind of microseries-within-series indent cleanup.
This patch cleans up the handling of grp_calibrated such
that the variable isn't used all over the place, but just
very localy. This allows trimming down the indent issues.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Marek Vasut [Fri, 17 Jul 2015 01:44:26 +0000 (03:44 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 3
This is kind of microseries-within-series indent cleanup.
This patch just tweaks the indentation so it is visible
what to do with the grp_calibrated variable.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Marek Vasut [Fri, 17 Jul 2015 01:16:45 +0000 (03:16 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 1
This patch just adds an expanded documentation header to the
aforementioned function. This is needed to make it easier to
match the purpose of this function with the documentation.
Marek Vasut [Fri, 17 Jul 2015 00:50:56 +0000 (02:50 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 5
This is kind of microseries-within-series indent cleanup.
Rework the code for the the middle-loop of the mega-loop
this time and deal with the group_failed variable. Instead
of checking if the group failed in the previous calibration
part, just jump to the end of the loop if calibration did
fail and increment the counter. This shaves away one more
level of indent while making the code slightly more readable.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Marek Vasut [Fri, 17 Jul 2015 00:40:21 +0000 (02:40 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 4
This is kind of microseries-within-series indent cleanup.
Rework the code for the last loop within the mega-loop
to make it actually readable and not an insane cryptic pile
of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Marek Vasut [Fri, 17 Jul 2015 00:38:51 +0000 (02:38 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 3
This is kind of microseries-within-series indent cleanup.
Rework the code for the third loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Marek Vasut [Fri, 17 Jul 2015 00:31:04 +0000 (02:31 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 2
This is kind of microseries-within-series indent cleanup.
Rework the code for the second loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Marek Vasut [Fri, 17 Jul 2015 00:21:47 +0000 (02:21 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 1
This is kind of microseries-within-series indent cleanup.
Rework the code for the first loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
Redo the mega-condition such that if the calibration is to be skipped,
the positive branch of the condition does all the work and returns.
The negative branch, which is in fact the default behavior, is then
converted to a code which is no longer conditional. This trims down
the indent by one level.
Marek Vasut [Mon, 20 Jul 2015 06:03:11 +0000 (08:03 +0200)]
ddr: altera: Clean up set_rank_and_odt_mask() part 1
First, invert the logic of the if (odt_mode == ...) conditional to make
the OFF mode harder to miss. It is a short piece of code right at the
end, so move it up.
Also, clean up data types and constify where applicable and clean up
the cs_and_odt_mask assignment. No functional change.
Marek Vasut [Thu, 16 Jul 2015 23:57:41 +0000 (01:57 +0200)]
ddr: altera: Clean up mem_config()
Clean mem_config() function. First, reorder the math done in the
function such that WLAT and RLAT computation is together. Then,
scrap contradictory comments which do not match the result of the
math at all. Next, extract the mem_precharge_and_activate() call
from the end of the function as it is completely unrelated here.
Finally, rename the function to mem_init_latency().
Marek Vasut [Thu, 16 Jul 2015 23:20:21 +0000 (01:20 +0200)]
ddr: altera: Clean up run_mem_calibrate()
Clean the function up slightly by using clrsetbits_le32() to flip
bits in registers instead of cryptic bitmasks. Zap condition checking
for PHY_DEBUG_IN_DEBUG_MODE flag, which is never set. Split the
calibration report into separate debug_mem_calibrate() function.
Marek Vasut [Thu, 16 Jul 2015 22:45:11 +0000 (00:45 +0200)]
ddr: altera: Rework initialize_tracking()
Clean the function up by getting rid of all the insane XOR-leftshift
combos when assembling register values. While at it, remove all the
ad-hoc variables necessary for this XOR-leftshift voodoo. Finally,
get rid of the iterative division implementation of two constants
and replace it with a DIV_ROUND_UP() macro :-)
Marek Vasut [Fri, 17 Jul 2015 03:33:28 +0000 (05:33 +0200)]
ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 2
Clean the DQS and OCT parts of the function, clean up the chopped
formatting strings in debug_cond() and slightly improve the code.
Zap group_bgn argument as it is used only in debug messages. Document
the function using kerneldoc. No functional change.
Marek Vasut [Fri, 17 Jul 2015 03:30:14 +0000 (05:30 +0200)]
ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 1
Apparently, in case of the DQ and DM, the value if the new_delay variable
is calculated, but the value is not used. Zap the entire code which does
calculate the value.
It is not clear to me whether or not the code is doing the right thing
in the first place. Right now, it calls scc_mgr_load_dq() and
scc_mgr_load_dm() respectively, but I suspect it might need to call
scc_mgr_apply_group_dq_out1_delay() and scc_mgr_apply_group_dm_out1_delay()
instead. This is something Altera must investigate.
Marek Vasut [Sat, 18 Jul 2015 23:34:43 +0000 (01:34 +0200)]
ddr: altera: Extract scc_mgr_set_hhp_extras()
Move scc_mgr_set_hhp_extras() out of scc_set_bypass_mode() as it
has nothing to do in there. Instead, invoke it from mem_calibrate()
just before invoking scc_set_bypass_mode().
Marek Vasut [Sat, 18 Jul 2015 23:32:55 +0000 (01:32 +0200)]
ddr: altera: Clean up scc_mgr_set_hhp_extras()
Minor coding style cleanup for this function. Furthermore, move
ad-hoc debug_cond() calls from the only location from where this
function is invoked into this actual function.
Implement universal scc_mgr_set_all_ranks() function and convert
various ad-hoc implementations of similar functionality to use
this single function. Document the function in kerneldoc.
Marek Vasut [Wed, 15 Jul 2015 00:53:45 +0000 (02:53 +0200)]
Makefile: Add target for building bootable SPL image for SoCFPGA
Add build target for generating boot partition images recognised by
the SoCFPGA BootROM. The SoCFPGA BootROM expects four copies of the
u-boot-spl-dtb.sfp at the beginning of boot partition. Those are
u-boot-spl-dtb.bin augmented by a header with which the BootROM can
work. The u-boot-dtb.img uImage is appended to this to produce a
full boot partition image, the u-boot-with-spl-dtb.sfp . This is
the name of the final target.
Marek Vasut [Fri, 24 Jul 2015 04:15:14 +0000 (06:15 +0200)]
arm: socfpga: config: Make CONFIG_SPI_FLASH_MTD useful
Enable the mtdparts command and related options to make support
for SPI NOR MTD useful in any way. With the mtdparts command in
place, it is possible to use partition of the SPI NOR in U-Boot.
Marek Vasut [Wed, 22 Jul 2015 04:18:19 +0000 (06:18 +0200)]
arm: socfpga: config: Fix LOADADDR
Setting LOADADDR to 0x8000 is a bad idea, it is very likely that
some kind of overlap will happen. Move the LOADADDR 0x01000000
(16MiB from start of RAM) to make sure no overlap happens when
loading kernel for example.
There is no need to disable support for partitions in the SPL,
we can support partitions in SPL perfectly well. This is likely
some remnant from old times, so just remove this configuration
option.
Moreover, the CRC32 chunk size doesn't have to be adjusted anymore,
since both the GD and malloc area are in RAM by the time this CRC
check can be used and there's plenty of space. Zap this abomination
as well.
Marek Vasut [Sun, 12 Jul 2015 13:23:28 +0000 (15:23 +0200)]
arm: socfpga: config: Move SPL GD and malloc to RAM
Now that the SPL structure is organised such that it matches the
U-Boot's SPL design, it is possible to use the option of relocating
GD to RAM. And since we have GD in RAM, move malloc area to RAM as
well. We point the malloc base pointer 1 MiB past U-Boot's load
address. We use simple malloc for SPL because it is 3kiB smaller
in terms of code size than regular malloc which was used thus far.
Marek Vasut [Sat, 25 Jul 2015 17:33:56 +0000 (19:33 +0200)]
arm: socfpga: misc: Reset ethernet from OF
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc
hardcoded values in the U-Boot code. Since we don't have a proper reset
framework in place yet, we have to do this slightly ad-hoc parsing of the
OF tree instead.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>