]> git.karo-electronics.de Git - karo-tx-linux.git/log
karo-tx-linux.git
14 years agodrm/i915: Update hotplug interrupts register definitions for Sandybridge
Yuanhan Liu [Fri, 8 Oct 2010 09:21:06 +0000 (10:21 +0100)]
drm/i915: Update hotplug interrupts register definitions for Sandybridge

On Sandybridge, the bit definition for hotplug on SDE has changed, so
update the code to new definition.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30378
Cc: stable@kernel.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/crt: Make sure the hotplug interrupt is enabled
Yuanhan Liu [Fri, 8 Oct 2010 09:18:01 +0000 (10:18 +0100)]
drm/i915/crt: Make sure the hotplug interrupt is enabled

After disabling the hotplug interrupts for VGA detection on Ironlake, be
sure to re-enable them again afterwards.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30378
Signed-off-by: Yuanhan Liu <yuanhan.liu@intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: diasable clock gating for the panel power sequencer
Jesse Barnes [Thu, 7 Oct 2010 23:01:25 +0000 (16:01 -0700)]
drm/i915: diasable clock gating for the panel power sequencer

Needed on Ibex Peak and Cougar Point or the panel won't always come on.

Cc: stable@kernel.org
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: make eDP PLL functions work as advertised
Jesse Barnes [Thu, 7 Oct 2010 23:01:24 +0000 (16:01 -0700)]
drm/i915/dp: make eDP PLL functions work as advertised

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: don't bother with DP PLL for PCH attached eDP
Jesse Barnes [Thu, 7 Oct 2010 23:01:23 +0000 (16:01 -0700)]
drm/i915/dp: don't bother with DP PLL for PCH attached eDP

We don't use the CPU DP PLL with PCH attached eDP panels, so don't
bother to enable it.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: use VBT provided eDP params if available
Jesse Barnes [Thu, 7 Oct 2010 23:01:22 +0000 (16:01 -0700)]
drm/i915/dp: use VBT provided eDP params if available

We can skip most of the link training step if we use the VBT provided
values.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: cache eDP DPCD data
Jesse Barnes [Thu, 7 Oct 2010 23:01:21 +0000 (16:01 -0700)]
drm/i915/dp: cache eDP DPCD data

Cache the first 4 bytes of DPCD data in the eDP case.  It's unlikely to
change and can save us some trouble at link training time.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: don't program FDI RX/TX in mode_set
Jesse Barnes [Thu, 7 Oct 2010 23:01:20 +0000 (16:01 -0700)]
drm/i915: don't program FDI RX/TX in mode_set

We do this later (and more properly) when we enable FDI, so we don't
need to do it here.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: fix ironlake CRTC enable/disable
Jesse Barnes [Thu, 7 Oct 2010 23:01:19 +0000 (16:01 -0700)]
drm/i915: fix ironlake CRTC enable/disable

Wait for vblank after enabling a pipe, make the error messages more
informative, and wait for the pipe to turn off when we disable it.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: use DPLL_DVO_HIGH_SPEED for PCH eDP
Jesse Barnes [Thu, 7 Oct 2010 23:01:18 +0000 (16:01 -0700)]
drm/i915: use DPLL_DVO_HIGH_SPEED for PCH eDP

As with other PCH DP connections.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: use 120MHz refclk in PCH eDP case too
Jesse Barnes [Thu, 7 Oct 2010 23:01:17 +0000 (16:01 -0700)]
drm/i915: use 120MHz refclk in PCH eDP case too

CPU eDP needs a different reference clock than PCH eDP, which uses the
standard PCH refclk of 120MHz.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: fix PCH eDP SSC support
Jesse Barnes [Thu, 7 Oct 2010 23:01:16 +0000 (16:01 -0700)]
drm/i915: fix PCH eDP SSC support

Enable SSC on PCH eDP if possible.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: added a posting read of PCH_DREF_CONTROL before the udelay]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: add Ironlake clock gating workaround for FDI link training
Jesse Barnes [Thu, 7 Oct 2010 23:01:15 +0000 (16:01 -0700)]
drm/i915: add Ironlake clock gating workaround for FDI link training

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: fetch eDP configuration data from the VBT
Jesse Barnes [Thu, 7 Oct 2010 23:01:14 +0000 (16:01 -0700)]
drm/i915: fetch eDP configuration data from the VBT

We need to use some of these values in eDP configurations, so be sure to
fetch them and store them in the i915 private structure.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: add _DSM support
Jesse Barnes [Thu, 7 Oct 2010 23:01:13 +0000 (16:01 -0700)]
drm/i915: add _DSM support

The _DSM method on the integrated graphics device can tell us which
connectors are muxable, so add support for making the call and parsing
out the connector info.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: fix compiler warnings for using uninitialized 'result' and
downgrade error message for non-switchable devices]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: eDP power sequencing fixes
Jesse Barnes [Thu, 7 Oct 2010 23:01:12 +0000 (16:01 -0700)]
drm/i915/dp: eDP power sequencing fixes

Enable the panel before adjusting eDP link params, make sure the panel
is idle after powering it on before proceeding with other activity,
delay backlight enable to avoid visible flicker.

Also avoid using VDD per hw team recommendation; it can conflict with
the builtin panel power sequencing logic and lead to panel power
sequencing failures.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: fix CPU vs PCH eDP confusion
Jesse Barnes [Thu, 7 Oct 2010 23:01:11 +0000 (16:01 -0700)]
drm/i915: fix CPU vs PCH eDP confusion

FDI training needs to done and idle for PCH eDP and before we turn the
pipes on, and various eDP checks need to account for PCH attached eDP.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: remove broken intel_pch_has_edp function
Jesse Barnes [Thu, 7 Oct 2010 23:01:10 +0000 (16:01 -0700)]
drm/i915: remove broken intel_pch_has_edp function

Since we set the output type of PCH attached eDP panels to
INTEL_OUTPUT_eDP this function would never return true when it should.
It's been replaced by working functions.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: add eDP checking functions for the display code
Jesse Barnes [Thu, 7 Oct 2010 23:01:09 +0000 (16:01 -0700)]
drm/i915: add eDP checking functions for the display code

The display code needs to distinguish between CPU and PCH attached eDP
panels, so add some helpers to handle that.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: correct eDP lane count and bpp
Jesse Barnes [Thu, 7 Oct 2010 23:01:08 +0000 (16:01 -0700)]
drm/i915/dp: correct eDP lane count and bpp

With the old check we'd never set lane_count or bpp to different values
on PCH attached eDP panels.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: remove redundant is_pch_edp checks
Jesse Barnes [Thu, 7 Oct 2010 23:01:07 +0000 (16:01 -0700)]
drm/i915/dp: remove redundant is_pch_edp checks

If is_edp is true, is_pch_edp will always be true.  So limit the calls
to the latter function to places where the distinction actually matters.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915/dp: convert eDP checks to functions and document
Jesse Barnes [Thu, 7 Oct 2010 23:01:06 +0000 (16:01 -0700)]
drm/i915/dp: convert eDP checks to functions and document

Most of the PCH eDP checks are redundant, so document the functions in
preparation for removing most of the calls.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Wait for pending flips on the GPU
Chris Wilson [Thu, 7 Oct 2010 16:28:15 +0000 (17:28 +0100)]
drm/i915: Wait for pending flips on the GPU

Currently, if a batch buffer refers to an object with a pending flip,
then we sleep until that pending flip is completed (unpinned and
signalled). This is so that a flip can be queued and the user can
continue rendering to the backbuffer oblivious to whether the buffer is
still pinned as the scan out. (The kernel arbitrating at the last moment
to stall the batch and wait until the buffer is unpinned and replaced as
the front buffer.)

As we only have a queue depth of 1, we can simply wait for the current
pending flip to complete and continue rendering. We can achieve this
with a single WAIT_FOR_EVENT command inserted into the ring buffer prior
to executing the batch, *without* stalling the client.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Free hardware status page on unload when physically mapped
Keith Packard [Thu, 7 Oct 2010 08:20:12 +0000 (09:20 +0100)]
drm/i915: Free hardware status page on unload when physically mapped

A physically mapped hardware status page is allocated at driver load
time but was never freed. Call the existing code to free this page at
driver unload time on hardware which uses this kind.

Signed-off-by: Keith Packard <keithp@keithp.com>
[ickle: call before tearing down registers on KMS-only path, as pointed
out by Dave Airlie]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
14 years agoMerge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-next
Dave Airlie [Wed, 6 Oct 2010 02:57:54 +0000 (12:57 +1000)]
Merge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-next

* 'drm-radeon-next' of ../drm-radeon-next:
  drm/radeon/kms: add drm blit support for evergreen
  drm/radeon: Modify radeon_pm_in_vbl to use radeon_get_crtc_scanoutpos()
  drm/radeon: Add function for display scanout position query.
  drm/radeon/kms: rework spread spectrum handling
  drm/radeon/kms: remove new pll algo
  drm/radeon/kms: remove some pll algo flags
  drm/radeon/kms: prefer high post dividers in legacy pll algo
  drm/radeon/kms: properly handle 40 bit MC addresses in the cursor code
  drm/radeon: add properties to configure the width of the underscan borders
  drm/radeon/kms/r6xx+: use new style fencing (v3)
  drm/radeon/kms: enable writeback (v2)
  drm/radeon/kms: clean up r6xx/r7xx blit init (v2)

14 years agoMerge branch 'drm-kdb-next' into drm-core-next
Dave Airlie [Wed, 6 Oct 2010 02:57:50 +0000 (12:57 +1000)]
Merge branch 'drm-kdb-next' into drm-core-next

* drm-kdb-next:
  drm/nouveau/kms: Avoid a hang entering KDB with VT accel on.
  radeon, kdb, kms: Save and restore the LUT on atomic KMS enter/exit
  drm, kdb, kms: Add an enter argument to mode_set_base_atomic() API
  drm/nouveau/kms: Implement KDB debug hooks for nouveau KMS.
  drm/radeon/kms: Implement KDB debug hooks for radeon KMS.

14 years agoMerge remote branch 'nouveau/for-airlied' of ../drm-nouveau-next into drm-core-next
Dave Airlie [Wed, 6 Oct 2010 02:38:04 +0000 (12:38 +1000)]
Merge remote branch 'nouveau/for-airlied' of ../drm-nouveau-next into drm-core-next

[airlied - add fix for vmwgfx build]

* 'nouveau/for-airlied' of ../drm-nouveau-next: (93 commits)
  drm/ttm: restructure to allow driver to plug in alternate memory manager
  drm/ttm: introduce utility function to free an allocated memory node
  drm/nouveau: fix thinkos in mem timing table recordlen check
  drm/nouveau: parse voltage from perf 0x40 entires
  drm/nouveau: don't use the default pll limits in table v2.1 on nv50+ cards
  drm/nv50: Fix large 3D performance regression caused by the interchannel sync patches.
  drm/nouveau: Synchronize buffer object moves in hardware.
  drm/nouveau: Use semaphores to handle inter-channel sync in hardware.
  drm/nouveau: Provide a means to have arbitrary work run on fence completion.
  drm/nouveau: Minor refactoring/cleanup of the fence code.
  drm/nouveau: Add a module option to force card POST.
  drm/nv50: prevent (IB_PUT == IB_GET) for occurring unless idle
  drm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD.
  drm/nv30-nv40: Fix postdivider mask when writing engine/memory PLLs.
  drm/nouveau: Fix perf table parsing on BMP v5.25.
  drm/nouveau: fix required mode bandwidth calculation for DP
  drm/nouveau: fix typo in c2aa91afea5f7e7ae4530fabd37414a79c03328c
  drm/nva3: split pm backend out from nv50
  drm/nouveau: run perflvl and M table scripts on mem clock change
  drm/nouveau: pass perflvl struct to clock_pre()
  ...

14 years agodrm/nouveau/kms: Avoid a hang entering KDB with VT accel on.
Chris Ball [Sun, 26 Sep 2010 11:47:27 +0000 (06:47 -0500)]
drm/nouveau/kms: Avoid a hang entering KDB with VT accel on.

Francisco Jerez advises that pre-nv20 cards would hang if we entered
kdb with accel on and IRQs disabled, so we now disable accel before
entering kdb and re-enable it on the way back out.

Reported-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agoradeon, kdb, kms: Save and restore the LUT on atomic KMS enter/exit
Jason Wessel [Sun, 26 Sep 2010 11:47:26 +0000 (06:47 -0500)]
radeon, kdb, kms: Save and restore the LUT on atomic KMS enter/exit

When changing VTs non-atomically the kernel works in conjunction with
the Xserver in user space and receives the LUT information from the
Xserver via a system call.  When changing modes atomically for kdb,
this information must be saved and restored without disturbing user
space as if nothing ever happened.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
CC: David Airlie <airlied@linux.ie>
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm, kdb, kms: Add an enter argument to mode_set_base_atomic() API
Jason Wessel [Sun, 26 Sep 2010 11:47:25 +0000 (06:47 -0500)]
drm, kdb, kms: Add an enter argument to mode_set_base_atomic() API

Some devices such as the radeon chips receive information from user
space which needs to be saved when executing an atomic mode set
operation, else the user space would have to be queried again for the
information.

This patch extends the mode_set_base_atomic() call to pass an argument
to indicate if this is an entry or an exit from an atomic kernel mode
set change.  Individual drm drivers can properly save and restore
state accordingly.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
CC: David Airlie <airlied@linux.ie>
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/nouveau/kms: Implement KDB debug hooks for nouveau KMS.
Chris Ball [Sun, 26 Sep 2010 11:47:24 +0000 (06:47 -0500)]
drm/nouveau/kms: Implement KDB debug hooks for nouveau KMS.

Tested on nv50 and nv04 HW.

Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: Implement KDB debug hooks for radeon KMS.
Chris Ball [Sun, 26 Sep 2010 11:47:23 +0000 (06:47 -0500)]
drm/radeon/kms: Implement KDB debug hooks for radeon KMS.

Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agoMerge branch 'drm-vmware-next' into drm-core-next
Dave Airlie [Wed, 6 Oct 2010 01:47:56 +0000 (11:47 +1000)]
Merge branch 'drm-vmware-next' into drm-core-next

* drm-vmware-next:
  drm/vmwgfx: Bump minor and driver date
  drm/vmwgfx: Save at least one screen layout
  drm/vmwgfx: Add modinfo version
  drm/vmwgfx: Add a parameter to get the max fb size
  drm/vmwgfx: Don't flush fb if we're in the suspended state.
  drm/vmwgfx: Prune modes based on available VRAM size
  drm/vmwgfx: Take the ttm lock around the dirty ioctl
  drm: vmwgfx: Add a struct drm_file parameter to the dirty framebuffer callback
  drm/vmwgfx: Add new-style PM hooks to improve hibernation behavior
  drm/vmwgfx: Fix ACPI S3 & S4 functionality.
  drm/vmwgfx: Really support other depths than 32

14 years agodrm/radeon/kms: add drm blit support for evergreen
Alex Deucher [Thu, 9 Sep 2010 15:33:36 +0000 (11:33 -0400)]
drm/radeon/kms: add drm blit support for evergreen

This patch implements blit support for bo moves using
the 3D engine.  It uses the same method as r6xx/r7xx:
- store the base state in an IB
- emit variable state and vertex buffers to do the blit

This allows the hw to move bos using the 3D engine and allows
full use of vram beyond the pci aperture size.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon: Modify radeon_pm_in_vbl to use radeon_get_crtc_scanoutpos()
Mario Kleiner [Tue, 5 Oct 2010 23:57:37 +0000 (19:57 -0400)]
drm/radeon: Modify radeon_pm_in_vbl to use radeon_get_crtc_scanoutpos()

radeon_pm_in_vbl() didn't report in vblank status accurately. Make
it a wrapper around radeon_get_crtc_scanoutpos() which corrects for
biases, so it reports accurately.

radeon_pm_in_vbl() will only report in_vbl if all active crtc's
are currently inside vblank.

agd5f: use rdev->num_crtc rather than hardcoding the crtc count

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon: Add function for display scanout position query.
Mario Kleiner [Tue, 5 Oct 2010 23:57:36 +0000 (19:57 -0400)]
drm/radeon: Add function for display scanout position query.

radeon_get_crtc_scanoutpos() returns the current horizontal
and vertical scanout position of a crtc. It also reports if
the display scanout is currently inside the vblank area.

hpos reports current horizontal pixel scanout position.
vpos reports the current scanned out line as a value >= 0
in active scanout. If the scanout is inside vblank area, it
reports a negative value, the number of scanlines until
end of vblank aka start of active scanout, e.g., -3 ==
"At most 3 scanlines until end of vblank".

This code is derived from radeon_pm_in_vbl(), tested on
R500 and R600.

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: rework spread spectrum handling
Alex Deucher [Mon, 4 Oct 2010 21:13:01 +0000 (17:13 -0400)]
drm/radeon/kms: rework spread spectrum handling

This patch reworks spread spectrum handling to enable it
properly on lvds and DP/eDP links.  It also fixes several
bugs in the old spread spectrum code.

- Use the ss recommended reference divider if available
when calculating the pll
- Use the proper ss command tables on pre-DCE3 asics
- Avoid reading past the end of the ss info tables
- Enable ss on evergreen asics (lvds, dp, tmds)
- Enable ss on DP/eDP links

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: remove new pll algo
Alex Deucher [Wed, 29 Sep 2010 15:37:41 +0000 (11:37 -0400)]
drm/radeon/kms: remove new pll algo

The recent changes to the old algo (prefer high post div)
coupled with the range and precision limitations of using
fixed point with the new algo make the new algo less
useful.  So drop the new algo.  This should work as well
or better than the old new/old combinations and simplifies
the code a lot.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=30218
among others.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: remove some pll algo flags
Alex Deucher [Wed, 29 Sep 2010 15:37:40 +0000 (11:37 -0400)]
drm/radeon/kms: remove some pll algo flags

These shouldn't be needed with the post div changes
in the last patch.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: prefer high post dividers in legacy pll algo
Alex Deucher [Wed, 29 Sep 2010 15:37:39 +0000 (11:37 -0400)]
drm/radeon/kms: prefer high post dividers in legacy pll algo

the hw prefers higher post dividers

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: properly handle 40 bit MC addresses in the cursor code
Alex Deucher [Thu, 30 Sep 2010 23:16:03 +0000 (19:16 -0400)]
drm/radeon/kms: properly handle 40 bit MC addresses in the cursor code

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon: add properties to configure the width of the underscan borders
Marius Gröger [Tue, 21 Sep 2010 19:30:59 +0000 (21:30 +0200)]
drm/radeon: add properties to configure the width of the underscan borders

This allows for a more exact fitting on the physical
display. The new properties default to zero which corresponds to the
previous underscan border width[height] formula:
(display_width[display_width] >> 5) + 16.

Example to set a horizontal border width of 30 and a vertikal border
height of 22:

   xrandr --output HDMI-0 --set underscan on --set "underscan hborder" 30 --set "underscan vborder" 22

Signed-off-by: Marius Gröger <marius.groeger@googlemail.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms/r6xx+: use new style fencing (v3)
Alex Deucher [Sat, 4 Sep 2010 09:04:34 +0000 (05:04 -0400)]
drm/radeon/kms/r6xx+: use new style fencing (v3)

On r6xx+ a newer fence mechanism was implemented to replace
the old wait_until plus scratch regs setup.  A single EOP event
will flush the destination caches, write a fence value, and generate
an interrupt.  This is the recommended fence mechanism on r6xx+ asics.

This requires my previous writeback patch.

v2: fix typo that enabled event fence checking on all asics
rather than just r6xx+.

v3: properly enable EOP interrupts
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=29972

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: enable writeback (v2)
Alex Deucher [Fri, 27 Aug 2010 22:25:25 +0000 (18:25 -0400)]
drm/radeon/kms: enable writeback (v2)

When writeback is enabled, the GPU shadows writes to certain
registers into a buffer in memory.  The driver can then read
the values from the shadow rather than reading back from the
register across the bus.  Writeback can be disabled by setting
the no_wb module param to 1.

On r6xx/r7xx/evergreen, the following registers are shadowed:
- CP scratch registers
- CP read pointer
- IH write pointer
On r1xx-rr5xx, the following registers are shadowed:
- CP scratch registers
- CP read pointer

v2:
- Combine wb patches for r6xx-evergreen and r1xx-r5xx
- Writeback is disabled on AGP boards since it tends to be
unreliable on AGP using the gart.
- Check radeon_wb_init return values properly.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/radeon/kms: clean up r6xx/r7xx blit init (v2)
Alex Deucher [Sat, 7 Aug 2010 01:36:58 +0000 (21:36 -0400)]
drm/radeon/kms: clean up r6xx/r7xx blit init (v2)

Move common code to init function.

v2: make sure the bo is pinned after init as well.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Bump minor and driver date
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:09 +0000 (12:43 +0200)]
drm/vmwgfx: Bump minor and driver date

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Save at least one screen layout
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:08 +0000 (12:43 +0200)]
drm/vmwgfx: Save at least one screen layout

Save at least one screen layout during vga save to avoid odd things
happening during restore.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Add modinfo version
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:07 +0000 (12:43 +0200)]
drm/vmwgfx: Add modinfo version

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Add a parameter to get the max fb size
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:06 +0000 (12:43 +0200)]
drm/vmwgfx: Add a parameter to get the max fb size

This can be used by the X server to restrict mode resolutions and size of
root pixmap.

Bump minor to announce this availability.
Bump driver date.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Don't flush fb if we're in the suspended state.
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:05 +0000 (12:43 +0200)]
drm/vmwgfx: Don't flush fb if we're in the suspended state.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Prune modes based on available VRAM size
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:04 +0000 (12:43 +0200)]
drm/vmwgfx: Prune modes based on available VRAM size

This needs to be reviewed once we support screen objects and don't rely
on VRAM for the frame-buffer.

Also fix some integer overflow issues pointed out by Michel Daenzer.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Take the ttm lock around the dirty ioctl
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:03 +0000 (12:43 +0200)]
drm/vmwgfx: Take the ttm lock around the dirty ioctl

This makes sure noone accesses the fifo while it's taken down using the
dirty ioctl.
Also make sure all workqueues are idled before the fifo is taken down.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm: vmwgfx: Add a struct drm_file parameter to the dirty framebuffer callback
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:02 +0000 (12:43 +0200)]
drm: vmwgfx: Add a struct drm_file parameter to the dirty framebuffer callback

This is needed for the callback to identify the caller and take
appropriate locks if needed.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Add new-style PM hooks to improve hibernation behavior
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:01 +0000 (12:43 +0200)]
drm/vmwgfx: Add new-style PM hooks to improve hibernation behavior

Add the new-style PM hooks prepare and complete. This allows us to
power up the device again after the hibernation image has been created, and
display output will thus be active until the VM is finally powered off.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Fix ACPI S3 & S4 functionality.
Thomas Hellstrom [Tue, 5 Oct 2010 10:43:00 +0000 (12:43 +0200)]
drm/vmwgfx: Fix ACPI S3 & S4 functionality.

Don't suspend or hibernate when there are 3D resources active since we
can't restore the device's 3D state. Instead fail with an error message.

In other cases, make sure we re-enable the fifo and unlock ttm on resume.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agodrm/vmwgfx: Really support other depths than 32
Thomas Hellstrom [Tue, 5 Oct 2010 10:42:59 +0000 (12:42 +0200)]
drm/vmwgfx: Really support other depths than 32

Also add some sanity checks.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agoMerge remote branch 'korg/drm-fixes' into drm-vmware-next
Dave Airlie [Wed, 6 Oct 2010 01:10:48 +0000 (11:10 +1000)]
Merge remote branch 'korg/drm-fixes' into drm-vmware-next

necessary for some of the vmware fixes to be pushed in.

Conflicts:
drivers/gpu/drm/drm_gem.c
drivers/gpu/drm/i915/intel_fb.c
include/drm/drmP.h

14 years agoMerge remote branch 'intel/drm-intel-next' of ../drm-next into drm-core-next
Dave Airlie [Wed, 6 Oct 2010 00:11:56 +0000 (10:11 +1000)]
Merge remote branch 'intel/drm-intel-next' of ../drm-next into drm-core-next

* 'intel/drm-intel-next' of ../drm-next: (266 commits)
  drm/i915: Avoid circular locking from intel_fbdev_fini()
  drm/i915: mark display port DPMS state as 'ON' when enabling output
  drm/i915: Skip pread/pwrite if size to copy is 0.
  drm/i915: avoid struct mutex output_poll mutex lock loop on unload
  drm/i915: Rephrase pwrite bounds checking to avoid any potential overflow
  drm/i915: Sanity check pread/pwrite
  drm/i915: Use pipe state to tell when pipe is off
  drm/i915: vblank status not valid while training display port
  drivers/gpu/drm/i915/i915_gem.c: Add missing error handling code
  drm/i915: Don't mask the return code whilst relocating.
  drm/i915: If the GPU hangs twice within 5 seconds, declare it wedged.
  drm/i915: Only print 'generating error event' if we actually are
  drm/i915: Try to reset gen2 devices.
  drm/i915: Clear fence registers on GPU reset
  drm/i915: Force the domain to CPU on unbinding whilst wedged.
  drm: Move the GTT accounting to i915
  drm/i915: Fix refleak during eviction.
  i915: Added function to initialize VBT settings
  drm/i915: Remove redundant deletion of obj->gpu_write_list
  drm/i915: Make get/put pages static
  ...

14 years agodrm/ttm: restructure to allow driver to plug in alternate memory manager
Ben Skeggs [Thu, 5 Aug 2010 00:48:18 +0000 (10:48 +1000)]
drm/ttm: restructure to allow driver to plug in alternate memory manager

Nouveau will need this on GeForce 8 and up to account for the GPU
reordering physical VRAM for some memory types.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Acked-by: Thomas Hellström <thellstrom@vmware.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/ttm: introduce utility function to free an allocated memory node
Ben Skeggs [Wed, 4 Aug 2010 02:07:08 +0000 (12:07 +1000)]
drm/ttm: introduce utility function to free an allocated memory node

Existing core code/drivers call drm_mm_put_block on ttm_mem_reg.mm_node
directly.  Future patches will modify TTM behaviour in such a way that
ttm_mem_reg.mm_node doesn't necessarily belong to drm_mm.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Acked-by: Thomas Hellström <thellstrom@vmware.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: fix thinkos in mem timing table recordlen check
Roy Spliet [Mon, 4 Oct 2010 21:01:08 +0000 (23:01 +0200)]
drm/nouveau: fix thinkos in mem timing table recordlen check

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: parse voltage from perf 0x40 entires
Ben Skeggs [Mon, 4 Oct 2010 05:27:58 +0000 (15:27 +1000)]
drm/nouveau: parse voltage from perf 0x40 entires

This was disabled previously because of some uncertainty that +2 was
indeed the voltage.  It appears it is, checked on a NVA8 and a NVA3M.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: don't use the default pll limits in table v2.1 on nv50+ cards
Emil Velikov [Sun, 26 Sep 2010 19:26:02 +0000 (20:26 +0100)]
drm/nouveau: don't use the default pll limits in table v2.1 on nv50+ cards

This fixes issues bug 30370 and prevents another possible divide by zero on
the original nv50 cards, by returning -ENOENT

Signed-off-by: Emil Velikov <eeydev@nottingham.ac.uk>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nv50: Fix large 3D performance regression caused by the interchannel sync patches.
Francisco Jerez [Sat, 2 Oct 2010 15:04:46 +0000 (17:04 +0200)]
drm/nv50: Fix large 3D performance regression caused by the interchannel sync patches.

Reported-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Maarten Maathuis <madman2003@gmail.com>
Tested-by: Xavier Chantry <chantry.xavier@gmail.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: Synchronize buffer object moves in hardware.
Francisco Jerez [Tue, 21 Sep 2010 17:02:01 +0000 (19:02 +0200)]
drm/nouveau: Synchronize buffer object moves in hardware.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: Use semaphores to handle inter-channel sync in hardware.
Francisco Jerez [Tue, 21 Sep 2010 22:58:54 +0000 (00:58 +0200)]
drm/nouveau: Use semaphores to handle inter-channel sync in hardware.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: Provide a means to have arbitrary work run on fence completion.
Francisco Jerez [Tue, 21 Sep 2010 18:49:39 +0000 (20:49 +0200)]
drm/nouveau: Provide a means to have arbitrary work run on fence completion.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: Minor refactoring/cleanup of the fence code.
Francisco Jerez [Tue, 21 Sep 2010 16:57:11 +0000 (18:57 +0200)]
drm/nouveau: Minor refactoring/cleanup of the fence code.

Mainly to make room for inter-channel sync.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: Add a module option to force card POST.
Marcin Kościelnicki [Wed, 29 Sep 2010 11:15:01 +0000 (11:15 +0000)]
drm/nouveau: Add a module option to force card POST.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nv50: prevent (IB_PUT == IB_GET) for occurring unless idle
Ben Skeggs [Wed, 29 Sep 2010 23:09:42 +0000 (09:09 +1000)]
drm/nv50: prevent (IB_PUT == IB_GET) for occurring unless idle

Should fix a DMA race condition I've never seen myself, but could be
the culprit in some random hangs that have been reported.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD.
Francisco Jerez [Tue, 28 Sep 2010 18:47:58 +0000 (20:47 +0200)]
drm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD.

It's an unrelated PLL filtering control bit, leave it alone when
changing the CRTC-encoder binding.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nv30-nv40: Fix postdivider mask when writing engine/memory PLLs.
Francisco Jerez [Tue, 28 Sep 2010 01:22:15 +0000 (03:22 +0200)]
drm/nv30-nv40: Fix postdivider mask when writing engine/memory PLLs.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: Fix perf table parsing on BMP v5.25.
Francisco Jerez [Sun, 26 Sep 2010 15:33:50 +0000 (17:33 +0200)]
drm/nouveau: Fix perf table parsing on BMP v5.25.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: fix required mode bandwidth calculation for DP
Ben Skeggs [Tue, 28 Sep 2010 00:23:20 +0000 (10:23 +1000)]
drm/nouveau: fix required mode bandwidth calculation for DP

This should fix eDP on certain laptops with 18-bit panels, we were rejecting
the panel's native mode due to thinking there was insufficient bandwidth
for it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: fix typo in c2aa91afea5f7e7ae4530fabd37414a79c03328c
Ben Skeggs [Tue, 28 Sep 2010 00:03:57 +0000 (10:03 +1000)]
drm/nouveau: fix typo in c2aa91afea5f7e7ae4530fabd37414a79c03328c

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nva3: split pm backend out from nv50
Ben Skeggs [Mon, 27 Sep 2010 01:18:14 +0000 (11:18 +1000)]
drm/nva3: split pm backend out from nv50

This will end up quite different, it makes sense for it to be completely
separate.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: run perflvl and M table scripts on mem clock change
Ben Skeggs [Mon, 27 Sep 2010 00:13:23 +0000 (10:13 +1000)]
drm/nouveau: run perflvl and M table scripts on mem clock change

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: pass perflvl struct to clock_pre()
Ben Skeggs [Sun, 26 Sep 2010 23:47:56 +0000 (09:47 +1000)]
drm/nouveau: pass perflvl struct to clock_pre()

On certain boards, there's BIOS scripts and memory timings that need to
be modified with the memclk.  Just pass in the entire perflvl struct and
let the chipset-specific code decide what to do.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: enable enhanced framing only if DP display supports it
Ben Skeggs [Sun, 26 Sep 2010 22:29:33 +0000 (08:29 +1000)]
drm/nouveau: enable enhanced framing only if DP display supports it

Reported-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/nouveau: Import initial memory timing work
Roy Spliet [Fri, 17 Sep 2010 21:17:24 +0000 (23:17 +0200)]
drm/nouveau: Import initial memory timing work

This isn't correct everywhere yet, but since we don't use the data yet
it's perfectly safe to push in, and the information we gain from logs
will help to fix the remaining issues.

v2 (Ben Skeggs <bskeggs@redhat.com>):
- fixed up formatting
- free parsed timing info on takedown
- switched timing table printout to debug loglevel

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
14 years agodrm/i915: Avoid circular locking from intel_fbdev_fini()
Chris Wilson [Mon, 4 Oct 2010 14:33:04 +0000 (15:33 +0100)]
drm/i915: Avoid circular locking from intel_fbdev_fini()

lockdep spots that the fb_info->lock takes the dev->struct_mutex during
init (due to the device probing) and so we can not hold
dev->struct_mutex when unregistering the framebuffer. Simply reverse the
order of initialisation during cleanup and so do the intel_fbdev_fini()
before the intel_modeset_cleanup.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: mark display port DPMS state as 'ON' when enabling output
Keith Packard [Sun, 3 Oct 2010 20:33:49 +0000 (13:33 -0700)]
drm/i915: mark display port DPMS state as 'ON' when enabling output

The display port DPMS state is tracked internally in the display port
driver so that when a hotplug event comes along, the driver can know
whether to try retraining the link. This doesn't work well if the
driver never sets the DPMS state to ON when the output is enabled.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Skip pread/pwrite if size to copy is 0.
Chris Wilson [Sun, 26 Sep 2010 19:23:38 +0000 (20:23 +0100)]
drm/i915: Skip pread/pwrite if size to copy is 0.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agoMerge branch 'drm-intel-fixes' into drm-intel-next
Chris Wilson [Mon, 4 Oct 2010 09:07:38 +0000 (10:07 +0100)]
Merge branch 'drm-intel-fixes' into drm-intel-next

14 years agodrm/i915: avoid struct mutex output_poll mutex lock loop on unload
Keith Packard [Mon, 4 Oct 2010 02:36:26 +0000 (19:36 -0700)]
drm/i915: avoid struct mutex output_poll mutex lock loop on unload

Cancel the output polling work proc before acquiring the struct mutex
to avoid acquiring the work proc mutex with the struct mutex
held. This avoids inverting the lock order seen when the work proc
runs.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Rephrase pwrite bounds checking to avoid any potential overflow
Chris Wilson [Sun, 26 Sep 2010 19:21:44 +0000 (20:21 +0100)]
drm/i915: Rephrase pwrite bounds checking to avoid any potential overflow

... and do the same for pread.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
14 years agodrm/i915: Sanity check pread/pwrite
Chris Wilson [Sun, 26 Sep 2010 19:50:05 +0000 (20:50 +0100)]
drm/i915: Sanity check pread/pwrite

Move the access control up from the fast paths, which are no longer
universally taken first, up into the caller. This then duplicates some
sanity checking along the slow paths, but is much simpler.
Tracked as CVE-2010-2962.

Reported-by: Kees Cook <kees@ubuntu.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
14 years agoMerge branch 'drm-intel-fixes' into drm-intel-next
Chris Wilson [Sun, 3 Oct 2010 09:56:11 +0000 (10:56 +0100)]
Merge branch 'drm-intel-fixes' into drm-intel-next

Conflicts:
drivers/gpu/drm/i915/i915_gem_evict.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c

14 years agodrm/i915: Use pipe state to tell when pipe is off
Keith Packard [Sun, 3 Oct 2010 07:33:06 +0000 (00:33 -0700)]
drm/i915: Use pipe state to tell when pipe is off

Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.

Contrarywise, disabling the plane will not cause the display line
value to stop changing, so instead we wait for the vblank interrupt
bit to get set. And, we only do this when we're not about to wait for
the pipe to turn off.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: vblank status not valid while training display port
Keith Packard [Sun, 3 Oct 2010 07:33:05 +0000 (00:33 -0700)]
drm/i915: vblank status not valid while training display port

While the display port is in training mode, vblank interrupts don't
occur. Because we have to wait for the display port output to turn on
before starting the training sequence, enable the output in 'normal'
mode so that we can tell when a vblank has occurred, then start the
training sequence.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrivers/gpu/drm/i915/i915_gem.c: Add missing error handling code
Julia Lawall [Sat, 2 Oct 2010 13:59:17 +0000 (15:59 +0200)]
drivers/gpu/drm/i915/i915_gem.c: Add missing error handling code

Extend the error handling code with operations found in other nearby error
handling code

A simplified version of the sematic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@r exists@
@r@
statement S1,S2,S3;
constant C1,C2,C3;
@@

*if (...)
 {... S1 return -C1;}
...
*if (...)
 {... when != S1
    return -C2;}
...
*if (...)
 {... S1 return -C3;}
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
14 years agodrm/i915: Don't mask the return code whilst relocating.
Chris Wilson [Sat, 2 Oct 2010 14:12:41 +0000 (15:12 +0100)]
drm/i915: Don't mask the return code whilst relocating.

The return from move_to_gtt_domain() may indicate a pending signal which
needs to handled as opposed to an actual error, for instance, so report
the original return value rather than forcing an EINVAL.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: If the GPU hangs twice within 5 seconds, declare it wedged.
Chris Wilson [Fri, 1 Oct 2010 13:57:56 +0000 (14:57 +0100)]
drm/i915: If the GPU hangs twice within 5 seconds, declare it wedged.

The issue is that we may become stuck executing a long running shader
and continually attempt to reset the GPU. (Or maybe we tickle some bug
and need to break the vicious cycle.) So if we are detect a second hang
within 5 seconds, give up trying to programme the GPU and report it
wedged.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Only print 'generating error event' if we actually are
Chris Wilson [Fri, 1 Oct 2010 12:23:27 +0000 (13:23 +0100)]
drm/i915: Only print 'generating error event' if we actually are

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Try to reset gen2 devices.
Chris Wilson [Fri, 1 Oct 2010 11:05:06 +0000 (12:05 +0100)]
drm/i915: Try to reset gen2 devices.

So far only found registers for i830, i845, i865 and one of those has no
effect on i865!

At this moment in time, attempting to reset i8xx is a little
optimistic...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Clear fence registers on GPU reset
Chris Wilson [Thu, 30 Sep 2010 15:53:18 +0000 (16:53 +0100)]
drm/i915: Clear fence registers on GPU reset

When the GPU is reset, the fence registers are invalidated, so release
the objects and clear them out.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm/i915: Force the domain to CPU on unbinding whilst wedged.
Chris Wilson [Thu, 30 Sep 2010 14:08:57 +0000 (15:08 +0100)]
drm/i915: Force the domain to CPU on unbinding whilst wedged.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30083
Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
14 years agodrm: Move the GTT accounting to i915
Chris Wilson [Thu, 30 Sep 2010 10:46:12 +0000 (11:46 +0100)]
drm: Move the GTT accounting to i915

Only drm/i915 does the bookkeeping that makes the information useful,
and the information maintained is driver specific, so move it out of the
core and into its single user.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Airlie <airlied@redhat.com>
14 years agovmwgfx: Fix fb VRAM pinning failure due to fragmentation
Thomas Hellstrom [Fri, 1 Oct 2010 08:21:51 +0000 (10:21 +0200)]
vmwgfx: Fix fb VRAM pinning failure due to fragmentation

If the soon-to-be scanout buffer is partly covering the intended
VRAM region, move and pin will fail. In that case, just move it out
to system before attempting to move it in again.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
14 years agovmwgfx: Remove initialisation of dev::devname
Thomas Hellstrom [Fri, 1 Oct 2010 08:21:50 +0000 (10:21 +0200)]
vmwgfx: Remove initialisation of dev::devname

The removed code causes oopses with newer drms on master drop.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>