The BeagleBone Black differs from the other AM335x boards in a few
significant ways, so it makes sense to create a custom configuration
for it. In particular, it uses eMMC instead of NAND flash.
Some boards, such as the BeagleBone Black, have an eMMC chip intstead
of NAND. We can use the eMMC boot partition to store the environment,
since it isn't used for anything else. This allows us to have a
configurable environment on those boards.
Many modern U-Boot ports enable command line editing and
a history buffer. The am335x_evm configuration is fairly
comprehensive as it is, so a few extra kb should not be
noticable, and it adds a very convenient feature.
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
Steve Kipisz [Thu, 18 Jul 2013 19:13:04 +0000 (15:13 -0400)]
am335x_evm: Add support to boot from NOR.
NOR requires that s_init be within the first 4KiB of the image so that
we can perform the rest of the required pinmuxing to talk with the rest
of NOR that we are found on. When NOR_BOOT is set we save our
environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid
using SPL for this case and u-boot.bin is written directly to the start
of NOR.
We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c
with TI81xx checks as at this time U-Boot does not discard unused
sections in the main build and this code relies on functions specific to
(and only provided in) ti81xx-related code.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
Steve Kipisz [Thu, 18 Jul 2013 19:13:03 +0000 (15:13 -0400)]
am335x_evm: Add support for the NOR module on the memory cape
This patch adds support for the NOR module that attaches
to the memory cape for a Beaglebone board. This does not
add booting support; only support so that you can boot from
SD/MMC and see the NOR module so that it can be programmed.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Clean up config changes slightly] Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 18 Jul 2013 19:13:02 +0000 (15:13 -0400)]
am33xx: Correct gpmc_cfg->irqstatus/enable
Based on our usage of the GPMC, either with NOR or NAND we do not need
to be setting the irqstatus or irqenable bits and should clear them like
we have historically.
Tom Rini [Thu, 18 Jul 2013 19:13:01 +0000 (15:13 -0400)]
am335x_evm: Rework board_is_foo() checks
We rework the various board_is_foo() checks to take a pointer to
struct am335x_baseboard_id rather than using a local copy in board.c.
This allows us to make use of the same checks in mux.c as well as fixing
problems when this code could be running from read-only memory.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 18 Jul 2013 19:12:59 +0000 (15:12 -0400)]
am335x_evm: Update SPI_BOOT support, add MTDPARTS info
- Style cleanup (# define -> #define)
- Due to ROM issues, redudant loading isn't feasible, so drop.
- Given extra space, increase max size of U-Boot to 512KiB
- Correct env size to match usage (we had not re-defined ENV_SIZE).
- Given extra space, keep env size as 128KiB, add redundant environment.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Tom Rini <trini@ti.com>
Robert Winkler [Tue, 23 Jul 2013 22:07:56 +0000 (15:07 -0700)]
imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
A little background is probably appropriate for this patch.
Since "the beginning" of usage of the SABRE Lite and Nitrogen6x
boards, DVI detection has been somewhat broken.
Some (most) DVI monitors don't produce the "HPD" bit in
the PHY_STAT0 register, but do show proper toggling of the
RX_SENSE0..3 bits.
Creating a new the bit-mask to include all five bits and
modifying the 'hdmidet' command and internal detection
routines allows these monitors to function properly in U-Boot.
omap3_beagle: support booting from zImage and device tree as last option
If no other bootoption works, try loading up device tree and zImage.
This is selected as the last option to allow backward compatibility as
well as support the recent trend in moving kernel boot to using zImage
and device tree.
NOTE: if uImage is present in bootpart, it will try this first and
will assume this is to be booted with bootm (so may be concatenated
image or plain vanilla ATAG MACHINE_ID based image)
omap3_beagle: enable CMD_FS_GENERIC and simplify load of image/ramdisk
CMD_FS_GENERIC allows us to simplify where we load up our image from
either from ext2/fat etc. So, lets use that instead of cumbersome
options we currently use. Sticking with existing conventions,
defaults will be:
ramdisk=ramdisk.gz
bootpart=0:2 (second partition)
bootdir=/boot (/boot in second partition)
This matches with the default behavior, these can be overriden by
env files as needed.
beagleboard: remove RevB support for BeagleBoard Xm
As reported in http://marc.info/?l=u-boot&m=137358037827735&w=2
There is no need for the "xMB" variant, as the gpio pins used for
identification where never changed from the xMA when the newer silcon
was used for the xMB, So rename XM A revision as AB revision
and report accordingly
Reported-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Nishanth Menon <nm@ti.com>
We do not use JFFS2 by default and it conflicts with
CONFIG_CMD_FS_GENERIC (ls command is the same). Since most of our
BOOTCMD can be simplified by using the FS_GENERIC, dropping JFFS2
Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Joel Fernandes <joelf@ti.com>
Tom Rini [Mon, 8 Jul 2013 16:15:17 +0000 (12:15 -0400)]
am335x_evm: Correct CONFIG_CMD_SPL_WRITE_SIZE
We use CONFIG_CMD_SPL_WRITE_SIZE when reading/writing the args portion
of falcon mode to NAND. Previously it was half the size of the
eraseblock which is too small, increase to eraseblock size.
Tom Rini [Mon, 8 Jul 2013 16:15:16 +0000 (12:15 -0400)]
am335x_evm: Update eMMC falcon mode locations
The previous location used for the "args" portion of falcon mode was too
small to allow for a device tree to be saved there, so move the location
slightly and increase the size. In addition, our previous kernel
location was part of the area we set aside for U-Boot itself, so move it
up a bit higher.
Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Tom Rini [Mon, 8 Jul 2013 16:15:15 +0000 (12:15 -0400)]
am335x_evm: Correct DFU ALT settings for falcon mode
Now that we have falcon mode enabled, the partiton numbers for NAND have
changed, and we need to list entries for updating these parts of the
system. While adding falcon mode entires for eMMC (raw), we round up
the limit on U-Boot for ease of math later.
Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Tom Rini [Fri, 28 Jun 2013 18:43:01 +0000 (14:43 -0400)]
spl_mmc.c: Detect missing kernel image in RAW MMC
Currently, we assume that if we can read from MMC correctly, we have
found a valid image. This is not the case as an empty area will read
just fine. Add a check for a valid IH_MAGIC.
Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Christian Riesch [Fri, 14 Jun 2013 12:22:36 +0000 (14:22 +0200)]
da850evm: Use clrbits function with correct endianess
The current code uses clrbits_be32 which is incorrect since we are on
a little endian machine here. This patch fixes this issue and also removes
some unnecessary code: Reading the current GPIO bank state is not required
if we are using the SET and CLEAR GPIO registers for setting/clearing
bits.
mx6qsabrelite: Remove mx6qsabrelite code in favor of nitrogen6x
mx6qsabrelite and nitrogen6q boards are hardware compatible, so let's avoid the
code duplication and only use the nitrogen6x source code to make board code
maintainance easier.
Tested booting a mainline device tree kernel on a mx6qsabrelite board.
socfpga: Move board/socfpga_cyclone5 to board/socfpga
Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com>
v2:
- Add Reviewed-by: Pavel Machek
- Cc: Tom Rini
ken kuo [Wed, 24 Jul 2013 18:17:11 +0000 (02:17 +0800)]
nds32: Enable FPU if the version of CPU supported
Some version of Andes core support FPU coprocessor,
if this is the case, and toolchain support FPU instruction set,
we should enable it at low level initialization time.
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
Rob Herring [Thu, 13 Jun 2013 03:24:52 +0000 (22:24 -0500)]
ARM: highbank: setup peripherals based on power domain status
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:50 +0000 (22:24 -0500)]
ARM: highbank: avoid bss write in timer_init
The timer_init function is called before relocation and writes to bss data
were corrupting relocation data. Fix this by removing the call to
reset_timer_masked. The initial timer count should be 0 or near 0 anyway,
so initializing the variables are not needed.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:47 +0000 (22:24 -0500)]
ARM: highbank: update config options
Various changes to highbank config:
Enable EFI partitions
Enable ext4 and FAT filesystems
Enable bootz command and raw initrd
Increase cmd and print buffer size to 1K
Change serial baudrate to 115200
Enable hush shell
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:45 +0000 (22:24 -0500)]
ARM: move interrupt_init to before relocation
interrupt_init also sets up the abort stack, but is not setup before
relocation. So any aborts during relocation will hang and not print out
any useful information. Fix this by moving the interrupt_init to after
the stack setup in board_init_f.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Checking mips32/time.c with checkpatch.pl shows this:
arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters
arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required
total: 1 errors, 1 warnings, 0 checks, 85 lines checked
Fix the code to make checkpatch.pl happy.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:44 +0000 (03:57 +0000)]
MIPS: qemu-malta: bring up ethernet
Qemu emulates a PCNET PCI card for the Malta CoreLV board.
Enable the pcnet driver and add board specific ethernet
initialization function to bring it up. Also enable the
CONFIG_CMD_NET and CONFIG_CMD_PING options.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:46 +0000 (03:57 +0000)]
MIPS: start.S: emulate REVISION register for qemu-malta
On the origial Malta boards the REVISION register is
accessible at the 0x1fc00010 address. The contents of
this register gives information about the revision
of the Malta and Core Boards.
This register is used by the Linux kernel to identify
the actual board it is running on. However the register
is not emulated properly by Qemu, so put a hardcoded
value into the flash to make Linux work.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:43 +0000 (03:57 +0000)]
net: pcnet: use pci_virt_to_mem to obtain buffer addresses
The pcnet driver uses the pci_phys_to_mem function
to get the memory address of the DMA buffers. This
This assumes an 1:1 mapping between the PCI and
physical memory which is not true on all platforms.
On MIPS platform U-Boot is running within a mapped
memory region, and the pci_phys_to_mem macro can't
be used to obtain the memory address of the buffers.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>