Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux into next
Freescale updates from Scott:
"Highlights include 64-bit book3e kexec/kdump support, a rework of the
qoriq clock driver, device tree changes including qoriq fman nodes,
support for a new 85xx board, and some fixes.
Note that there is a trivial merge conflict with the clock tree's next
branch, in the clock Makefile."
Nathan Fontenot [Tue, 27 Oct 2015 15:46:47 +0000 (10:46 -0500)]
powerpc/pseries: Correct string length in pseries_of_derive_parent()
Commit a030e1e4bbd085bbcfd0a23f8d355fcd41f39bed make a change to use
kstrndup() instead of kmalloc() + strlcpy() in the pseries_of_derive_parent()
routine that introduces a subtle change in the parent path name generated.
The kstrndup() routine will copy n characters followed by a terminating null,
whereas strlcpy() will copy n-1 characters and add a terminating null.
This slight difference results in having a parent path that includes the
tailing '/' character, "/cpus/" vs. "/cpus". This then causes the subsequent
call to of_find_node_by_path() to fail, and in the case of DLPAR add
operations the DLPAR request fails.
This patch decrements the pointer returned from kbasename() to point to the
'/' character before the base name instead of the base name. This then
adjusts the string length calculations to not include the trailing '/'
in the parent path name.
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Kevin Hao [Thu, 22 Oct 2015 12:23:48 +0000 (20:23 +0800)]
powerpc/e6500: hw tablewalk: make sure we invalidate and write to the same tlb entry
In order to workaround Erratum A-008139, we have to invalidate the
tlb entry with tlbilx before overwriting. Due to the performance
consideration, we don't add any memory barrier when acquire/release
the tcd lock. This means the two load instructions for esel_next do
have the possibility to return different value. This is definitely
not acceptable due to the Erratum A-008139. We have two options to
fix this issue:
a) Add memory barrier when acquire/release tcd lock to order the
load/store to esel_next.
b) Just make sure to invalidate and write to the same tlb entry and
tolerate the race that we may get the wrong value and overwrite
the tlb entry just updated by the other thread.
We observe better performance using option b. So reserve an additional
register to save the value of the esel_next.
Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Tue, 27 Oct 2015 22:41:16 +0000 (17:41 -0500)]
powerpc/fsl: Add #clock-cells and clockgen label to clockgen nodes
This allows new-style clock references to be used, which is needed for
fman. The old clock nodes will be removed and all clock references
converted to new-style once the qoriq-cpufreq driver is updated to stop
depending on the old-style references in cpu nodes.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Tue, 27 Oct 2015 23:14:16 +0000 (18:14 -0500)]
Merge branch 'clock' into HEAD
This is a major overhaul of the clk-qoriq driver, which I'm merging
via PPC with Stephen Boyd's ack in order to apply subsequent PPC patches
that depend on it.
powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake
mpic_irq_set_wake return -ENXIO for non FSL MPIC and sets IRQF_NO_SUSPEND
flag for FSL ones. enable_irq_wake already returns -ENXIO if irq_set_wak
is not implemented. Also there's no need to set the IRQF_NO_SUSPEND flag
as it doesn't guarantee wakeup for that interrupt.
This patch removes the redundant mpic_irq_set_wake and sets the
IRQCHIP_SKIP_SET_WAKE for only FSL MPIC.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Scott Wood <scottwood@freescale.com> Cc: Hongtao Jia <hongtao.jia@freescale.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 7 Oct 2015 03:48:20 +0000 (22:48 -0500)]
powerpc/booke: Only use VIRT_PHYS_OFFSET on booke32
The way VIRT_PHYS_OFFSET is not correct on book3e-64, because
it does not account for CONFIG_RELOCATABLE other than via the
32-bit-only virt_phys_offset.
book3e-64 can (and if the comment about a GCC miscompilation is still
relevant, should) use the normal ppc64 __va/__pa.
At this point, only booke-32 will use VIRT_PHYS_OFFSET, so given the
issues with its calculation, restrict its definition to booke-32.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 7 Oct 2015 03:48:19 +0000 (22:48 -0500)]
powerpc/book3e-64/kexec: Enable SMP release
The SMP release mechanism for FSL book3e is different from when booting
with normal hardware. In theory we could simulate the normal spin
table mechanism, but not at the addresses U-Boot put in the device tree
-- so there'd need to be even more communication between the kernel and
kexec to set that up. Instead, kexec-tools will set a boolean property
linux,booted-from-kexec in the /chosen node.
Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: devicetree@vger.kernel.org
Tiejun Chen [Wed, 7 Oct 2015 03:48:18 +0000 (22:48 -0500)]
powerpc/book3e-64/kexec: create an identity TLB mapping
book3e has no real MMU mode so we have to create an identity TLB
mapping to make sure we can access the real physical address.
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
[scottwood: cleanup, and split off some changes] Signed-off-by: Scott Wood <scottwood@freescale.com>
Tiejun Chen [Wed, 7 Oct 2015 03:48:15 +0000 (22:48 -0500)]
powerpc/book3e: support CONFIG_RELOCATABLE
book3e is different with book3s since 3s includes the exception
vectors code in head_64.S as it relies on absolute addressing
which is only possible within this compilation unit. So we have
to get that label address with got.
And when boot a relocated kernel, we should reset ipvr properly again
after .relocate.
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
[scottwood: cleanup and ifdef removal] Signed-off-by: Scott Wood <scottwood@freescale.com>
Tiejun Chen [Wed, 7 Oct 2015 03:48:14 +0000 (22:48 -0500)]
powerpc/booke64: Fix args to copy_and_flush
Convert r4/r5, not r6, to a virtual address when calling
copy_and_flush. Otherwise, r3 is already virtual, and copy_to_flush
tries to access r3+r6, PAGE_OFFSET gets added twice.
This isn't normally seen because on book3e we normally enter with
the kernel at zero and thus skip copy_to_flush -- but it will be
needed for kexec support.
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
[scottwood: split patch and rewrote changelog] Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 7 Oct 2015 03:48:10 +0000 (22:48 -0500)]
powerpc/fsl-booke-64: Don't limit ppc64_rma_size to one TLB entry
This is required for kdump to work when loaded at at an address that
does not fall within the first TLB entry -- which can easily happen
because while the lower limit is enforced via reserved memory, which
doesn't affect how much is mapped, the upper limit is enforced via a
different mechanism that does. Thus, more TLB entries are needed than
would normally be used, as the total memory to be mapped might not be a
power of two.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 7 Oct 2015 03:48:09 +0000 (22:48 -0500)]
powerpc/85xx: Load all early TLB entries at once
Use an AS=1 trampoline TLB entry to allow all normal TLB1 entries to
be loaded at once. This avoids the need to keep the translation that
code is executing from in the same TLB entry in the final TLB
configuration as during early boot, which in turn is helpful for
relocatable kernels (e.g. kdump) where the kernel is not running from
what would be the first TLB entry.
On e6500, we limit map_mem_in_cams() to the primary hwthread of a
core (the boot cpu is always considered primary, as a kdump kernel
can be entered on any cpu). Each TLB only needs to be set up once,
and when we do, we don't want another thread to be running when we
create a temporary trampoline TLB1 entry.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Sun, 20 Sep 2015 04:29:55 +0000 (23:29 -0500)]
clk: qoriq: Add ls2080a support.
LS2080A is the first implementation of the chassis 3 clockgen, which
has a different register layout than previous chips. It is also little
endian, unlike previous chips.
Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Scott Wood [Sun, 20 Sep 2015 04:29:54 +0000 (23:29 -0500)]
clk: qoriq: Move chip-specific knowledge into driver
The device tree should describe the chips (or chip-like subblocks) in
the system, but it generally does not describe individual registers --
it should identify, rather than describe, a programming interface.
This has not been the case with the QorIQ clockgen nodes. The
knowledge of what each bit setting of CLKCnCSR means is encoded in
three places (binding, pll node, and mux node), and the last also needs
to know which options are valid on a particular chip. All three of
these locations are considered stable ABI, making it difficult to fix
mistakes (of which I have found several), much less refactor the
abstraction to be able to address problems, limitations, or new chips.
Under the current binding, a pll clock specifier of 2 means that the
PLL is divided by 4 -- and the driver implements this, unless there
happen to be four clock-output-names rather than 3, in which case it
interprets it as PLL divided by 3. This does not appear in the binding
documentation at all. That hack is now considered stable ABI.
The current device tree nodes contain errors, such as saying that
T1040 can set a core clock to PLL/4 when only PLL and PLL/2 are options.
The current binding also ignores some restrictions on clock selection,
such as p5020's requirement that if a core uses the "wrong" PLL, that
PLL must be clocked lower than the "correct" PLL and be at most 80% of
the rated CPU frequency.
Possibly because of the lack of the ability to express such nuance in
the binding, some valid options are omitted from the device trees, such
as the ability on p4080 to run cores 0-3 from PLL3 and cores 4-7 from
PLL1 (again, only if they are at most 80% of rated CPU frequency).
This omission, combined with excessive caution in the cpufreq driver
(addressed in a subsequent patch), means that currently on a 1500 MHz
p4080 with typical PLL configuration, cpufreq can lower the frequency
to 1200 MHz on half the CPUs and do nothing on the others. With this
patchset, all CPUs can be lowered to 1200 MHz on a rev2 p4080, and on a
rev3 p4080 half can be lowered to 750 MHz and the other half to 600
MHz.
The current binding only deals with CPU clocks. To describe FMan in
the device tree, we need to describe its clock. Some chips have
additional muxes that work like the CPU muxes, but are not described in
the device tree. Others require inspecting the Reset Control Word to
determine which PLL is used. Rather than continue to extend this mess,
replace it. Have the driver bind to the chip-specific clockgen
compatible, and keep the detailed description of quirky chip variations
in the driver, where it can be easily fixed, refactored, and extended.
Older device trees will continue to work (including a workaround for
old ls1021a device trees that are missing compatible and reg in the
clockgen node, which even the old binding required). The pll/mux
details in old device trees will be ignored, but "clocks" properties
pointing at the old nodes will still work, and be directed at the
corresponding new clock.
Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Gavin Shan [Thu, 15 Oct 2015 04:22:35 +0000 (15:22 +1100)]
powerpc/eeh: Fix recursive fenced PHB on Broadcom shiner adapter
Similar to commit b6541db ("powerpc/eeh: Block PCI config access
upon frozen PE"), this blocks the PCI config space of Broadcom
Shiner adapter until PE reset is completed, to avoid recursive
fenced PHB when dumping PCI config registers during the period
of error recovery.
Gavin Shan [Thu, 8 Oct 2015 03:58:58 +0000 (14:58 +1100)]
powerpc/powernv: Remove pnv_eeh_cap_start()
This moves the logic of pnv_eeh_cap_start() to pnv_eeh_find_cap()
as the function is only called by pnv_eeh_find_cap(). The logic
of both functions are pretty simple. No need to have separate
functions.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Gavin Shan [Thu, 8 Oct 2015 03:58:56 +0000 (14:58 +1100)]
powerpc/pseries: Cleanup on pseries_eeh_get_state()
This cleans up pseries_eeh_get_state(), no functional changes:
* Return EEH_STATE_NOT_SUPPORT early when the 2nd RTAS output
argument is zero to avoid nested if statements.
* Skip clearing bits in the PE state represented by variable
"result" to simplify the code.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Gavin Shan [Thu, 8 Oct 2015 03:58:55 +0000 (14:58 +1100)]
powerpc/eeh: More relaxed condition for enabled IO path
When one or both of the below two flags are marked in the PE state, the
PE's IO path is regarded as enabled: EEH_STATE_MMIO_ACTIVE or
EEH_STATE_MMIO_ENABLED.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Gavin Shan [Thu, 8 Oct 2015 03:58:54 +0000 (14:58 +1100)]
powerpc/eeh: Force reset on fenced PHB
On fenced PHB, the error handlers in the drivers of its subordinate
devices could return PCI_ERS_RESULT_CAN_RECOVER, indicating no reset
will be issued during the recovery. It's conflicting with the fact
that fenced PHB won't be recovered without reset.
This limits the return value from the error handlers in the drivers
of the fenced PHB's subordinate devices to PCI_ERS_RESULT_NEED_NONE
or PCI_ERS_RESULT_NEED_RESET, to ensure reset will be issued during
recovery.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Daniel Axtens <dja@axtens.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Gavin Shan [Thu, 8 Oct 2015 03:58:53 +0000 (14:58 +1100)]
powerpc/eeh: More relaxed hotplug criterion
Currently, we rely on the existence of struct pci_driver::err_handler
to decide if the corresponding PCI device should be unplugged during
EEH recovery (partially hotplug case). However that check is not
sufficient. Some device drivers implement only some of the EEH error
handlers to collect diag-data. That means the driver still expects a
hotplug to recover from the EEH error.
This makes the hotplug criterion more relaxed: if the device driver
doesn't provide all necessary EEH error handlers, it will experience
hotplug during EEH recovery.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
[mpe: Minor change log rewording] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Gavin Shan [Thu, 8 Oct 2015 03:58:52 +0000 (14:58 +1100)]
powerpc/eeh: Don't unfreeze PHB PE after reset
On PowerNV platform, the PE is kept in frozen state until the PE
reset is completed to avoid recursive EEH error caused by MMIO
access during the period of EEH reset. The PE's frozen state is
cleared after BARs of PCI device included in the PE are restored
and enabled. However, we needn't clear the frozen state for PHB PE
explicitly at this point as there is no real PE for PHB PE. As the
PHB PE is always binding with PE#0, we actually clear PE#0, which
is wrong. It doesn't incur any problem though.
This checks if the PE is PHB PE and doesn't clear the frozen state
if it is.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/prom: Avoid reference to potentially freed memory
of_get_property() is used inside the loop, but then the reference to the
node is dropped before dereferencing the prop pointer, which could by then
point to junk if the node has been freed.
Instead use of_property_read_u32() to actually read the property
value before dropping the reference.
of_property_read_u32() requires at least one cell (u32) to be present,
which is stricter than the old logic which would happily dereference a
property of any size. However we believe all device trees in the wild
have at least one cell.
Skiboot may produce memory nodes with more than one cell, but that is
OK, of_property_read_u32() will return the first one.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
[mpe: Expand change log with device tree details] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Michael Ellerman [Tue, 13 Oct 2015 08:17:07 +0000 (19:17 +1100)]
powerpc/cell: Drop CONFIG_TUNE_CELL in favour of CONFIG_CELL_CPU
The TUNE_CELL option allows you to build a kernel that runs on multiple
CPUs but is tuned (ie. optimised) to run on Cell CPUs. Now days no one
is building a distro in that fashion, and any users who are building
custom kernels for their Cell machines are better off building with
CONFIG_CELL_CPU, which builds a kernel that only runs on Cell and
therefore can be optimised even more aggresively.
Dropping the option also avoids confusing other users, who are presented
with an option to tune for Cell when they are not building for a Cell
CPU at all.
Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Scott Wood [Wed, 7 Oct 2015 03:48:08 +0000 (22:48 -0500)]
powerpc/fsl_pci: Don't set up inbound windows in kdump crash kernel
Otherwise, because the top end of the crash kernel is treated as the
absolute top of memory rather than the beginning of a reserved region,
in-flight DMA from the previous kernel that targets areas above the
crash kernel can trigger a storm of PCI errors. We only do this for
kdump, not normal kexec, in case kexec is being used to upgrade to a
kernel that wants a different inbound memory map.
Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Mingkai Hu <Mingkai.hu@freescale.com>
Scott Wood [Wed, 7 Oct 2015 03:48:07 +0000 (22:48 -0500)]
powerpc/85xx: Don't use generic timebase sync on 64-bit
85xx currently uses the generic timebase sync mechanism when
CONFIG_KEXEC is enabled, because 32-bit 85xx kexec support does a hard
reset of each core. 64-bit 85xx kexec does not do this, so we neither
need nor want this (nor is the generic timebase sync code built on
ppc64).
FWIW, I don't like the fact that the hard reset is done on 32-bit
kexec, and I especially don't like the timebase sync being triggered
only on the presence of CONFIG_KEXEC rather than actually booting in
that environment, but that's beyond the scope of this patch...
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 7 Oct 2015 03:48:06 +0000 (22:48 -0500)]
powerpc/fsl-corenet: Disable coreint if kexec is enabled
Problems have been observed in coreint (EPR) mode if interrupts are
left pending (due to the lack of device quiescence with kdump) after
having tried to deliver to a CPU but unable to deliver due to MSR[EE]
-- interrupts no longer get reliably delivered in the new kernel. I
tried various ways of fixing it up inside the crash kernel itself, and
none worked (including resetting the entire mpic). Masking all
interrupts and issuing EOIs in the crashing kernel did help a lot of
the time, but the behavior was not consistent.
Thus, stick to standard IACK mode when kdump is a possibility.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 7 Oct 2015 03:48:05 +0000 (22:48 -0500)]
powerpc/fsl-booke-64: Allow booting from the secondary thread
This allows SMP kernels to work as kdump crash kernels. While crash
kernels don't really need to be SMP, this prevents things from breaking
if a user does it anyway (which is not something you want to only find
out once the main kernel has crashed in the field, especially if
whether it works or not depends on which cpu crashed).
Signed-off-by: Scott Wood <scottwood@freescale.com>
To make provision for more than one L2 caches in the system, change the
name from L2 to L2_1; same as in T4 platforms.
* Also remove the L2 entry from common file
"arch/powerpc/boot/dts/fsl/b4si-post.dtsi"
Keep them only in separate files for b4860 and b4420.
powerpc/fsl: Move Freescale device tree files into fsl folder
It makes no sense that some Freescale device tree files are in fsl
directory while some others not. This patch move Freescale device tree
files into fsl folder. To do that the following two steps are made:
- Move Freescale device tree files into fsl folder.
- Update the include path in these files from "fsl/*.dtsi" to "*.dtsi".
Please add "fsl/" prefix when you make dtb using Makefile.
Andy Fleming [Wed, 2 Sep 2015 18:07:58 +0000 (13:07 -0500)]
powerpc/85xx: Add support for Varisys Cyrus board
This board uses a P5020 chip, and boots just fine using
the corenet_generic code. The device tree is very similar to the
P5020DS, except that there is no Flash memory. The environment is,
instead, stored on an MMC card on the motherboard.
Signed-off-by: Andy Fleming <afleming@gmail.com>
[scottwood: fixed trailing whitespace] Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Mon, 24 Aug 2015 16:43:03 +0000 (11:43 -0500)]
powerpc/fsl_pci: Check for get_user/probe_kernel_address failure
Signed-off-by: Scott Wood <scottwood@freescale.com> Reported-by: Andrew Morton <akpm@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Hongtao Jia <hongtao.jia@freescale.com>
powerpc/dts: don't fall back to fsl,pq3-gpio for fsl,mpc8572-gpio
While the handling of fsl,pq3-gpio and fsl,mpc8572-gpio is done in the
same driver and the two hardly differ, the latter controller needs a
workaround for an erratum in the gpio_get callback. To make this
difference more explicit remove fsl,pq3-gpio from the list of
compatibles for mpc8572 machines.
Yangbo Lu [Wed, 29 Jul 2015 07:12:38 +0000 (15:12 +0800)]
powerpc/dts: Add and fix 1588 timer node for eTSEC
Add 1588 timer node in files:
arch/powerpc/boot/dts/bsc9131rdb.dtsi
arch/powerpc/boot/dts/bsc9132qds.dtsi
arch/powerpc/boot/dts/p1010rdb.dtsi
arch/powerpc/boot/dts/p1020rdb-pd.dts
arch/powerpc/boot/dts/p1021rdb-pc.dtsi
arch/powerpc/boot/dts/p1022ds.dtsi
arch/powerpc/boot/dts/p1025twr.dtsi
For P2020RDB-PC, registers' values should be calculated
based on default 1588 reference clock(300MHz) not 250MHz,
and fix this in file:
arch/powerpc/boot/dts/p2020rdb-pc.dtsi
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Michael Ellerman [Wed, 14 Oct 2015 05:58:36 +0000 (16:58 +1100)]
powerpc/xmon: Add some more elements to the existing PACA dump list
This patch adds a set of new elements to the existing PACA dump list
inside an xmon session which can be listed below improving the overall
xmon debug support.
With this patch, a typical xmon PACA dump looks something like this.
Sam bobroff [Thu, 8 Oct 2015 00:50:23 +0000 (11:50 +1100)]
powerpc/xmon: Paged output for paca display
The paca display is already more than 24 lines, which can be problematic
if you have an old school 80x24 terminal, or more likely you are on a
virtual terminal which does not scroll for whatever reason.
This patch adds a new command "#", which takes a single (hex) numeric
argument: lines per page. It will cause the output of "dp" and "dpa"
to be broken into pages, if necessary.
Paul Gortmaker [Tue, 13 Oct 2015 23:20:51 +0000 (19:20 -0400)]
powerpc: Delete old orphaned PrPMC 280/2800 DTS and boot file.
In commit 3c8464a9b12bf83807b6e2c896d7e7b633e1cae7 ("powerpc:
Delete old PrPMC 280/2800 support") we got rid of most of the C
code, and the Makefile/Kconfig hooks, but it seems I left the
platform's DTS file orphaned in the tree as well as the boot code.
Here we get rid of them both.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
.exit.text is discarded at run time and there are some references from
that to .exit.data, so we need to discard .exit.data at run time as well.
Fixes these errors:
`.exit.data' referenced in section `.exit.text' of drivers/built-in.o: defined in discarded section `.exit.data' of drivers/built-in.o
`.exit.data' referenced in section `.exit.text' of drivers/built-in.o: defined in discarded section `.exit.data' of drivers/built-in.o
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Andrew Donnellan [Tue, 13 Oct 2015 04:09:44 +0000 (15:09 +1100)]
cxl: Free virtual PHB when removing
When adding a vPHB in cxl_pci_vphb_add(), we allocate a pci_controller
struct using pcibios_alloc_controller(). However, we don't free it in
cxl_pci_vphb_remove(), causing a leak.
Call pcibios_free_controller() in cxl_pci_vphb_remove() to free the vPHB
data structure correctly.
Signed-off-by: Daniel Axtens <dja@axtens.net> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Sam bobroff [Tue, 13 Oct 2015 01:49:28 +0000 (12:49 +1100)]
powerpc: Individual System V IPC system calls
This patch provides individual system call numbers for the following
System V IPC system calls, on PowerPC, so that they do not need to be
multiplexed:
* semop, semget, semctl, semtimedop
* msgsnd, msgrcv, msgget, msgctl
* shmat, shmdt, shmget, shmctl
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/pseries: Drop always true CONFIG_PSERIES_MSI
Now that pseries selects PCI_MSI && PCI, EEH will always be true, and
therefore CONFIG_PSERIES_MSI will always be true. So drop it, and move
msi.o to obj-y.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
The pseries build with PCI=n looks to have been broken for at least 5
years, and no one's noticed or cared.
Following the obvious breakages backward, the first commit I can find
that builds is the parent of 2eb4afb69ff3 ("powerpc/pci: Move pseries
code into pseries platform specific area") from April 2009.
A distro would never ship a PCI=n kernel, so it is only useful for folks
building custom kernels. Also on KVM the virtio devices appear on PCI,
so it would only be useful if you were building kernels specifically to
run on PowerVM and with no PCI devices.
The added code complexity, and testing load (which we've clearly not
been doing), is not justified by the small reduction in kernel size for
such a niche use case.
So just make PCI non-optional on pseries.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Michael Ellerman [Thu, 15 Oct 2015 03:33:57 +0000 (14:33 +1100)]
scripts/kconfig/Makefile: Fix KBUILD_DEFCONFIG check when building with O=
My recent commit d2036f30cfe1 ("scripts/kconfig/Makefile: Allow
KBUILD_DEFCONFIG to be a target"), contained a bug in that when it
checks if KBUILD_DEFCONFIG is a file it forgets to prepend $(srctree) to
the path.
This causes the build to fail when building out of tree (with O=), and
when the value of KBUILD_DEFCONFIG is 'defconfig'. In that case we will
fail to find the 'defconfig' file, because we look in the build
directory not $(srctree), and so we will call Make again with
'defconfig' as the target. From there we loop infinitely calling 'make
defconfig' again and again.
The fix is simple, we need to look for the file under $(srctree).
Fixes: d2036f30cfe1 ("scripts/kconfig/Makefile: Allow KBUILD_DEFCONFIG to be a target") Reported-by: Olof Johansson <olof@lixom.net> Acked-by: Michal Marek <mmarek@suse.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/mm: Differentiate between hugetlb and THP during page walk
We need to properly identify whether a hugepage is an explicit or
a transparent hugepage in follow_huge_addr(). We used to depend
on hugepage shift argument to do that. But in some case that can
result in wrong results. For ex:
On finding a transparent hugepage we set hugepage shift to PMD_SHIFT.
But we can end up clearing the thp pte, via pmdp_huge_get_and_clear.
We do prevent reusing the pfn page via the usage of
kick_all_cpus_sync(). But that happens after we updated the pte to 0.
Hence in follow_huge_addr() we can find hugepage shift set, but transparent
huge page check fail for a thp pte.
NOTE: We fixed a variant of this race against thp split in commit 691e95fd7396905a38d98919e9c150dbc3ea21a3
("powerpc/mm/thp: Make page table walk safe against thp split/collapse")
Without this patch, we may hit the BUG_ON(flags & FOLL_GET) in
follow_page_mask occasionally.
In the long term, we may want to switch ppc64 64k page size config to
enable CONFIG_ARCH_WANT_GENERAL_HUGETLB
Reported-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
After commit e2b3d202d1dba8f3546ed28224ce485bc50010be
("powerpc: Switch 16GB and 16MB explicit hugepages to a
different page table format"), we don't need to support
is_hugepd() for 64K page size.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Andy Shevchenko [Thu, 1 Oct 2015 09:46:10 +0000 (12:46 +0300)]
powerpc/pseries: re-use code from of_helpers module
The derive_parent() has similar semantics to what we have in newly introduced
of_helpers module. The replacement reduces code base and propagates the actual
error code to the caller.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Andy Shevchenko [Thu, 1 Oct 2015 09:46:09 +0000 (12:46 +0300)]
powerpc/pseries: handle nodes without '/'
In case we have node without '/' strrchr() returns NULL which might lead to
crash. Replace strrchr() by kbasename() and modify condition to avoid such
behaviour.
Suggested-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Michael Ellerman [Wed, 23 Sep 2015 05:40:34 +0000 (15:40 +1000)]
scripts/kconfig/Makefile: Allow KBUILD_DEFCONFIG to be a target
Arch Makefiles can set KBUILD_DEFCONFIG to tell kbuild the name of the
defconfig that should be built by default.
However currently there is an assumption that KBUILD_DEFCONFIG points to
a file at arch/$(SRCARCH)/configs/$(KBUILD_DEFCONFIG).
We would like to use a target, using merge_config, as our defconfig, so
adapt the logic in scripts/kconfig/Makefile to allow that.
To minimise the chance of breaking anything, we first check if
KBUILD_DEFCONFIG is a file, and if so we do the old logic. If it's not a
file, then we call the top-level Makefile with KBUILD_DEFCONFIG as the
target.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Michal Marek <mmarek@suse.com>
Michael Neuling [Fri, 25 Sep 2015 04:01:40 +0000 (14:01 +1000)]
powerpc/vdso: Avoid link stack corruption in __get_datapage()
powerpc has a link register (lr) used for calling functions. We "bl
<func>" to call a function, and "blr" to return back to the call site.
The lr is only a single register, so if we call another function from
inside this function (ie. nested calls), software must save away the
lr on the software stack before calling the new function. Before
returning (ie. before the "blr"), the lr is restored by software from
the software stack.
This makes branch prediction quite difficult for the processor as it
will only know the branch target just before the "blr".
To help with this, modern powerpc processors keep a (non-architected)
hardware stack of lr called a "link stack". When a "bl <func>" is
run, the lr is pushed onto this stack. When a "blr" is called, the
branch predictor pops the lr value from the top of the link stack, and
uses it to predict the branch target. Hence the processor pipeline
knows a lot earlier the branch target.
This works great but there are some cases where you call "bl" but
without a matching "blr". Once such case is when trying to determine
the program counter (which can't be read directly). Here you "bl+4;
mflr" to get the program counter. If you do this, the link stack will
get out of sync with reality, causing the branch predictor to
mis-predict subsequent function returns.
To avoid this, modern micro-architectures have a special case of bl.
Using the form "bcl 20,31,+4", ensures the processor doesn't push to
the link stack.
The 32 and 64 bit variants of __get_datapage() use a "bl; mflr" to
determine the loaded address of the VDSO. The current versions of
these attempt to use this special bl variant.
Unfortunately they use +8 rather than the required +4. Hence the
current code results in the link stack getting out of sync with
reality and hence the resulting performance degradation.
This patch moves it to bcl+4 by moving __kernel_datapage_offset out of
__get_datapage().
With this patch, running a gettimeofday() (which uses
__get_datapage()) microbenchmark we get a decent bump in performance
on POWER7/8.
For the benchmark in tools/testing/selftests/powerpc/benchmarks/gettimeofday.c
POWER8:
64bit gets ~4% improvement
32bit gets ~9% improvement
POWER7:
64bit gets ~7% improvement
Signed-off-by: Michael Neuling <mikey@neuling.org> Reported-by: Aaron Sawdey <sawdey@us.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Michael Neuling [Fri, 25 Sep 2015 04:01:39 +0000 (14:01 +1000)]
powerpc/selftest: Add gettimeofday() benchmark
This adds a benchmark directory to the powerpc selftests and adds a
gettimeofday() benchmark to it.
Suggested-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Some dynamic loaders may be slightly faster if a GNU hash is
available.
This is unlikely to have any measurable effect on the time it takes
to resolve vdso symbols (since there are so few of them). In some
contexts, it can be a win for a different reason: if every DSO has a
GNU hash section, then libc can avoid calculating SysV hashes at
all. Both musl and glibc appear to have this optimization.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
projects / karo-tx-linux.git / log