mmc: mvsdio: Remove redundant suspend and resume callbacks
Suspend and resume of cards are handled by the protocol layer and
consequently the mmc_suspend|resume_host APIs are marked as deprecated.
While moving away from using the deprecated APIs, there are nothing
left to be done for the suspend and resume callbacks, so remove them.
Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: msm_sdcc: Move away from using deprecated APIs
Suspend and resume of cards are being handled from the protocol layer
and consequently the mmc_suspend|resume_host APIs are deprecated.
This means we can simplify the suspend|resume callbacks by removing the
use of the deprecated APIs.
Additionally, remove dead code which also used the deprecated APIs.
Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: core: Signal wakeup event at card insert/removal
We want to give user space provision to fully consume a card
insert/remove event, when the event was caused by a wakeup irq.
By signaling the wakeup event for a time of 5 s for devices configured
as wakeup capable, we likely will be prevent a sleep long enough to let
user space consume the event.
To enable this feature, host drivers must thus configure their devices
as wakeup capable.
This is a reworked implementation of the old wakelocks for the mmc
subsystem, originally authored by Colin Cross and San Mehat for the
Android kernel. Zoran Markovic shall also be given cred for recently
re-trying to upstream this feature.
Cc: San Mehat <san@google.com> Cc: Colin Cross <ccross@android.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Zoran Markovic <zoran.markovic@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Zoran Markovic <zoran.markovic@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: core: Collect common code for card ocr validation
Since mmc_select_voltage now only gets called from the attach sequence,
it makes sense to move the out of spec validations of the card ocr into
this function.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: core: Prevent violation of specs while initializing cards
According to eMMC/SD/SDIO specs, the VDD (VCC) voltage level must be
maintained during the initialization sequence. If we want/need to tune
the voltage level, a complete power cycle of the card must be executed.
Most host drivers conforms to the specifications by only allowing to
change VDD voltage level at the MMC_POWER_UP state, but some also cares
about MMC_POWER_ON state, which they should'nt. This patch will not
break those drivers, but they could clean up code to better reflect
what is expected from the protocol layer.
A big re-work of the mmc_select_voltage function is done to only change
VDD voltage level if the host supports MMC_CAP2_FULL_PWR_CYCLE.
Otherwise only validation of the host and card ocr mask will be done.
A very nice side-effect of this patch is that we now don't need to
reset the negotiated ocr mask at the mmc_power_off function, since now
it will actually reflect the present voltage level, which safely can be
used at the next power up and re-initialization. Moreover, we then only
need to execute mmc_select_voltage from the attach sequence.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: core: Move cached value of the negotiated ocr mask to card struct
The negotiated ocr mask is directly related to the card. Once a card
gets removed, the mask shall be dropped. By moving the cache of the ocr
mask from the host struct to the card struct we have accomplished this.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: core: Cleanup code for setting ocr mask for SDIO
At several places in mmc_sdio_init_card function the cached mask in
host->ocr were being updated. To simplify code, we make use of an
local ocr parameter instead.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: core: Remove unnecessary retry mechanism at SDIO attach
The retry and fallback mechanism when failing to switch to 1.8V
signaling voltage is handled by the SDIO card init function. Thus we
can remove the duplicated old code from the attach function.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: core: Do not poll for busy with status cmd for all switch cmds
Some switch operations like poweroff notify, shall according to the
spec not be followed by any other new commands. For these cases and
when the host does'nt support MMC_CAP_WAIT_WHILE_BUSY, we must not
send status commands to poll for busy detection. Instead wait for
the stated timeout from the EXT_CSD before completing the request.
Eric Ernst [Mon, 21 Oct 2013 16:54:41 +0000 (09:54 -0700)]
mmc: sdhci-pci: Add SDIO/MMC device ID support for Intel Clovertrail
This patch adds intel_mid clovertrail SDIO and eMMC device
IDs to the sdhci-pci driver.
Signed-off-by: Eric Ernst <eric.ernst@linux.intel.com> Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Balaji T K [Sun, 20 Oct 2013 18:55:21 +0000 (00:25 +0530)]
mmc: omap_hsmmc: correct max value of clkd
clock divisor can take a max value of 1023. Update code so that card
init can be handled at f_min even at higher IP clock frequencies from
which clock to the card is derived.
Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Jianpeng Ma [Sun, 20 Oct 2013 18:55:20 +0000 (00:25 +0530)]
mmc: omap_hsmmc: fix timeout for cmd and data soft reset
With HSMMC_HAS_UPDATED_RESET reset of cmd/data (SRC/SRD) can be to
quick and can be missed resulting in wait for software timeout.
With cpu_relax timeout can be long and unpredictable. Use udelay
instead for timeout implementation.
Reported-by: Yuzheng Ma <mayuzheng@kedacom.com> Tested-by: Yuzheng Ma <mayuzheng@kedacom.com> Reviewed-by: Hein Tibosch <hein_tibosch@yahoo.es> Signed-off-by: Jianpeng Ma <majianpeng@gmail.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Tony Lindgren [Sun, 20 Oct 2013 18:55:19 +0000 (00:25 +0530)]
mmc: omap_hsmmc: context save and restore for DT
We want to get rid of the omap specific platform init code
callbacks as they don't play nice with device tree.
Convert the context loss check to be based on a
register state detection instead.
Cc: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
[add check for CON and HCTL in context save and restore function] Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Balaji T K [Sun, 20 Oct 2013 18:55:18 +0000 (00:25 +0530)]
mmc: omap_hsmmc: Fix pbias_disable for omap4
pbias_disable is set to protect the mmc pbias i/o cells in DT boot
by preventing voltage switch. Currently pbias_disable is enabled only
for omap3 and not for omap4 due to reg_offset difference of 0x100.
Enable pbias_disable for omap4+ too by using res->start
which does not include the reg_offset.
Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Dong Aisheng [Fri, 18 Oct 2013 11:48:47 +0000 (19:48 +0800)]
mmc: sdhci-esdhc-imx: add delay line setting support
The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock period) regardless of on-chip variations
such as process, voltage and temperature (PVT).
This patch adds a user interface to set slave delay line via device tree.
It's usually used in high speed mode like mmc DDR mode when the signal
quality is not good caused by board design, e.g. the signal path is too
long. User can manually set delay line to find a suitable data sampling
window for card to work properly.
Dong Aisheng [Fri, 18 Oct 2013 11:48:46 +0000 (19:48 +0800)]
mmc: sdhci-esdhc-imx: add DDR mode support for mx6
When DDR mode is enabled, the initial pre_div should be 2.
And the pre_div value should be changed accordingly
from
...
02h) Base clock divided by 4
01h) Base clock divided by 2
00h) Base clock divided by 1
to
..
02h) Base clock divided by 8
01h) Base clock divided by 4
00h) Base clock divided by 2
Dong Aisheng [Fri, 18 Oct 2013 11:48:45 +0000 (19:48 +0800)]
mmc: sdhci: report error once the maximum tuning loops exhausted or timeout
The original code missed to report an error when the maximum tuning
loops exhausted or timeout, it will cause the upper layer to wrongly
think the tuning process is passed.
Dong Aisheng [Fri, 18 Oct 2013 11:48:43 +0000 (19:48 +0800)]
mmc: sdhci-esdhc-imx: add std tuning support for mx6sl
The mx6sl supports standard sdhci tuning, then esdhc_executing_tuning
is only needed for mx6q/dl. We introduce is_imx6_usdhc() and
is_imx6sl_usdhc() to handle the difference.
The standard tuning is enabled by setting ESDHC_TUNE_CTRL_STD_TUNING_EN bit
in new register ESDHC_TUNE_CTRL and operates with new tuning bits
defined in SDHCI_ACMD12_ERR register.
Note: mx6sl can also work on the old manually tuning mode as mx6q/dl if
not enable standard tuning mode.
Create a struct esdhc_soc_data with moving 'flags' field from
pltfm_imx_data into it, and pass the pointer of this SoC specific data
structure through of_device_id.data directly, so that the translation
from enum imx_esdhc_type to flags can be saved.
With the change, enum imx_esdhc_type can be eliminated, since we can
implement the is_imx*_esdhc() by checking the esdhc_soc_data pointer.
The unused is_imx35_esdhc() and is_imx51_esdhc() are also removed, and the
others are kept there as we will need to use them to handle some small
register differences later, where use of new flags might be a little
overkilled.
Shawn Guo [Thu, 17 Oct 2013 07:19:46 +0000 (15:19 +0800)]
mmc: sdhci-esdhc-imx: pdev->id_entry should be immutable
As a good practice, device driver should not modify pdev->id_entry but
keep it immutable. Let's assign of_device_id.data with imx_esdhc_type
constants directly, so that we do not have to manipulate pdev->id_entry
in .probe().
As the result, sdhci-esdhc-imx53 and sdhci-usdhc-imx6q can be removed
from platform_device_id table now, since they will only probe from
device tree.
Shawn Guo [Thu, 17 Oct 2013 07:19:45 +0000 (15:19 +0800)]
mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_USDHC
Add flag ESDHC_FLAG_USDHC to tell that the ESDHC is actually an USDHC
block, and replace the is_imx6q_usdhc() occurrences with inline function
esdhc_is_usdhc() which checks the flag.
Shawn Guo [Thu, 17 Oct 2013 07:19:44 +0000 (15:19 +0800)]
mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_ENGCM07207
Just like the use of the flag ESDHC_FLAG_MULTIBLK_NO_INT, let's add
another flag ESDHC_FLAG_ENGCM07207 to enable the workaround for errata
ENGcm07207 and set the flag for i.MX25 and i.MX35 ESDHC.
While at it, let's use BIT() macro for ESDHC_FLAG_MULTIBLK_NO_INT as
well.
According to spec, the pre_div for imx6q should be 1, or the biggest
clock rate we can get is a half of host clock rate. This may cause
we can not get the proper clock rate as we want. e.g. if the desired
clock is 200Mhz, however, the host clock is 200Mhz too, then it causes
the actual clock we get is 100Mhz due to pre_div is 2.
mmc: sdhci-esdhc-imx: add sd3.0 SDR clock tuning support
Freescale i.MX6Q/DL uSDHC clock tuning progress is a little different from
the standard tuning process defined in host controller spec v3.0.
Thus we use platform_execute_tuning instead of standard sdhci tuning.
The main difference are:
1) not only generate Buffer Read Ready interrupt when tuning is performing.
It generates all other DATA interrupts like the normal data command.
2) SDHCI_CTRL_EXEC_TUNING is not automatically cleared by HW,
instead it's controlled by SW.
3) SDHCI_CTRL_TUNED_CLK is not automatically set by HW,
it's controlled by SW.
4) the clock delay for every tuning is set by SW.
mmc: sdhci-esdhc-imx: support real clock on and off for imx6q
The signal voltage switch flow requires to shutdown and output
clock in a specific sequence according to standard host controller
v3.0 spec. In that timing, the card must really receive clock or not.
However, for i.MX6Q, the uSDHC will not output clock even the clock
is enabled until there is command or data in transfer on the bus,
which will then cause singal voltage switch always to fail.
For i.MX6Q, we clear ESDHC_VENDOR_SPEC_FRC_SDCLK_ON bit to let
controller to gate off clock automatically and set that bit
to force clock output if clock is on.
mmc: sdhci-esdhc: move common esdhc_set_clock to platform driver
We need a lot of imx6 specific things into common esdhc_set_clock
for support SD3.0 and eMMC DDR mode which is not needed for power pc
platforms, so esdhc_set_clock seems not so common anymore.
Instead of keeping add platform specfics things into this common API,
we choose to move that code into platform driver itself to handle.
This can also exclude the dependency between imx and power pc on this
headfile and is easy for maintain in the future.
mmc: sdhci: add hooks for platform specific tuning
The tuning of some platforms may not follow the standard host control
spec v3.0, e.g. Freescale uSDHC on i.MX6Q/DL.
Add a hook here to allow execute platform specific tuning instead of
standard host controller tuning.
The hook only replaces the tuning process, so it's placed after tuning
checking and before the real tuning process.
Some notes for the tuning hook:
1) it needs handle lock itself if it wants to access host controller
according platform specific implementation.
2) do not need to handle runtime pm since it executes with runtime pm
get already.
Axel Lin [Tue, 17 Sep 2013 07:59:32 +0000 (15:59 +0800)]
mmc: sdhci-bcm-kona: Use sdhci_pltfm_unregister instead of open coded
This avoid duplicated implementation and also fixes missing iounmap() and
release_mem_region() calls in sdhci_bcm_kona_remove(). sdhci_pltfm_init()
calls request_mem_region() and ioremap(), thus we need to call the
corresponding iounmap() and release_mem_region() calls in
sdhci_bcm_kona_remove().
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Chris Ball <cjb@laptop.org>
When a software timeout occurs, the transfer is not stopped. In DMA case,
it causes DMA channel to be stuck because the transfer is still active
causing following transfers to be queued but not computed.
Cc: <stable@vger.kernel.org> # 3.9+ Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Reported-by: Alexander Morozov <etesial@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
While speed mode is changed, CMD13 cannot be guaranteed.
According to the spec., it is not recommended to use CMD13
to check the busy completion of the timing change.
If CMD13 is used in this case, CRC error must be ignored.
Seungwon Jeon [Fri, 30 Aug 2013 15:14:38 +0000 (00:14 +0900)]
mmc: dw_mmc: fix the transfer termination in IDMAC mode
In IDMAC mode EVENT_XFER_COMPLETE is set when RI/TI of last descriptor
is done. So if errors are happened in the middle of data transfers,
'dw_mci_stop_dma' during error handing can be called and eventually
prevents this flag to be set. This results in permanent wait for
EVENT_XFER_COMPLETE in 'dw_mci_tasklet_func'. Therefore, if dma
running is stopped forcibly, EVENT_XFER_COMPLETE should be set.
Reported-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:14:33 +0000 (00:14 +0900)]
mmc: dw_mmc: amend use of idmac sw reset
First, compiling warning along with previous change is removed.
[drivers/mmc/host/dw_mmc.c:1890:7: warning: unused variable 'ctrl']
And with the recommendation in manual, IDMAC software reset is followed
by dma-reset of the CTRL register in order to terminate the transfer.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:14:23 +0000 (00:14 +0900)]
mmc: dw_mmc: gather each reset code into functions
There are three resets in CTRL register. FIFO reset is especially used
in several points with the same routine. It could be replaced with one
function and the others may be applied similarly if needed. So,
mci_wait_reset() is modified to allow various bit field of reset.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:14:05 +0000 (00:14 +0900)]
mmc: dw_mmc: guarantee stop-abort cmd in data errors
In error cases, DTO interrupt may or may not be generated depending
on remained data. Stop/Abort command ensures DTO generation for that
situation. Currently if 'stop' field of data is empty, there is no
stop/abort command. So, it could hang waiting DTO. This change
reinforces these cases.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:13:59 +0000 (00:13 +0900)]
mmc: dw_mmc: fix error handling on response error
Even if response error is detected in case data command, data transfer
is continued. It means that data can live in FIFO. Current handling
just breaks out the request when seeing the command error. This causes
kernel panic in dw_mci_read_data_pio() [host->data = NULL]. And also,
FIFO should be guaranteed to be empty.
Seungwon Jeon [Fri, 30 Aug 2013 15:13:55 +0000 (00:13 +0900)]
mmc: dw_mmc: control card read threshold
Card Read Threshold should be ensured that the card clock does not stop
in the middle of a block of data being transferred from the card to the
Host. Specially, clock stop is allowed in fast transfer such as HS200
or SDR104 mode. And so, it should be enabled.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:13:42 +0000 (00:13 +0900)]
mmc: dw_mmc: adjust the fifoth with block size
This change helps to choose msize, rx_watermark and tx_watermark
depending on block size for IDMAC mode. For SDIO block size can be
variable, so if these values are set incorrectly, card clock may stop.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:13:31 +0000 (00:13 +0900)]
mmc: dw_mmc: set the supported max/min frequency
Both f_max and f_min will be informed for core layer to request
valid clock rate. But current setting from 'host->bus_hz' may
not represent the max/min frequency properly. Even if host can
actually support high speed than bus_hz, core layer will not
request clock rate over bus_hz. Basically, f_max/f_min can be set
with the values according to spec. And then host will make its best
effort to meet the rate.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:13:03 +0000 (00:13 +0900)]
mmc: dw_mmc: exynos: adjust the clock rate with speed mode
Exynos's host has divider logic before 'cclk_in' to controller core.
It means that actual clock rate of ciu clock comes from this divider
value. So, source clock should be adjusted along with 'ciu_div' which
indicates the host's divider ratio. Setting clock rate basically fits
the required speed. Specially, 'cclk_in' should have double rate of
target speed in case of DDR 8-bit mode.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Seungwon Jeon [Fri, 30 Aug 2013 15:12:42 +0000 (00:12 +0900)]
mmc: dw_mmc: add support tuning scheme
For the speed modes HS200 and SDR104, tuning is needed to determine the
correct sampling point. Actual tuning procedure is provided by specific
host controller driver. This patch defines the tuning command and
tuning data. Additionally, 'struct dw_mci_slot' is moved to header
file to consider the extensive usages in driver.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Exynos5420 Mobile Storage Host controller has Security Management
Unit (SMU) for channel 0 and channel 1 (mainly for eMMC).
This time, SMU configuration is set for non-encryption mode.
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Current platform specific private data initialization call
dw_mci_exynos_priv_init() can be used to do platform specific
initialization of SMU and others in future. So the drv_data->init
call has moved to dw_mci_probe().
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Currently platform specific private data initialization is done by
dw_mci_socfpga_priv_init and dw_mci_socfpga_parse_dt. As we already have
separate platform specific device tree parser dw_mci_socfpga_parse_dt,
move the dw_mci_socfpga_priv_init code to dw_mci_socfpga_parse_dt.
We can use the dw_mci_socfpga_priv_init to do some actual platform
specific initialization.
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Currently platform specific private data initialization is done by
dw_mci_exynos_priv_init and dw_mci_exynos_parse_dt. As we already have
separate platform specific device tree parser dw_mci_exynos_parse_dt,
move the dw_mci_exynos_priv_init code to dw_mci_exynos_parse_dt.
We can use the dw_mci_exynos_priv_init to do some actual platform
specific initialization of SMU and etc.
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Doug Anderson [Fri, 30 Aug 2013 15:11:49 +0000 (00:11 +0900)]
mmc: dw_mmc: Set timeout to max upon resume
The TMOUT register is set to 0xffffffff at probe time but isn't
set after suspend/resume. Add an init of this value.
No problems were observed without this (it will also be set in
__dw_mci_start_request if there is data to send), but it makes the
register dump before and after suspend cleaner.
Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Doug Anderson [Fri, 30 Aug 2013 15:11:43 +0000 (00:11 +0900)]
mmc: dw_mmc: Honor requests to set the clock to 0
Previously the dw_mmc driver would ignore any requests to disable the
card's clock. This doesn't seem like a good thing in general, but had
one extra bad side effect in the following situation:
* mmc core would set clk to 400kHz at boot time while scanning
* mmc core would set clk to 0 since no card, but it would be ignored.
* suspend to ram and resume; clocks in the dw_mmc IP block are now 0
but dw_mmc thinks that they're 400kHz (it ignored the set to 0).
* insert card
* mmc core would set clk to 400kHz which would be considered a no-op.
Note that if there is no card in the slot and we do a suspend/resume
cycle, we _do_ still end up with differences in a dw_mmc register
dump, but the differences are clock related and we've got the clock
disabled both before and after, so this should be OK.
Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Doug Anderson [Fri, 30 Aug 2013 15:11:21 +0000 (00:11 +0900)]
mmc: dw_mmc: Add exynos resume_noirq callback to clear WAKEUP_INT
If the WAKEUP_INT is asserted at wakeup and not cleared, we'll end up
looping around forever. This has been seen to happen on exynos5420
silicon despite the fact that we haven't enabled any wakeup events due
to a silicon errata. It is safe to do on all exynos variants.
Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Doug Anderson [Fri, 30 Aug 2013 15:11:06 +0000 (00:11 +0900)]
mmc: dw_mmc: don't queue up a card detect at slot startup
The MMC subsystem handles looking for a card at probe time. Queuing up our
own can race with the rest of the MMC subsystem and cause problems if we
get unlucky with timing. Just remove driver own detection triggering. While
progressing the request from 'mmc_rescan', if 'dw_mci_work_routine_card'
routine is activated, it will cancel the current request. The problem case
is that 'mmc_rescan' is prior to 'dw_mci_work_routine_card' from host own.
Specifically, the following message shows the detection problem in driver's
probing. It would get an err -123 (-ENOMEDIUM) during probe.
[ 4.216595] dwmmc_exynos 12210000.dwmmc1: Using internal DMA controller.
[ 4.395935] dwmmc_exynos 12210000.dwmmc1: Version ID is 250a
[ 4.401948] dwmmc_exynos 12210000.dwmmc1: DW MMC controller at irq 108, 64 bit host data width, 64 deep fifo
[ 4.424430] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[ 4.453975] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[ 4.459592] mmc_host mmc1: Bus speed (slot 0) = 100000000Hz (slot req 400000Hz, actual 400000HZ div = 125)
[ 4.484258] dwmmc_exynos 12210000.dwmmc1: 1 slots initialized
[ 4.485406] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[ 4.487606] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[ 4.489794] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[ 4.509757] mmc1: error -123 whilst initialising SDIO card
Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
afa2c9407f8908 ("sh: ecovec24: Use MMC/SDHI CD and RO GPIO") added
.tmio_flags = TMIO_MMC_USE_GPIO_CD on sh_mobile_sdhi_info, but it needs
<linux/mfd/tmio.h> header. This patch adds it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Merge tag 'stable/for-linus-3.12-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Pull Xen fixes from Konrad Rzeszutek Wilk:
"Bug-fixes and one update to the kernel-paramters.txt documentation.
- Fix PV spinlocks triggering jump_label code bug
- Remove extraneous code in the tpm front driver
- Fix ballooning out of pages when non-preemptible
- Fix deadlock when using a 32-bit initial domain with large amount
of memory
- Add xen_nopvpsin parameter to the documentation"
* tag 'stable/for-linus-3.12-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
xen/spinlock: Document the xen_nopvspin parameter.
xen/p2m: check MFN is in range before using the m2p table
xen/balloon: don't alloc page while non-preemptible
xen: Do not enable spinlocks before jump_label_init() has executed
tpm: xen-tpmfront: Remove the locality sysfs attribute
tpm: xen-tpmfront: Fix default durations
Merge tag 'dm-3.12-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm
Pull device-mapper fixes from Mike Snitzer:
"A few fixes for dm-snapshot, a 32 bit fix for dm-stats, a couple error
handling fixes for dm-multipath. A fix for the thin provisioning
target to not expose non-zero discard limits if discards are disabled.
Lastly, add two DM module parameters which allow users to tune the
emergency memory reserves that DM mainatins per device -- this helps
fix a long-standing issue for dm-multipath. The conservative default
reserve for request-based dm-multipath devices (256) has proven
problematic for users with many multipathed SCSI devices but
relatively little memory. To responsibly select a smaller value users
should use the new nr_bios tracepoint info (via commit 75afb352
"block: Add nr_bios to block_rq_remap tracepoint") to determine the
peak number of bios their workloads create"
* tag 'dm-3.12-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm:
dm: add reserved_bio_based_ios module parameter
dm: add reserved_rq_based_ios module parameter
dm: lower bio-based mempool reservation
dm thin: do not expose non-zero discard limits if discards disabled
dm mpath: disable WRITE SAME if it fails
dm-snapshot: fix performance degradation due to small hash size
dm snapshot: workaround for a false positive lockdep warning
dm stats: fix possible counter corruption on 32-bit systems
dm mpath: do not fail path on -ENOSPC
- A small cleanup the main purpose of which is to work around an
internal compiler error bug in certain Codesource toolchains.
* git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: mm: Move some checks out of 'for' loop in DMA operations
MIPS: cpu-features.h: s/MIPS53/MIPS64/
projects / karo-tx-linux.git / log