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11 years agoARM: imx: Move anatop related from board file to anatop driver
Peter Chen [Wed, 14 Aug 2013 03:40:56 +0000 (11:40 +0800)]
ARM: imx: Move anatop related from board file to anatop driver

Move anatop related (For USB) from board file to anatop driver

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
11 years agoARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
Peter Chen [Mon, 12 Aug 2013 08:51:39 +0000 (16:51 +0800)]
ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog

USB OTG vbus pin needs to be configured as gpio function at
sabresd board.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
11 years agoARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
Peter Chen [Mon, 12 Aug 2013 08:46:24 +0000 (16:46 +0800)]
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator

We enabled USB host 1, so host 1's vbus should be on to let
host 1 work.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
11 years agoUSB: chipidea: i.MX: simplify usbmisc
Sascha Hauer [Mon, 12 Aug 2013 10:29:42 +0000 (12:29 +0200)]
USB: chipidea: i.MX: simplify usbmisc

The chipidea i.MX driver is split into two drivers. The ci_hdrc_imx driver
handles the chipidea cores and the usbmisc_imx driver handles the noncore
registers common to all chipidea cores (but SoC specific). Current flow is:

- usbmisc sets an ops pointer in the ci_hdrc_imx driver during probe
- ci_hdrc_imx checks if the pointer is valid during probe, if yes calls
  the functions in the ops pointer.
- usbmisc_imx calls back into the ci_hdrc_imx driver to get additional
  data

This is overly complicated and has problems if the drivers are compiled
as modules. In this case the usbmisc_imx driver can be unloaded even if
the ci_hdrc_imx driver still needs usbmisc functionality.

This patch changes this by letting the ci_hdrc_imx driver calling functions
from the usbmisc_imx driver. This way the symbol resolving during module
load makes sure the ci_hdrc_imx driver depends on the usbmisc_imx driver.

Also instead of letting the usbmisc_imx driver call back into the ci_hdrc_imx
driver, pass the needed data in the first place.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: udc: .pullup is valid only when vbus is there
Peter Chen [Mon, 12 Aug 2013 01:22:59 +0000 (09:22 +0800)]
usb: chipidea: udc: .pullup is valid only when vbus is there

For chipidea, the IP must know vbus before the controller
begins to run. So the .pullup should only be called when
the vbus is there.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: retire flag CI_HDRC_PULLUP_ON_VBUS
Peter Chen [Mon, 12 Aug 2013 01:22:58 +0000 (09:22 +0800)]
usb: chipidea: retire flag CI_HDRC_PULLUP_ON_VBUS

Currently, the controller only runs when the ci->vbus_active is true.
So the flag CI_HDRC_PULLUP_ON_VBUS is useless no longer.
If the user doesn't have otgsc, he/she needs to change ci_handle_vbus_change
to update ci->vbus_active.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: udc: fix misuse of REGS_SHARED and PULLUP_ON_VBUS flags
Peter Chen [Mon, 12 Aug 2013 01:22:57 +0000 (09:22 +0800)]
usb: chipidea: udc: fix misuse of REGS_SHARED and PULLUP_ON_VBUS flags

CI_HDRC_REGS_SHARED stands for the controller registers is shared
with other USB drivers, if all USB drivers are at chipidea/, it doesn't
needed to be set.
CI_HDRC_PULLUP_ON_VBUS stands for pullup dp when the vbus is on. This
flag doesn't need to be set if the vbus is always on for gadget
since dp has always pulled up after the gadget has initialized.

So, the current code seems to misuse this two flags.
- When the gadget initializes, the controller doesn't need to run if
it depends on vbus (CI_HDRC_PULLUP_ON_VBUS), it does not relate to
shared register.
- When the gadget starts (load one gadget module), the controller
can run if vbus is on (CI_HDRC_PULLUP_ON_VBUS), it also does not
relate to shared register.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: add wait vbus lower than OTGSC_BSV before role starts
Peter Chen [Mon, 12 Aug 2013 01:22:56 +0000 (09:22 +0800)]
usb: chipidea: add wait vbus lower than OTGSC_BSV before role starts

When the gadget role starts, we need to make sure the vbus is lower
than OTGSC_BSV, or there will be an vbus interrupt since we use
B_SESSION_VALID as vbus interrupt to indicate connect and disconnect.
When the host role starts, it may not be useful to wait vbus to lower
than OTGSC_BSV, but it can indicate some hardware problems like the
vbus is still higher than OTGSC_BSV after we disconnect to host some
time later (5000 milliseconds currently), which is obvious not correct.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: add vbus interrupt handler
Peter Chen [Mon, 12 Aug 2013 01:22:55 +0000 (09:22 +0800)]
usb: chipidea: add vbus interrupt handler

We add vbus interrupt handler at ci_otg_work, it uses OTGSC_BSV(at otgsc)
to know it is connect or disconnet event.
Meanwhile, we introduce two flags id_event and b_sess_valid_event to
indicate it is an id interrupt or a vbus interrupt.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: move otg related things to otg file
Peter Chen [Mon, 12 Aug 2013 01:22:54 +0000 (09:22 +0800)]
usb: chipidea: move otg related things to otg file

Move otg related things to otg file.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: disable all interrupts and clear all interrupts status
Peter Chen [Mon, 12 Aug 2013 01:22:53 +0000 (09:22 +0800)]
usb: chipidea: disable all interrupts and clear all interrupts status

During the initialization, it needs to disable all interrupts
enable bit as well as clear all interrupts status bits to avoid
exceptional interrupt.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: add flag CI_HDRC_DUAL_ROLE_NOT_OTG
Peter Chen [Mon, 12 Aug 2013 01:22:52 +0000 (09:22 +0800)]
usb: chipidea: add flag CI_HDRC_DUAL_ROLE_NOT_OTG

Since we need otgsc to know vbus's status at some chipidea
controllers even it is peripheral-only mode. Besides, some
SoCs (eg, AR9331 SoC) don't have otgsc register even
the DCCPARAMS_DC and DCCPARAMS_HC are both 1 at CAP_DCCPARAMS.

We inroduce flag CI_HDRC_DUAL_ROLE_NOT_OTG to indicate if the
controller is dual role, but not supports OTG. If this flag is
not set, we follow the rule that if DCCPARAMS_DC and DCCPARAMS_HC
are both 1 at CAP_DCCPARAMS, then this controller is otg capable.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: add role init and destroy APIs
Peter Chen [Mon, 12 Aug 2013 01:22:51 +0000 (09:22 +0800)]
usb: chipidea: add role init and destroy APIs

- The role's init will be called at probe procedure.
- The role's destroy will be called at fail patch
at probe and driver's removal.
- The role's start/stop will be called when specific
role has started.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: otg: add otg file used to access otgsc
Peter Chen [Mon, 12 Aug 2013 01:22:50 +0000 (09:22 +0800)]
usb: chipidea: otg: add otg file used to access otgsc

This file is mainly used to access otgsc currently, it may
add otg related things in the future.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: udc: otg_set_peripheral is useless for some chipidea users
Peter Chen [Mon, 12 Aug 2013 01:22:49 +0000 (09:22 +0800)]
usb: chipidea: udc: otg_set_peripheral is useless for some chipidea users

It is useless at below cases:
- If we implement both usb host and device at chipidea driver.
- If we don't need phy->otg.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: host: add vbus regulator control
Peter Chen [Mon, 12 Aug 2013 01:22:48 +0000 (09:22 +0800)]
usb: chipidea: host: add vbus regulator control

For boards which have board level vbus control (eg, through gpio), we
need to vbus operation according to below rules:
- For host, we need open vbus before start hcd, and close it
after remove hcd.
- For otg, the vbus needs to be on/off when usb role switches.
When the host roles begins, it opens vbus; when the host role
finishes, it closes vbus.

We put vbus operation to host as host is the only vbus user,
When we are at host mode, the vbus is on, when we are not at
host mode, vbus should be off.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: move vbus regulator operation to core
Peter Chen [Mon, 12 Aug 2013 01:22:47 +0000 (09:22 +0800)]
usb: chipidea: move vbus regulator operation to core

The vbus regulator is a common element for USB vbus operation,
So, move it from glue layer to core.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: remove previous MODULE_ALIAS
Fabio Estevam [Wed, 31 Jul 2013 01:04:28 +0000 (22:04 -0300)]
usb: chipidea: remove previous MODULE_ALIAS

After the rename to ci_hdrc we ended up with two MODULE_ALIAS entries, so
remove the old one.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: prevent endless loop registering platform_devices when probe fails
Lothar Waßmann [Wed, 31 Jul 2013 14:21:16 +0000 (16:21 +0200)]
usb: chipidea: prevent endless loop registering platform_devices when probe fails

Commit 40dcd0e ("usb: chipidea: add PTW, PTS and STS handling") introduced
the following code to the ci_hdrc_probe() function:

+       if (!dev->of_node && dev->parent)
+               dev->of_node = dev->parent->of_node;

This inadvertently associates the ci_hdrc device with the ci_hdrc_imx
driver (which created the ci_hdrc device in the first place).

This results in ci_hdrc_imx_probe() being run for the ci_hdrc device
if ci_hdrc_probe() fails for some reason.
ci_hdrc_imx_probe() will happily create a new ci_hdrc platform_device
whose probing will likewise fail and trigger a new invocation of
ci_hdrc_imx_probe() ... ad nauseam.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-and-tested-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: don't clobber return value of ci_role_start()
Lothar Waßmann [Wed, 31 Jul 2013 14:21:15 +0000 (16:21 +0200)]
usb: chipidea: don't clobber return value of ci_role_start()

If a role fails to start, propagate the error code up the call stack
from probe.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: ci_hdrc_imx: remove an unsolicited module_put() call from ci_hdrc_imx_...
Lothar Waßmann [Wed, 31 Jul 2013 14:21:14 +0000 (16:21 +0200)]
usb: chipidea: ci_hdrc_imx: remove an unsolicited module_put() call from ci_hdrc_imx_remove()

This prevents the USB PHY refcount to be decremented below zero upon
unloading the ci-hdrc-imx module.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: improve kconfig 2.0
Lothar Waßmann [Wed, 31 Jul 2013 14:21:13 +0000 (16:21 +0200)]
usb: chipidea: improve kconfig 2.0

This patch provides a cleaner solution to the problem described in
commit 20a677fd ("usb: chipidea: improve kconfig").

The goal to be achieved is to force USB_CHIPIDEA=m if either
USB_EHCI_HCD=m or USB_GADGET=m.
If both are 'y' USB_CHIPIDEA may be selected to be 'm' or 'y'.

The old patch had the drawback, that USB_CHIPIDEA could be chosen as
'y' though USB_EHCI_HCD or USB_GADGET (or both) were 'm' leading to a
situation where USB_CHIPIDEA_HOST or USB_CHIPIDEA_UDC vanished from
the config options producing a compilable but dysfunctional driver.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: imx: delete the dead code
Peter Chen [Thu, 8 Aug 2013 06:52:54 +0000 (14:52 +0800)]
usb: chipidea: imx: delete the dead code

Remove an unused macro leftover from the old initialization code.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agousb: chipidea: move hw_phymode_configure() into probe
Fabio Estevam [Thu, 25 Jul 2013 21:20:34 +0000 (18:20 -0300)]
usb: chipidea: move hw_phymode_configure() into probe

Currently hw_phymode_configure() is located inside hw_device_reset(), which is
only called by chipidea udc driver.

When operating in host mode, we also need to call hw_phymode_configure() in
order to properly configure the PHY mode, so move this function into probe.

After this change, USB Host1 port on mx53qsb board is functional.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Reviewed-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 years agoENGR00275619 net: fec: set reset phy gpio to high in .probe().
Fugang Duan [Mon, 19 Aug 2013 02:58:24 +0000 (10:58 +0800)]
ENGR00275619 net: fec: set reset phy gpio to high in .probe().

In .probe() call fec_of_init() to parse phy reset gpio, and
request the gpio for later use. For the init, we must set the
gpio to high to let phy power on.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00275004-6: ARM: defconfig: imx_v6_v7: add sabresd battery driver
Robin Gong [Tue, 13 Aug 2013 09:58:12 +0000 (17:58 +0800)]
ENGR00275004-6: ARM: defconfig: imx_v6_v7: add sabresd battery driver

Enable Sabresd-battery driver by default.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00275004-5: ARM: dts: imx6qdl-sabresd: add sabresd battery driver in dts
Robin Gong [Fri, 16 Aug 2013 03:41:33 +0000 (11:41 +0800)]
ENGR00275004-5: ARM: dts: imx6qdl-sabresd: add sabresd  battery driver in dts

Add sabresd battery driver device node in dts.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00275004-4: power: sabresd_battery: add sabresd_battery driver
Robin Gong [Tue, 13 Aug 2013 09:49:54 +0000 (17:49 +0800)]
ENGR00275004-4: power: sabresd_battery: add sabresd_battery driver

Add sabresd battery driver which based on Max8903 charger IC.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00275004-3: ARM: defconfig: imx_v6_v7: add max11801 driver
Robin Gong [Tue, 13 Aug 2013 09:48:05 +0000 (17:48 +0800)]
ENGR00275004-3: ARM: defconfig: imx_v6_v7: add max11801 driver

Add max11801 driver in imx_v6_v7_defconfig

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00275004-2 ARM: dts: imx6qdl-sabresd: add max11801_ts device
Robin Gong [Tue, 13 Aug 2013 09:18:26 +0000 (17:18 +0800)]
ENGR00275004-2 ARM: dts: imx6qdl-sabresd: add max11801_ts device

Add max11801_ts device node

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00275004-1 input: touchscreen: max11801_ts: Add DCM mode for max11801 ADC
Robin Gong [Tue, 13 Aug 2013 08:58:26 +0000 (16:58 +0800)]
ENGR00275004-1 input: touchscreen: max11801_ts: Add DCM mode for max11801 ADC

We need add DCM mode/AUX mode for ADC converter function of max11801, so that
it can be used to read voltage of battery. Meanwhile, let the driver based on
device tree. The patchset is based on below patch (V3.5.7):

commit 4001774cf51f0140ae7e4e8e0ec1d86475790682
Author: Rong Dian <b38775@freescale.com>
Date:   Fri Jan 18 14:24:28 2013 +0800

    Engr00240284-1 MAX11801: Add DCM aux adc sample function

        1.Add direct conversion mode operations
2.Add aux adc sample function

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00273792-2 ARM:iMX6x: Improve CPUFREQ driver.
Ranjani Vaidyanathan [Fri, 16 Aug 2013 17:20:16 +0000 (12:20 -0500)]
ENGR00273792-2 ARM:iMX6x: Improve CPUFREQ driver.

 1. Add support for VDDSOC/VDDPU operating points that track
 the VDDARM_CAP within 50mV to the device tree.
 2. Add CPU freq and VDDSOC/VDDPU operating points to MX6DL and MX6SL.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00273792-1 Cpufreq:iMX6x:Improve CPUFREQ driver.
Ranjani Vaidyanathan [Fri, 16 Aug 2013 17:19:16 +0000 (12:19 -0500)]
ENGR00273792-1 Cpufreq:iMX6x:Improve CPUFREQ driver.

Add support for VDDSOC/VDDPU operating points that track
the VDDARM cap to the device tree.

Add the description for soc-operating-points that need to be added to
the device tree files.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00275500: dts: Add ptp clock pin support for i.MX6Q/DL sabreauto
Luwei Zhou [Fri, 16 Aug 2013 04:33:09 +0000 (12:33 +0800)]
ENGR00275500: dts: Add ptp clock pin support for i.MX6Q/DL sabreauto

Add ptp clock dts support on i.MX6Q/DL sabreauto.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275479 ptp: Remove old way of PTP pin collision
Luwei Zhou [Fri, 16 Aug 2013 03:13:28 +0000 (11:13 +0800)]
ENGR00275479 ptp: Remove old way of PTP pin collision

This reverts commit aa0cfc5afaf18ce8fab696483b4ca533e4741430.
We should use dts to deal with pin collision.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275481 dts: Remove PTP pin collision in dts
Luwei Zhou [Fri, 16 Aug 2013 02:53:26 +0000 (10:53 +0800)]
ENGR00275481 dts: Remove PTP pin collision in dts

This reverts commit 944b782d88b1ecece76942345f5e149c63a1d6d8.
We will use dts to deal with pin collision.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275403 ARM: imx: Support CPU hotplug
Anson Huang [Thu, 15 Aug 2013 20:18:22 +0000 (16:18 -0400)]
ENGR00275403 ARM: imx: Support CPU hotplug

When doing secondary cores enable/disable, the enable bit
and reset bit in SRC should be written together. Without
this, CPU hotplug can NOT pass stress test, and with this,
it can passed over 500k iterations CPU hotplug test with
many threads running in background, at least three boards
are tested.

When trying hotplug a secondary core, it should stay
in idle forever before it is disabled from SRC.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00275469 net:fec: move devm_* and of_* apis to probe function
Fugang Duan [Fri, 16 Aug 2013 01:16:21 +0000 (09:16 +0800)]
ENGR00275469 net:fec: move devm_* and of_* apis to probe function

fec_reset_phy() function is called in fec_enet_open(). And
fec_reset_phy() call of_get_named_gpio() and devm_gpio_request_one()
apis, which makes no sense since the two apis do something that
should only be done at .probe() time.

So move two functions into fec_probe() and only leave gpio_set_value()
and msleep() calls in fec_reset_phy(). And remove fec_free_reset_gpio()
function.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
11 years agoENGR00275414 dts: Add device tree support for ptp
Luwei Zhou [Thu, 15 Aug 2013 10:02:38 +0000 (18:02 +0800)]
ENGR00275414 dts: Add device tree support for ptp

Add device tree support for ptp.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275410 ptp: fix ptp pin collision
Luwei Zhou [Thu, 15 Aug 2013 09:56:44 +0000 (17:56 +0800)]
ENGR00275410 ptp: fix ptp pin collision

Ptp ts_clk pin have collision with spdif and i2c3, remove
other modules pin ctrl when enable ptp.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275371 net: fec: PTP: Add ptp support for IXXAT stack
Luwei Zhou [Thu, 15 Aug 2013 05:45:23 +0000 (13:45 +0800)]
ENGR00275371 net: fec: PTP: Add ptp support for IXXAT stack

These patch  add ptp support for IXXAT stack.
Cherry picked from commit 1c8839574ac87826f53b96f987975a9bb1d72915.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275394 i.MX6:IEEE1588: disable phy Ar8031 SmartEEE
Luwei Zhou [Thu, 15 Aug 2013 06:35:32 +0000 (14:35 +0800)]
ENGR00275394 i.MX6:IEEE1588: disable phy Ar8031 SmartEEE

Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:

Item#1: If add performance stress test while runing IEEE1588, the link
down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
no such issue found.

The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275023-5 ARM: imx: Support standby mode for suspend
Anson Huang [Wed, 14 Aug 2013 19:51:41 +0000 (15:51 -0400)]
ENGR00275023-5 ARM: imx: Support standby mode for suspend

Support standby mode for suspend, standby mode will only
make CCM enter STOP mode with OSC on and no PMIC_STBY_REQ
asserted, standby mode focus more on resume latency than
power number.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00275023-4 ARM: imx: Setting CPU isolation according to dts
Anson Huang [Wed, 14 Aug 2013 19:47:18 +0000 (15:47 -0400)]
ENGR00275023-4 ARM: imx: Setting CPU isolation according to dts

Different boards may use different PMICs, and the PMICs' power
rail ramp up time can impact the DSM mode a lot, so we need to
adjust the CPU isolation timing setting according to board dts
setting, if there is no such setting defined in dts, use default
value.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00275023-3 ARM: imx: Correct CCM setting for DSM mode
Anson Huang [Wed, 14 Aug 2013 17:26:54 +0000 (13:26 -0400)]
ENGR00275023-3 ARM: imx: Correct CCM setting for DSM mode

RBC is already enabled right before suspend, so no need to
enable it in the CCM lpm setting;

Need to disable CCM int_mem_clk_lpm before entering DSM and
enable it after resume, as the whole ARM core will be powered
down in DSM.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00275023-2 ARM: imx: Correct CCM_CGPR bit17's name
Anson Huang [Wed, 14 Aug 2013 17:17:51 +0000 (13:17 -0400)]
ENGR00275023-2 ARM: imx: Correct CCM_CGPR bit17's name

Correct CCM_CGPR bit17's name according to latest RM,
it is called INT_MEM_CLK_LPM.

Add parameter for setting CCM_CGPR_INT_MEM_CLK_LPM to
support both enable and disable setting.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00275023-1 ARM: imx: Enable unsafe resume for MMC
Anson Huang [Wed, 14 Aug 2013 15:26:46 +0000 (11:26 -0400)]
ENGR00275023-1 ARM: imx: Enable unsafe resume for MMC

As we often use SD/MMC rootfs, need to enable this configuration
for successfully resume of rootfs, otherwise, rootfs will be
broken after resume.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00275385 touch: imx_v6_v7_defconfig: enable egalax single-touch support
Luwei Zhou [Thu, 15 Aug 2013 04:39:33 +0000 (12:39 +0800)]
ENGR00275385 touch: imx_v6_v7_defconfig: enable egalax single-touch support

Enable egalax touchscreen single-touch support in imx_v6_v7_defconfig.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275384 touch: config: Add egalax touch support in Kconfig
Luwei Zhou [Thu, 15 Aug 2013 04:20:19 +0000 (12:20 +0800)]
ENGR00275384 touch: config: Add egalax touch support in Kconfig

Add  egalax touchscreen as single-touch support in Kconfig.

Signed-off-by: Luwei Zhou <B45643@freescale.com>
11 years agoENGR00275377 mxc: asrc: add asrc uapi header to Kbuild
Shengjiu Wang [Thu, 15 Aug 2013 02:54:43 +0000 (10:54 +0800)]
ENGR00275377  mxc: asrc: add asrc uapi header to Kbuild

add asrc uapi header to Kbuild.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00275070 arm: dts: add hdmi properties to i.mx6 sabreauto dts
Sandor Yu [Wed, 14 Aug 2013 05:32:42 +0000 (13:32 +0800)]
ENGR00275070 arm: dts: add hdmi properties to i.mx6 sabreauto dts

- Add hdmi properties to dts for sabreauto board.
- Remove lcd properties from sabreauto dts, because no parallel lcd
  panel for sabresdauto board.
- Change the primary lvds channel from 1 to 0 for the sabreauto board.
- Set hdmi as default secondly display for all i.mx6 board.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00275310 mxc: asrc: update asrc by dma_slave_config is updated.
Shengjiu Wang [Wed, 14 Aug 2013 10:54:02 +0000 (18:54 +0800)]
ENGR00275310 mxc: asrc: update asrc by dma_slave_config is updated.

Because of adding two parameter in dma_slave_config, so asrc driver need to
be updated.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00275246-05: net: fec: add mac address init for imx25/imx53 fec
Fugang Duan [Wed, 14 Aug 2013 10:06:52 +0000 (18:06 +0800)]
ENGR00275246-05: net: fec: add mac address init for imx25/imx53 fec

Add mac address init for imx25/imx53 fec in restart function.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00275246-04: net: fec: fix phy reset operation
Fugang Duan [Wed, 14 Aug 2013 09:55:25 +0000 (17:55 +0800)]
ENGR00275246-04: net: fec: fix phy reset operation

Current driver only do phy reset in probe function, which is
not right. Since some phy clock is disabled after module probe,
the phy enter abnormal status, which needs do reset to recovery
the phy. And do ifconfig ethx up/down test, the phy also enter
abnormal status.

The log as:
libphy: 2188000.ethernet:04 - Link is Up - 10/Full
libphy: 2188000.ethernet:04 - Link is Up - 100/Full
libphy: 2188000.ethernet:04 - Link is Down
libphy: 2188000.ethernet:04 - Link is Up - 10/Half
libphy: 2188000.ethernet:04 - Link is Up - 10/Full
libphy: 2188000.ethernet:04 - Link is Up - 100/Full
...

So, do phy reset if ethx up/down or do clock enable/disable
operation.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00275246-03: ARM: imx6sl: config iomux-gpr1 to select clock for fec
Fugang Duan [Wed, 14 Aug 2013 08:26:19 +0000 (16:26 +0800)]
ENGR00275246-03: ARM: imx6sl: config iomux-gpr1 to select clock for fec

Config iomux-gpr1 to select clock source for fec system clock.
Clear gpr1[14], gpr1[18-17] bit to select the fec clock source
from internal anatop PLL.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00275246-02: ARM: imx6sl: add imx6sl iomux-gpr field define
Fugang Duan [Wed, 14 Aug 2013 08:17:15 +0000 (16:17 +0800)]
ENGR00275246-02: ARM: imx6sl: add imx6sl iomux-gpr field define

Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
add fec related macro define.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00275246-01: ARM: dts: add fec phy reset for imx6sl evk board
Fugang Duan [Wed, 14 Aug 2013 08:08:29 +0000 (16:08 +0800)]
ENGR00275246-01: ARM: dts: add fec phy reset for imx6sl evk board

Add fec phy reset for imx6sl evk board.
Add iomux gpr device node, which used for fec to clear gpr1[14],
gpr1[18-17] bit to select the fec clock sourcr from internal anatop PLL.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00274585-9 ASoC: change error message to debug message
Shengjiu Wang [Fri, 9 Aug 2013 06:45:51 +0000 (14:45 +0800)]
ENGR00274585-9 ASoC: change error message to debug message

This error message is not actual error, which is a warning. When using
FE/BE, if there is widget which is used by playback and capture route, then
this message will be printed.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-8 arm: defconfig: imx_v6_v7: enable cs42888
Shengjiu Wang [Fri, 9 Aug 2013 06:44:40 +0000 (14:44 +0800)]
ENGR00274585-8 arm: defconfig: imx_v6_v7: enable cs42888

build-in cs42888 by default.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-7 dtsi: add device tree for asrc p2p and esai.
Shengjiu Wang [Fri, 9 Aug 2013 06:43:05 +0000 (14:43 +0800)]
ENGR00274585-7 dtsi: add device tree for asrc p2p and esai.

add devicetree for asrc p2p and esai.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-6 ASoC: fsl: update format and buffer size in the pcm dma
Shengjiu Wang [Mon, 12 Aug 2013 06:17:13 +0000 (14:17 +0800)]
ENGR00274585-6 ASoC: fsl: update format and buffer size in the pcm dma

1. add 24bit format support.
2. enlarge the buffer size for ESAI.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-5 ASoC: fsl: add cs42888 machine driver.
Shengjiu Wang [Mon, 12 Aug 2013 06:16:32 +0000 (14:16 +0800)]
ENGR00274585-5 ASoC: fsl: add cs42888 machine driver.

add cs42888 machine driver.
add bindings document of cs42888 machine.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-4 ASoC: fsl: add esai driver
Shengjiu Wang [Mon, 12 Aug 2013 06:12:36 +0000 (14:12 +0800)]
ENGR00274585-4 ASoC: fsl: add esai driver

add esai driver.
add bindings documentation of esai

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-3 ASoC: fsl: add asrc p2p driver.
Shengjiu Wang [Mon, 12 Aug 2013 06:08:08 +0000 (14:08 +0800)]
ENGR00274585-3 ASoC: fsl: add asrc p2p driver.

add asrc p2p driver.
add bindings document of asrc p2p.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-2 ASoC: codec: add codec driver cs42888
Shengjiu Wang [Fri, 9 Aug 2013 06:31:41 +0000 (14:31 +0800)]
ENGR00274585-2 ASoC: codec: add codec driver cs42888

Add codec driver cs42888.
Add bindings document for cs42888 audio codec.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274585-1 dma: imx-sdma: update sdma to support p2p
Shengjiu Wang [Fri, 9 Aug 2013 06:41:11 +0000 (14:41 +0800)]
ENGR00274585-1 dma: imx-sdma: update sdma to support p2p

For the sake of support asrc p2p, the sdma driver need to be updated.

1. Add another dma_request, p2p need two dma_request.
2. There are some cases which need to change the config after the
dma_request_channel. add dma_request config in dmaengine_slave_config().
3. add dma_request0 and dma_request1 in dma_slave_config for runtime config
in dmaengine_slave_config.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
11 years agoENGR00274412-3 ARM: imx_v6_v7_defconfig: enable ePxP driver
Robby Cai [Tue, 13 Aug 2013 09:33:16 +0000 (17:33 +0800)]
ENGR00274412-3 ARM: imx_v6_v7_defconfig: enable ePxP driver

Enable ePxP DMAENGINE driver by default.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00274412-2 ARM: dts: enable ePxP for imx6dl_sd and imx6sl_evk
Robby Cai [Mon, 12 Aug 2013 07:07:18 +0000 (15:07 +0800)]
ENGR00274412-2 ARM: dts: enable ePxP for imx6dl_sd and imx6sl_evk

Enable ePxP in DTS for imx6 duallite sabresd and imx6 sololite evk board.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00274412-1 dma: pxp: Port ePxP driver to 3.10
Robby Cai [Thu, 8 Aug 2013 03:23:54 +0000 (11:23 +0800)]
ENGR00274412-1 dma: pxp: Port ePxP driver to 3.10

It's ported from v3.5.7, which contains ePxP DMAENGINE driver and
a client driver named pxp_device. This patch also includes the changes:
- use uapi header file
- remove VM_RESERVED since it's deprecated, and drop redundant VM_IO flag
  since it's automatically set in remap_pfn_range()
- use <linux/platform_data/dma-imx.h> instead of <mach/dma.h>
- use devm_kzalloc() instead in pxp_probe()
- use macro __KERNEL__ in pxp_dma uapi header to avoid definition conflict

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00274059-02 ARM: Add new dts for imx6q/imx6dl SabreSD hdcp
Sandor Yu [Tue, 13 Aug 2013 08:55:20 +0000 (16:55 +0800)]
ENGR00274059-02 ARM: Add new dts for imx6q/imx6dl SabreSD hdcp

hdcp ddc pins conflict with i2c2,
add new dts file for imx6q and imx6dl SabreSD board,
enable hdcp and disable i2c2 in these dts files.
Remove hdmi pins property from mx6qdl-sabresd.dtsi.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274059-01 MX6 HDMI: Add fsl,hdcp property
Sandor Yu [Tue, 13 Aug 2013 08:48:32 +0000 (16:48 +0800)]
ENGR00274059-01 MX6 HDMI: Add fsl,hdcp property

- Initialize hdmi driver to support hdcp according dts property fsl,hdcp.
- Remove unused code.
- Add fsl,hdcp property description in mxc_hdmi_video.txt

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274226-03 HDMI DTS: Add prefix "fsl" to mxc specific dts properties.
Sandor Yu [Wed, 7 Aug 2013 11:26:55 +0000 (19:26 +0800)]
ENGR00274226-03 HDMI DTS: Add prefix "fsl" to mxc specific dts properties.

Add prefix "fsl" to mxc specific dts properties.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274226-02 MX6 HDMI: Add prefix "fsl" to mxc specific dts properties.
Sandor Yu [Wed, 7 Aug 2013 11:18:11 +0000 (19:18 +0800)]
ENGR00274226-02 MX6 HDMI: Add prefix "fsl" to mxc specific dts properties.

- Add prefix "fsl" to mxc specific dts properties.
- imx_hdmi_type will been referenced by app move it to mxc_hdmi.h.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274226-01 MX6 HDMI: document for mxc specific properties.
Sandor Yu [Wed, 7 Aug 2013 11:12:28 +0000 (19:12 +0800)]
ENGR00274226-01 MX6 HDMI: document for mxc specific properties.

Add hdmi core and video dts properties description document.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274055 MX6 HDMI: Enable HDMI video in defconfig
Sandor Yu [Tue, 6 Aug 2013 11:20:38 +0000 (19:20 +0800)]
ENGR00274055 MX6 HDMI: Enable HDMI video in defconfig

Enable i.MX6 HDMI video in defconfig

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274031 MX6: Move HDMI core menu into multifunction device drivers
Sandor Yu [Tue, 6 Aug 2013 09:14:27 +0000 (17:14 +0800)]
ENGR00274031 MX6: Move HDMI core menu into multifunction device drivers

Move MX6 HDMI core driver menu into Multifunction device drivers menu

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274026 MX6 Clock: Replace imx_clk_mux2 function with imx_clk_mux_flags
Sandor Yu [Tue, 6 Aug 2013 09:04:22 +0000 (17:04 +0800)]
ENGR00274026 MX6 Clock: Replace imx_clk_mux2 function with imx_clk_mux_flags

The function of imx_clk_mux2 is cover by imx_clk_mux_flags.
Remove imx_clk_mux2 and replace with imx_clk_mux_flags function.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00274473-6 ARM: dts: imx6qdl: pass clocks and regulator to gpc
Anson Huang [Thu, 8 Aug 2013 22:24:38 +0000 (18:24 -0400)]
ENGR00274473-6 ARM: dts: imx6qdl: pass clocks and regulator to gpc

Now that gpc module is a platform driver, pass related
clocks and regulator from dts.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00274473-5 ARM: imx: Support PU regulator on/off dynamically
Anson Huang [Thu, 8 Aug 2013 21:20:39 +0000 (17:20 -0400)]
ENGR00274473-5 ARM: imx: Support PU regulator on/off dynamically

1. Change GPC to platform driver to support regulator nofication
in order to implement dynamical PU regulator on/off;

2. Remove previous enabling PU regulator during kernel boot up,
PU modules will handle it.

3. Support dynamical PU regulator on/off according to regulator
notification.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00274473-4 mxc: gpu-viv: support regulator on/off
Anson Huang [Thu, 8 Aug 2013 21:19:08 +0000 (17:19 -0400)]
ENGR00274473-4 mxc: gpu-viv: support regulator on/off

Support PU regulator dynamical on/off on kernel v3.10.

Acked-by: Jason Liu
Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00274473-3 ARM: dts: imx6qdl: remove PU LDO always-on attribute
Anson Huang [Thu, 8 Aug 2013 21:15:19 +0000 (17:15 -0400)]
ENGR00274473-3 ARM: dts: imx6qdl: remove PU LDO always-on attribute

PU regulator can be turned off when there is no PU module
running, so remove always-on attribute.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00274473-2 regulator: anatop: implement more callback
Anson Huang [Thu, 8 Aug 2013 21:12:06 +0000 (17:12 -0400)]
ENGR00274473-2 regulator: anatop: implement more callback

Need to support anatop PU regulator on/off dynamically,
so we need to add enable/disable/is_enabled/enable_time
for anatop regulator.

Only PU regulator in anatop can support dynamical on/off,
so this implement is only for PU regulator, other regulators
are always on.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00274473-1 regulator: add more notifier events
Anson Huang [Thu, 8 Aug 2013 21:05:38 +0000 (17:05 -0400)]
ENGR00274473-1 regulator: add more notifier events

Some hardware modules need strict flows according
to regulator's enable/disable, such as for i.MX6
SOC's PU regulator, there is another power gate
in GPC module, it needs to disable PU modules' clock
before PU regulator is disabled and need to enable
clock right after PU regulator is enabled, then it
can do GPC's power gate operation.

So we need to add REGULATOR_EVENT_PRE_DISABLE and
REGULATOR_EVENT_ENABLE for regulator's notifier events.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoARM: dts: imx6q: add quirky select input for USB_OTG_ID
Shawn Guo [Thu, 1 Aug 2013 04:22:04 +0000 (12:22 +0800)]
ARM: dts: imx6q: add quirky select input for USB_OTG_ID

For some reason, the select input of pin function USB_OTG_ID is not
implemented via a regular select input register but using the bit
USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4).

As per the workaround for such quirk implemented in pinctrl driver,
we need to compose the input_val cell as below.

31     23      15      7        0
| 0xff | shift | width | select |

Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and
0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
11 years agopinctrl: imx: work around select input quirk
Shawn Guo [Sun, 4 Aug 2013 13:39:23 +0000 (21:39 +0800)]
pinctrl: imx: work around select input quirk

The select input for some pin may not be implemented using the regular
select input register but the general purpose register.  A real example
is that imx6q designers found the select input for USB OTG ID pin is
missing at the very late stage, and can not add a new select input
register but have to use a general purpose register bit to implement it.

The patch adds a workaround for such select input quirk by interpreting
the input_val cell of pin function ID in a different way, so that all
the info that needed for setting up select input bits in general purpose
register could be decoded from there.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
11 years agoENGR00269945: ARM: imx6: report soc info via soc device
Shawn Guo [Tue, 13 Aug 2013 08:59:28 +0000 (16:59 +0800)]
ENGR00269945: ARM: imx6: report soc info via soc device

The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl.  With the support, user space can get soc related
info by looking at sysfs like below.

  $ cat /sys/devices/soc0/machine
  Freescale i.MX6 Quad SABRE Smart Device Board
  $ cat /sys/devices/soc0/family
  Freescale i.MX
  $ cat /sys/devices/soc0/soc_id
  i.MX6Q
  $ cat /sys/devices/soc0/revision
  1.2

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
11 years agoENGR00269945: ARM: imx: use imx_init_revision_from_anatop() on imx6sl
Shawn Guo [Tue, 13 Aug 2013 08:54:05 +0000 (16:54 +0800)]
ENGR00269945: ARM: imx: use imx_init_revision_from_anatop() on imx6sl

Add imx6sl support into imx_init_revision_from_anatop(), so that it can
be used to initialize cpu type and revision on imx6sl.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
11 years agoENGR00269945: ARM: imx6qdl: add a common function to initialize revision from anatop
Shawn Guo [Tue, 13 Aug 2013 06:59:43 +0000 (14:59 +0800)]
ENGR00269945: ARM: imx6qdl: add a common function to initialize revision from anatop

The patch creates a common function imx_init_revision_from_anatop() by
merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any
SoC that encodes revision info in anatop can use it to initialize
revision.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
11 years agoENGR00269945: ARM: imx6qdl: use common soc revision helpers
Shawn Guo [Tue, 13 Aug 2013 06:10:29 +0000 (14:10 +0800)]
ENGR00269945: ARM: imx6qdl: use common soc revision helpers

It calls imx_set_soc_revision() to set up soc revision in
imx6q_init_revision(), and replaces all the occurrences imx6q_revision()
and imx6dl_revision() with common helper imx_get_soc_revision().

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
11 years agoENGR00269945: ARM: imx: add soc revision helper functions
Shawn Guo [Tue, 13 Aug 2013 05:54:02 +0000 (13:54 +0800)]
ENGR00269945: ARM: imx: add soc revision helper functions

Similar to what we do for cpu type, the patch adds helper functions
imx_set_soc_revision() and imx_get_soc_revision() to maintain
imx_soc_revision in cpu.c.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
11 years agoENGR00274386-2 ASoC: imx-wm8962: Set MCLK source clock to 0Hz in hw_free()
Nicolin Chen [Tue, 13 Aug 2013 03:37:54 +0000 (11:37 +0800)]
ENGR00274386-2 ASoC: imx-wm8962: Set MCLK source clock to 0Hz in hw_free()

When DAPM closed WM8962 after playback, its driver would prompt
'wm8962 0-001a: Unsupported sysclk ratio 500' due to the invalid
divisor calculated by WM8962 codec driver.

To fix it, we can work around by setting its MCLK source to 0Hz,
so the codec driver would never get an invalid divisor any more.
Since hw_params() would re-set the MCLK source, no need to worry
about any side-effect.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00274386-1 ASoC: imx-wm8962: Fix 192KHz playback slow issue
Nicolin Chen [Thu, 8 Aug 2013 03:26:46 +0000 (11:26 +0800)]
ENGR00274386-1 ASoC: imx-wm8962: Fix 192KHz playback slow issue

We are using auto sample rate feature of WM8962, whereas it doesn't
support those sample rates bigger than 96KHz, 192Khz for example,
so 384 * samplerate would be too big for it to handle. When playing
192KHz 24bit wav file, the playback would be slower than normal.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00274761-3 Upgrade VPU driver for Linux 3.10 kernel
Hongzhang Yang [Mon, 12 Aug 2013 07:38:07 +0000 (15:38 +0800)]
ENGR00274761-3 Upgrade VPU driver for Linux 3.10 kernel

Modify mxc_vpu.c to adapt to kernel 3.10 change
- Remove all references to header files in mach folder
- Include linux/clk.h instead of mach/clock.h
- Call device_reset instead of imx_src_reset_vpu
- Dummy PU and PM api callings before they are ready
- Dummy cpu_is_mx5? api callings
- Remove VM_RESERVED flags
- Call gen_pool instead of iram_alloc

Modify mxc_vpu.h
- Change CONFIG_ARCH_MX6 to CONFIG_SOC_IMX6Q

Modify Kconfig:
- Change ARCH_MX? to SOC_IMX?, remove ARCH_MX3/ARCH_MX37
  because for MX3 series only SOC_IMX31 and SOC_IMX35 are
  defined in Linux 3.10, and these chips don't have VPU.
  Need to add SOC_IMX37 to VPU Kconfig if MX37 could be
  supported later.

Add VPU to config and build path
- mxc/Kconfig
- mxc/Makefile

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
11 years agoENGR00274761-2 Upgrade VPU driver for Linux 3.10 kernel
Hongzhang Yang [Mon, 12 Aug 2013 07:23:41 +0000 (15:23 +0800)]
ENGR00274761-2 Upgrade VPU driver for Linux 3.10 kernel

Add VPU node in dtsi
- Add VPU node (common part) in imx6qdl.dtsi. It was defined
  in imx6.dtsi in Linux 3.5.7.
- Add "iram" property for gen_pool api callings
- Add "resets" property for device_reset api calling
- Add VPU node (soc specific part) in imx6q.dtsi and imx6dl.dtsi

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
11 years agoENGR00274761-1 Upgrade VPU driver for Linux 3.10 kernel
Hongzhang Yang [Mon, 12 Aug 2013 07:14:23 +0000 (15:14 +0800)]
ENGR00274761-1 Upgrade VPU driver for Linux 3.10 kernel

Pick files from origin/imx_3.5.7 commit 135bf02a0727ea5ce96
- mxc_vpu.h is picked from arch/arm/plat-mxc/include/mach/
  and put to include/linux/
- drivers/mxc/vpu/Kconfig
- drivers/mxc/vpu/Makefile
- drivers/mxc/vpu/mxc_vpu.c

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
11 years agoENGR00274768-2 ARM: imx: Use irq #32 for cpuidle instead of irq #125
Anson Huang [Mon, 12 Aug 2013 21:17:57 +0000 (17:17 -0400)]
ENGR00274768-2 ARM: imx: Use irq #32 for cpuidle instead of irq #125

IRQ #125's status is not constant on different boards, IRQ #32 is
IOMUXC's interrupt which can be triggered manually at anytime, use
this irq instead of #125 to generate interrupt for avoiding CCM enter
low power mode by mistake.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00274768-1 ARM: imx6q: update gint bit definitions of IOMUXC_GPR1
Anson Huang [Mon, 12 Aug 2013 21:13:52 +0000 (17:13 -0400)]
ENGR00274768-1 ARM: imx6q: update gint bit definitions of IOMUXC_GPR1

Need to use IOMUXC_GPR1_GINT bit for cpuidle driver, so update this
bit's definitions.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00269945: ARM: imx6sl: initialize use count of IPG clock
Shawn Guo [Tue, 13 Aug 2013 01:16:52 +0000 (09:16 +0800)]
ENGR00269945: ARM: imx6sl: initialize use count of IPG clock

We're running into a system hang during imx6sl boot.  It's been tracked
down to SDMA driver function sdma_init().  System hangs immediately
after the clk_disable() is called in sdma_init().

It turns out that the issue is caused by IPG bus clock which is the
parent of sdma clock is turned off accidentally due to the incorrect
initial use count.  IPG clock is initial on and should be always on
when system operates.  But the use count of the clock is zero initially.
So when the last child clock gets disabled, the use count of IPG clock
reaches zero, and thus clock framework will turn off IPG clock (and
possibly parent clocks along the way), and causes the system hang.

Let's initialize the use count of IPG clock by calling
clk_prepare_enable() on it to match the on state of the clock, so that
the clock will not be turned off accidentally.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
11 years agoENGR00269945: ARM: dts: imx6sl reuses imx6q sdma firmware
Shawn Guo [Tue, 13 Aug 2013 00:55:02 +0000 (08:55 +0800)]
ENGR00269945: ARM: dts: imx6sl reuses imx6q sdma firmware

There is no imx6sl specific sdma firmware.  Instead, imx6sl reuses
imx6q sdma firmware.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
11 years agoENGR00274821 ARM: Add i.MX6 FB properties to dts for SabreAuto board
Sandor Yu [Mon, 12 Aug 2013 10:51:52 +0000 (18:51 +0800)]
ENGR00274821 ARM: Add i.MX6 FB properties to dts for SabreAuto board

- Add Framebuffer and ldb properties to dts for i.MX6Q and
i.MX6DL SabreAuto board.
- Add PWM3 and backlight properties to dts for i.MX6Q and
i.Mx6DL SabreAuto board.
- fix i2c2 indent in dts.

Signed-off-by: Sandor Yu <R01008@freescale.com>