Nicolai Hähnle [Thu, 16 Feb 2017 22:49:12 +0000 (23:49 +0100)]
drm/amdgpu: refuse to reserve io mem for split VRAM buffers
When the fast blit path fails while attempting to move a buffer from RAM
to VRAM, we fall back to a CPU-based memcpy that cannot handle split VRAM
buffers. Instead of crashing, simply fail the buffer move.
Ideally, we would teach TTM about split buffers so that the fallback still
works in this case, but that is quite involved. So for now, apply the
simplest possible fix.
Fixes: 40361bb1704b ("drm/amdgpu: add VRAM manager v2") Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicolai Hähnle [Sat, 18 Feb 2017 21:59:56 +0000 (22:59 +0100)]
drm/ttm: fix use-after-free races in vm fault handling
The vm fault handler relies on the fact that the VMA owns a reference
to the BO. However, once mmap_sem is released, other tasks are free to
destroy the VMA, which can lead to the BO being freed. Fix two code
paths where that can happen, both related to vm fault retries.
Found via a lock debugging warning which flagged &bo->wu_mutex as
locked while being destroyed.
Fixes: cbe12e74ee4e ("drm/ttm: Allow vm fault retries") Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jim Qu [Fri, 10 Feb 2017 07:59:59 +0000 (15:59 +0800)]
drm/amd/amdgpu: post card if there is real hw resetting performed
Check whether we need to post rather than whether the asic is
posted. There are some cases (e.g., GPU reset or resume from
hibernate) where we need to force post even if the asic has
been posted.
Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 17 Feb 2017 02:04:09 +0000 (12:04 +1000)]
Merge tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next
omapdrm fixes for v4.11
Fix regressions:
- Planes might have been left enabled
- Scaling checks did not use the new config
Also limit downscaling decimation to prevent HW underflows.
* tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux:
drm/omapdrm: dispc: Refuse x-decimation above 4 for all but 8-bit formats
drm/omapdrm: Move commit_modeset_enables() before commit_planes()
Revert "drm: omapdrm: Let the DRM core skip plane commit on inactive CRTCs"
Dave Airlie [Fri, 17 Feb 2017 01:55:12 +0000 (11:55 +1000)]
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
Fixes for 4.11. Highlights:
- fix >2 displays on asics with 3 or 5 crtcs
- fix SI headless asics
- powerplay fixes for new polaris variants
- misc fixes
* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: fix warning on older gcc releases
drm/ttm: make TTM_MAX_BO_PRIORITY unsigned
drm/amd/amdgpu: Fix flow control in uvd_v4_2_stop()
drm/amd/powerplay: add didt config table for polaris kicker
drm/amd/powerplay: modify VddcPhase value for polaris kicker
drm/amd/powerplay: add kicker flag into smumgr
drm/amdgpu: Initialize pipe priority order on graphic initialization
drm/amdgpu: read hw register to check pg status.
drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register
drm/amdgpu/pm: check for headless before calling compute_clocks
drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()
drm/amdgpu: add more cases to DCE11 possible crtc mask setup
Arnd Bergmann [Fri, 3 Feb 2017 16:47:26 +0000 (17:47 +0100)]
drm/amdgpu: fix warning on older gcc releases
gcc-4.8 warns about '{0}' being used an an initializer for nested structures:
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function ‘gfx_v8_0_ring_emit_ce_meta_init’:
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:7263:2: warning: missing braces around initializer [-Wmissing-braces]
} ce_payload = {0};
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function ‘gfx_v8_0_ring_emit_de_meta_init’:
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:7290:2: warning: missing braces around initializer [-Wmissing-braces]
} de_payload = {0};
Using an empty {} initializer however has the same effect and works on all versions.
Nicolai Hähnle [Tue, 14 Feb 2017 10:06:52 +0000 (11:06 +0100)]
drm/ttm: make TTM_MAX_BO_PRIORITY unsigned
Fix a warning about different types in min() macro in amdgpu:
In file included from ./include/linux/list.h:8:0,
from drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:32:
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function ‘amdgpu_bo_create_restricted’:
./include/linux/kernel.h:739:16: warning: comparison of distinct pointer types lacks a cast
(void) (&min1 == &min2); \
^
./include/linux/kernel.h:742:2: note: in expansion of macro ‘__min’
__min(typeof(x), typeof(y), \
^~~~~
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:434:21: note: in expansion of macro ‘min’
bo->tbo.priority = min(bo->tbo.priority, TTM_MAX_BO_PRIORITY - 1);
^~~
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 13 Feb 2017 19:11:40 +0000 (14:11 -0500)]
drm/amd/amdgpu: Fix flow control in uvd_v4_2_stop()
Break out of outer loop properly.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jyri Sarha [Wed, 8 Feb 2017 14:08:06 +0000 (16:08 +0200)]
drm/omapdrm: dispc: Refuse x-decimation above 4 for all but 8-bit formats
Let's disable all scaling that requires horizontal decimation with
higher factor than 4, until we have better estimates of what we can
and can not do. However, NV12 color format appears to work Ok with
all decimation factors.
When decimating horizontally by more that 4 the dss is not able to
fetch the data in burst mode. When this happens it is hard to tell if
there enough bandwidth. Despite what theory says this appears to be
true also for 16-bit color formats.
Jyri Sarha [Fri, 27 Jan 2017 10:04:55 +0000 (12:04 +0200)]
drm/omapdrm: Move commit_modeset_enables() before commit_planes()
Move drm_atomic_helper_commit_modeset_enables() call to before
drm_atomic_helper_commit_planes() call and have a
omap_atomic_wait_for_completion() call after both.
With the current dss dispc implementation we have to enable the new
modeset before we can commit planes. The dispc ovl configuration
relies on the video mode configuration been written into the HW when
the ovl configuration is calculated.
This approach is not ideal because after a mode change the plane
update is executed only after the first vblank interrupt. The dispc
implementation should be fixed so that it is able use uncommitted drm
state information. information.
Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
If planes are not disabled when the they are not on any crtc anymore
they will remain active and may show as "ghosts" when the crtc they
were last on is active again.
Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Dave Airlie [Thu, 16 Feb 2017 03:57:37 +0000 (13:57 +1000)]
Merge branch 'drm-rockchip-next-2017-02-16' of https://github.com/markyzq/kernel-drm-rockchip into drm-next
Use iommu for rockchip arm64 platform.
* 'drm-rockchip-next-2017-02-16' of https://github.com/markyzq/kernel-drm-rockchip:
drm/rockchip: Use common IOMMU API to attach devices
drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain
Dave Airlie [Thu, 16 Feb 2017 03:27:24 +0000 (13:27 +1000)]
Merge tag 'sti-drm-next-2017-02-10' of https://github.com/vinceab/linux into drm-next
- remove deprecated stih416 chip functionnalities
- fix issues met around gdp panes
- fix STI driver unbind procedure
- DVI/HDMI mode is automatically detected
- allow fps statisitics resetting
* tag 'sti-drm-next-2017-02-10' of https://github.com/vinceab/linux:
drm/sti: debug fps reset
drm/sti: hdmi: automatically check DVI/HDMI mode
drm/sti: unbind all components while driver cleanup
drm/sti: do not post GDP command if no update
drm/sti: do not set gdp pixel clock rate if mode is not set
drm/sti: enable gdp pixel clock in atomic_update
drm/sti: remove deprecated legacy vtg slave
drm/sti: remove deprecated sink_term config
drm/sti: do not check hw scaling if mode is not set
drm/sti: Fix up crtc_state->event handling
drm/sti: use atomic_helper for commit
drm/core: Do not preserve framebuffer on rmfb, v4.
This introduces a slight behavioral change to rmfb. Instead of
disabling a crtc when the primary plane is disabled, we try to
preserve it.
Apart from old versions of the vmwgfx xorg driver, there is
nothing depending on rmfb disabling a crtc. Since vmwgfx is
a legacy driver we can safely only disable the plane with atomic.
If this commit is rejected by the driver then we will still fall
back to the old behavior and turn off the crtc.
v2:
- Remove plane->fb assignment, done by drm_atomic_clean_old_fb.
- Add WARN_ON when atomic_remove_fb fails.
- Always call drm_atomic_state_put.
v3:
- Use drm_drv_uses_atomic_modeset
- Handle the case where the first plane-disable-only commit fails
with -EINVAL. Some drivers do not support this, fall back to
disabling all crtc's in this case.
Shunqian Zheng [Fri, 24 Jun 2016 02:13:32 +0000 (10:13 +0800)]
drm/rockchip: Use common IOMMU API to attach devices
Rockchip DRM used the arm special API, arm_iommu_*(), to attach
iommu for ARM32 SoCs. This patch convert to common iommu API
so it would support ARM64 like RK3399.
Since previous patch added support for direct IOMMU address space
management, there is no need to use DMA API anymore and this patch wires
things to use the new method.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Tomasz Figa [Fri, 24 Jun 2016 02:13:31 +0000 (10:13 +0800)]
drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain
The API is not suitable for subsystems consisting of multiple devices
and requires severe hacks to use it. To mitigate this, this patch
implements allocation and address space management locally by using
helpers provided by DRM framework, like other DRM drivers do, e.g.
Tegra.
This patch should not introduce any functional changes until the driver
is made to attach subdevices into an IOMMU domain with the generic IOMMU
API, which will happen in following patch. Based heavily on GEM
implementation of Tegra DRM driver.
Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: rjan Eide <orjan.eide@arm.com>
As part of c11e391da2a8fe973c3c2398452000bed505851e "dma-buf: Add ioctls to
allow userspace to flush" a new uapi header file dma-buf.h was added, but an
entry was not added on Kbuild to install it. This patch resolves this omission
so that "make headers_install" installs this header.
Signed-off-by: Denys Dmytriyenko <denys@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: David Herrmann <dh.herrmann@gmail.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Tiago Vignatti <tiago.vignatti@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1487102447-59265-1-git-send-email-denis@denix.org
ozeng [Fri, 10 Feb 2017 23:55:36 +0000 (17:55 -0600)]
drm/amdgpu: Initialize pipe priority order on graphic initialization
Initialized PIPE_ORDER_TS0/1/2/3 field of SPI_ARB_PRIORITY register to 2.
This set the pipe priority order to:
02 - HP3D, CS_H, GFX, CS_M, CS_L
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alan Harrison [Thu, 9 Feb 2017 21:01:57 +0000 (16:01 -0500)]
drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register
Add a bit needed during initialization into the driver, where it is supposed
to be. Currently, this is happening in the VCE firmware, and although
functional, this is the correct place to perform this initialization.
Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alan Harrison <Alan.Harrison@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samuel Pitoiset [Thu, 9 Feb 2017 22:28:24 +0000 (23:28 +0100)]
drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()
This removes code duplication.
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Vincent Abriou [Thu, 2 Feb 2017 08:50:48 +0000 (09:50 +0100)]
drm/sti: do not post GDP command if no update
Do not process update requests with unmodified parameters.
This typically happens when the driver is called with legacy
(non-atomic) IOCTL : in that case atomic_update() is called multiple
times with the same parameters.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Vincent Abriou [Thu, 2 Feb 2017 08:49:02 +0000 (09:49 +0100)]
drm/sti: do not set gdp pixel clock rate if mode is not set
Fix a division by 0 case : in some cases, when the GDP plane is being
disabled atomic_check() is called with "mode->clock = 0".
In that case, do not set parent and pixel clock rate.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Vincent Abriou [Thu, 2 Feb 2017 08:52:32 +0000 (09:52 +0100)]
drm/sti: remove deprecated legacy vtg slave
stih416 chip family is no more supported in Linux v4.9.
It is then useless to keep vtg slave field since it not used at all for
the stih407/10 chip family supported by sti driver.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Vincent Abriou [Wed, 1 Feb 2017 17:04:00 +0000 (18:04 +0100)]
drm/sti: remove deprecated sink_term config
stih416 chip family is no more supported in Linux v4.9.
Then sink_term config becomes useless. The field of the
register it was referring to is tag as reserved for stih410
chip family.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Fabien DESSENNE [Thu, 12 Jan 2017 16:27:37 +0000 (17:27 +0100)]
drm/sti: do not check hw scaling if mode is not set
Fix a division by 0 case : in some cases, when the HQVDP plane is being
disabled atomic_check() is called with "mode->clock = 0".
In that case, do not check for scaling capabilities.
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Acked-by: Vincent Abriou <vincent.abriou@st.com>
Dave Airlie [Fri, 10 Feb 2017 00:13:30 +0000 (10:13 +1000)]
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
Some additional fixes for 4.11. Delayed a bit due to Chinese New Year. Highlights:
- Powerplay fixes
- VCE and UVD powergating fixes
- Clean up amdgpu SI gfx code to match CI and VI
- Misc bug fixes
* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (30 commits)
drm/amdgpu: report the number of bytes moved at buffer creation
drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
drm/amdgpu: add support for new smc firmware on polaris
drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
drm/amdgpu: shut up #warning for compile testing
drm/amdgpu/virt: fix double kfree on bo_va
drm/radeon: remove some dead code
drm/radeon: avoid kernel segfault in vce when gpu fails to resume
drm/amd/powerplay: set fan speed to max in profile peak mode only.
drm/amd/gfx6: update gb_addr_config
drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
drm/amdgpu: refine si_read_register
drm/amdgpu/gfx6: clean up spi configuration
drm/amdgpu/gfx6: clean up cu configuration
drm/amdgpu/gfx6: clean up rb configuration
drm/amdgpu: refine vce3.0 code and related powerplay pg code.
drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
drm/amdgpu: enable vce pg feature on Kv.
drm/amdgpu: refine code for VCE2.0 and related dpm code.
...
Dave Airlie [Fri, 10 Feb 2017 00:12:56 +0000 (10:12 +1000)]
Merge tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next
two minor fixes.
* tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu:
drm/fsl-dcu: check for clk_prepare_enable() error
drm/fsl-dcu: remove unneeded 'ret' assignment
Dave Airlie [Fri, 10 Feb 2017 00:12:00 +0000 (10:12 +1000)]
Merge tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc into drm-next
Just 3 bugfixes for 4.11 merge window:
- fbdev module unload oops fix from Chris
- patch from Dan that look really dangers, better safe than sorry
* tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc:
drm/atomic: fix an error code in mode_fixup()
drm: Cancel drm_fb_helper_resume_work on unload
drm: Cancel drm_fb_helper_dirty_work on unload
Samuel Pitoiset [Thu, 9 Feb 2017 10:33:37 +0000 (11:33 +0100)]
drm/amdgpu: report the number of bytes moved at buffer creation
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.
v2: fix computation
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samuel Pitoiset [Thu, 9 Feb 2017 10:33:36 +0000 (11:33 +0100)]
drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
When ttm_bo_init() fails, the reservation mutex should be unlocked.
In debug build, the kernel reported "possible recursive locking
detected" in this codepath. For debugging purposes, I also added
a "WARN_ON(ww_mutex_is_locked())" when ttm_bo_init() fails and the
mutex was locked as expected.
This should fix (random) GPU hangs. The easy way to reproduce the
issue is to change the "Super Sampling" option from 1.0 to 2.0 in
Hitman. It will create a huge buffer, evict a bunch of buffers
(around ~5k) and deadlock.
This regression has been introduced pretty recently.
v2: only release the mutex if resv is NULL
Fixes: 12a852219583 ("drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Wed, 1 Feb 2017 15:59:21 +0000 (16:59 +0100)]
drm/amdgpu: shut up #warning for compile testing
My randconfig tests on linux-next showed a newly introduced warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function 'amdgpu_bo_create_restricted':
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:377:2: error: #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance thanks to write-combining [-Werror=cpp]
Generally speaking, warnings about bad kernel configuration are not particularly
helpful. We could enforce the selection of X86_PAT through Kconfig, so the driver
cannot even be used unless it is enabled, or we could just rely on the runtime
warning that is also there.
In this version, I'm making the warning conditional on CONFIG_COMPILE_TEST, which
shuts it up for me, but not people that may actually want to run the kernel
as a compromize.
Fixes: a2e2f29970aa ("drm/amdgpu: Bring bo creation in line with radeon driver (v2)") Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Fri, 3 Feb 2017 20:23:42 +0000 (20:23 +0000)]
drm/amdgpu/virt: fix double kfree on bo_va
bo_va is being kfree'd twice, once in the call to amdgpu_vm_bo_rmv
and then a short while later. Fix this double free by removing
the 2nd kfree.
Detected by CoverityScan, CID#1399524 ("Double Free")
Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dan Carpenter [Tue, 7 Feb 2017 13:16:04 +0000 (16:16 +0300)]
drm/radeon: remove some dead code
If "rdev->bios" is NULL then we don't need to free it.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérôme Glisse [Mon, 6 Feb 2017 20:13:18 +0000 (15:13 -0500)]
drm/radeon: avoid kernel segfault in vce when gpu fails to resume
When GPU fails to resume we can not trust that value we write to GPU
memory will post and we might get garbage (more like 0xffffffff on
x86) when reading them back. This trigger out of range memory access
in the kernel inside the vce resume code path.
This patch use canonical value to compute offset instead of reading
back value from GPU memory.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 26 Jan 2017 02:47:00 +0000 (10:47 +0800)]
drm/amdgpu: refine vce3.0 code and related powerplay pg code.
1. not start vce3.0 when hw_init
2. stop vce3.0 when vce idle.
3. pg mask used to ctrl power down/up vce.
4. change cg pg sequence in powerplay.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 26 Jan 2017 08:46:22 +0000 (16:46 +0800)]
drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 25 Jan 2017 08:50:15 +0000 (16:50 +0800)]
drm/amdgpu: enable vce pg feature on Kv.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 26 Jan 2017 08:25:05 +0000 (16:25 +0800)]
drm/amdgpu: refine code for VCE2.0 and related dpm code.
v2: clean up vce cg function.
use sw cg when vce stoped.
1. implement vce_stop function.
2. not start vce when hw_init.
3. refine vce cg/pg code.
4. delete bypass mode.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 25 Jan 2017 09:35:14 +0000 (17:35 +0800)]
drm/amdgpu: when dpm disabled, also need to stop/start vce.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 20 Jan 2017 09:46:34 +0000 (17:46 +0800)]
drm/amdgpu: refine uvd5.0/6.0 code.
1. delete redundant cg pg mask check.
pg mask use to ctrl power on/down uvd.
not start/stop uvd.
cg mask will be check when enable mgcg.
2. no need to start uvd when initializ.
when ring test/ib test/encode, uvd was enabled.
when uvd idle, uvd was stopped.
3. chang cg pg sequence in powerplay.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 20 Jan 2017 07:56:45 +0000 (15:56 +0800)]
drm/amdgpu: refine uvd4.2 init/stop code.
1. set uvd_status busy before uvd_start.
2. clear uvd_status to 0 after uvd stop.
smu firmware may check uvd_status.
3. wait uvd idle before stop uvd.
4. not start uvd when hw_init.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 20 Jan 2017 06:34:43 +0000 (14:34 +0800)]
drm/amdgpu: refine uvd pg code in kv_dpm.c
1. no need to set cg as use hw dynamic cg.
2. when uvd idle, stop uvd. encode, start uvd.
3. if pg feature enabled, power on/down uvd by smu.
4. drm/amdgpu: dpm do not set uvd pg status.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 20 Jan 2017 07:07:47 +0000 (15:07 +0800)]
drm/amdgpu: power down/up uvd4 when smu disabled.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 25 Jan 2017 04:17:59 +0000 (12:17 +0800)]
drm/amdgpu: add current_pg_status register define for smu7.1
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 20 Jan 2017 04:06:05 +0000 (12:06 +0800)]
drm/amdgpu: when dpm disabled, also can enable uvd cg/pg.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dan Carpenter [Tue, 7 Feb 2017 23:46:01 +0000 (02:46 +0300)]
drm/atomic: fix an error code in mode_fixup()
Having "ret" be a bool type works for everything except
ret = funcs->atomic_check(). The other functions all return zero on
error but ->atomic_check() returns negative error codes. We want to
propagate the error code but instead we return 1.
I found this bug with static analysis and I don't know if it affects
run time.
Fabio Estevam [Wed, 28 Dec 2016 16:48:48 +0000 (14:48 -0200)]
drm/fsl-dcu: check for clk_prepare_enable() error
clk_prepare_enable() may fail, so we should better check its return
value.
Also place the of_node_put() function right after clk_prepare_enable(),
in order to avoid calling of_node_put() twice in case clk_prepare_enable()
fails.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
Fabio Estevam [Wed, 28 Dec 2016 16:48:47 +0000 (14:48 -0200)]
drm/fsl-dcu: remove unneeded 'ret' assignment
When devm_kzalloc() fails there is no need to assign an error code
to the 'ret' variable as it will not be used after jumping to the
'err_node_put' label, so just remove the assignment.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Gabriel Krisman Bertazi <krisman@collabora.co.uk> Signed-off-by: Stefan Agner <stefan@agner.ch>
Dave Airlie [Wed, 8 Feb 2017 01:34:56 +0000 (11:34 +1000)]
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
Summary:
- Add UHD support on TM2/TM2E boards.
. adding interlace mode support and 297MHz pixel clock support
for UHD mode, setting sysreg register in case of HW trigger mode,
and adding SiI8620 MHL bridge device support.
- Fix trigger mode issue on Rinato board.
. On Rinato board, HW trigger mode doesn't work so fix it.
- Some fixup and cleanup.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
drm/exynos: fimd: Do not use HW trigger for exynos3250
drm/exynos/hdmi: add bridge support
drm/exynos/decon5433: signal vblank only on odd fields
drm/exynos/decon5433: add support for interlace modes
drm/exynos/hdmi: fix PLL for 27MHz settings
drm/exynos/hdmi: fix VSI infoframe registers
drm/exynos/hdmi: add 297MHz pixel clock support
drm/exynos: g2d: change platform driver name to 'exynos-drm-g2d'
drm/exynos/decon5433: configure sysreg in case of hardware trigger
Hoegeun Kwon [Fri, 3 Feb 2017 06:12:16 +0000 (15:12 +0900)]
drm/exynos: fimd: Do not use HW trigger for exynos3250
Commit a6f75aa161c5 ("drm/exynos: fimd: add HW trigger support") added
hardware trigger support to the FIMD controller driver. I have tested
but this broke the display in at least the exynos3250 Gear 2. So until
the issue is fixed, avoid using HW trigger for the exynos3250 based
boards and use SW trigger as it was before the mentioned commit.
Andrzej Hajda [Wed, 1 Feb 2017 08:29:14 +0000 (09:29 +0100)]
drm/exynos/hdmi: add bridge support
On TM2/TM2e platforms HDMI output is connected to MHL bridge
SiI8620. To allow configure UltraHD modes on the bridge
and to eliminate unsupported modes this bridge should be
attached to drm_encoder implemented in exynos_hdmi.
Changelog v1:
- fix drm_attach_bridge argument.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 20 Jan 2017 06:52:23 +0000 (07:52 +0100)]
drm/exynos/decon5433: add support for interlace modes
Some registers should be programmed differently in interlace mode.
Additionally IP does not signal stop state properly in interlaced
mode, so warning has been removed.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Tobias Jakobi [Fri, 20 Jan 2017 16:02:51 +0000 (17:02 +0100)]
drm/exynos: g2d: change platform driver name to 'exynos-drm-g2d'
The current name is 's5p-g2d', which is identical with the driver
name of the old V4L2 driver in media/platform.
This is probably due to the DRM driver being based on the V4L2
driver when it was initially created. Still the clashing of driver
names is confusing, so rename it to something in line with the
other DRM subdrivers.
Mark Yao [Sun, 5 Feb 2017 09:10:57 +0000 (17:10 +0800)]
drm/rockchip: cdn-dp: fix cdn-dp complie warning
fix warning:
drivers/gpu/drm/rockchip/cdn-dp-reg.c:632:24: warning:
'val[1]' may be used uninitialized in this function [-Wmaybe-uninitialized]
msa_misc = 2 * val[0] + 32 * val[1] +
Dave Airlie [Tue, 7 Feb 2017 01:05:42 +0000 (11:05 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
The big things this time around are:
1) support for hw cursor on newer mdp5 devices (snapdragon 820+,
tested on db820c)
2) dsi encoder cleanup
3) gpu dt bindings cleanup so we can get the gpu nodes merged upstream
* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (32 commits)
drm/msm: return -EFAULT if copy_from_user() fails
drm/msm/dsi: Add PHY/PLL for 8x96
drm/msm/dsi: Add new method to calculate 14nm PHY timings
drm/msm/dsi: Move PHY operations out of host
drm/msm/dsi: Reset both PHYs before clock operation for dual DSI
drm/msm/dsi: Pass down use case to PHY
drm/msm/dsi: Return more timings from PHY to host
drm/msm/dsi: Add a PHY op that initializes version specific stuff
drm/msm/dsi: Add 8x96 info in dsi_cfg
drm/msm/dsi: Don't error if a DSI host doesn't have a device connected
drm/msm/mdp5: Add support for legacy cursor updates
drm/msm/mdp5: Refactor mdp5_plane_atomic_check
drm/msm/mdp5: Add cursor planes
drm/msm/mdp5: Misc cursor plane bits
drm/msm/mdp5: Configure COLOR3_OUT propagation
drm/msm/mdp5: Use plane helpers to configure src/dst rectangles
drm/msm/mdp5: Prepare CRTC/LM for empty stages
drm/msm/mdp5: Create only as many CRTCs as we need
drm/msm/mdp5: cfg: Change count to unsigned int
drm/msm/mdp5: Create single encoder per interface (INTF)
...
Dave Airlie [Tue, 7 Feb 2017 01:03:30 +0000 (11:03 +1000)]
Merge branch 'drm-rockchip-next-2017-02-05' of https://github.com/markyzq/kernel-drm-rockchip into drm-next
rockchip CDN-DP support.
* 'drm-rockchip-next-2017-02-05' of https://github.com/markyzq/kernel-drm-rockchip:
drm/rockchip: cdn-dp: don't configure hardware in mode_set
drm/rockchip: cdn-dp: retry to check sink count
drm/rockchip: cdn-dp: Move mutex_init to probe
drm/rockchip: cdn-dp: do not use drm_helper_hpd_irq_event
drm/rockchip: cdn-dp: Do not run worker while suspended
drm/rockchip: cdn-dp: Load firmware if no monitor connected
drm/rockchip: cdn-dp: add cdn DP support for rk3399
drm/rockchip: return ERR_PTR instead of NULL
drm/rockchip: vop: make vop register setting take effect
Dave Airlie [Tue, 7 Feb 2017 00:54:12 +0000 (10:54 +1000)]
Merge tag 'drm-misc-next-2017-02-03' of git://anongit.freedesktop.org/git/drm-misc into drm-next
Final 4.11 feature pull request:
- sii8520 bridge update from Andrzej
- ->release callback, maybe somewhen in the future we'll even get
drm_device lifetimes correct! (Chris Wilson)
- drm_mm search improvements, and good docs for different search
strategies now (Chris)
- simplify fbdev emulation init parameters (Gabriel)
- bunch of misc things all over
... and the first few patches from our small driver in drm-misc
experiment:
- cleanups for qxl and bochs from a few different people
- dsi support for vc4 (not yet the panel driver, that's under discussion
still) from Eric
- meson rename to meson-drm to distinguish from other platform drivers
(Neil Amstrong)
* tag 'drm-misc-next-2017-02-03' of git://anongit.freedesktop.org/git/drm-misc: (47 commits)
drm: kselftest for drm_mm and bottom-up allocation
drm: Improve drm_mm search (and fix topdown allocation) with rbtrees
drm: Fix build when FBDEV_EMULATION is disabled
drm: Rely on mode_config data for fb_helper initialization
drm: Provide a driver hook for drm_dev_release()
drm: meson: rename driver name to meson-drm
drm: meson: rename module name to meson-drm
drm/bridge/sii8620: enable interlace modes
drm/bridge/sii8620: enable MHL3 mode if possible
drm/bridge/sii8620: add HSIC initialization code
drm/bridge/sii8620: improve gen2 write burst IRQ routine
drm/bridge/sii8620: send EMSC features on request
drm/bridge/sii8620: rewrite hdmi start sequence
drm/bridge/mhl: add MHL3 infoframe related definitions
drm/bridge/sii8620: fix disconnect sequence
drm/bridge/sii8620: split EDID read and write code
drm/bridge/sii8620: add delay during cbus reset
drm/bridge/sii8620: do not stop MHL output when TMDS input is stopped
drm/bridge/sii8620: set gen2 write burst before sending MSC command
drm/bridge/sii8620: abstract out sink detection code
...
Dan Carpenter [Mon, 16 Jan 2017 11:58:08 +0000 (14:58 +0300)]
drm/msm: return -EFAULT if copy_from_user() fails
copy_from_user_inatomic() is actually a local function that returns
-EFAULT or positive values on error. Otherwise copy_from_user() returns
the number of bytes remaining to be copied. We want to return -EFAULT
here.
I removed an unlikely() because we just did a copy_from_user()
so I don't think it can possibly make a difference.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Tue, 3 Jan 2017 14:15:43 +0000 (19:45 +0530)]
drm/msm/dsi: Add PHY/PLL for 8x96
Extend the DSI PHY/PLL drivers to support the DSI 14nm PHY/PLL
found on 8x96.
These are picked up from the downstream driver. The PHY part is similar
to the other DSI PHYs. The PLL driver requires some trickery so that
one DSI PLL can drive both the DSIs (i.e, dual DSI mode).
In the case of dual DSI mode. One DSI instance becomes the clock master,
and other the clock slave. The master PLL's output (Byte and Pixel clock)
is fed to both the DSI hosts/PHYs.
When the DSIs are configured in dual DSI mode, the PHY driver communicates
to the PLL driver using msm_dsi_pll_set_usecase() which instance is the
master and which one is the slave. When setting rate, the master PLL also
configures some of the slave PLL/PHY registers which need to be identical
to the master's for correct dual DSI behaviour.
There are 2 PLL post dividers that should have ideally been modelled as
generic clk_divider clocks, but require some customization for dual DSI.
In particular, when the master PLL's post-diviers are set, the slave PLL's
post-dividers need to be set too. The clk_ops for these use clk_divider's
helper ops and flags internally to prevent redundant code.
Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Tue, 3 Jan 2017 14:01:16 +0000 (19:31 +0530)]
drm/msm/dsi: Add new method to calculate 14nm PHY timings
The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different
set of calculations for computing D-PHY timing params. Create a
timing_calc_v2 func for the newer v2 PHYs.
Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Sat, 7 Jan 2017 08:54:38 +0000 (14:24 +0530)]
drm/msm/dsi: Move PHY operations out of host
Since DSI PHY has been a separate platform device, it should not
depend on the resources in host to be functional. This change is
to trigger PHY operations in manager, instead of host, so that
host and PHY can be completely separated.
Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
drm/msm/dsi: Reset both PHYs before clock operation for dual DSI
In case of dual DSI, some registers in PHY1 have been programmed
during PLL0 clock's set_rate. The PHY1 reset called by host1 later
will silently reset those PHY1 registers. This change is to reset
and enable both PHYs before any PLL clock operation.
[Originally worked on by Hai Li <hali@codeaurora.org>. Fixed up
by Archit Taneja <architt@codeaurora.org>]
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Thu, 15 Sep 2016 09:14:22 +0000 (14:44 +0530)]
drm/msm/dsi: Pass down use case to PHY
For some new types of DSI PHY, more settings depend on
use cases controlled by DSI manager. This change allows
DSI manager to setup PHY with a use case.
Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Thu, 15 Sep 2016 09:04:49 +0000 (14:34 +0530)]
drm/msm/dsi: Return more timings from PHY to host
The DSI host is required to configure more timings calculated
in PHY. By introducing a shared structure, this change allows
more timing information passed from PHY to host.
Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
drm/msm/dsi: Add a PHY op that initializes version specific stuff
Create an init() op for dsi_phy which sets up things specific to
a given DSI PHY.
The dsi_phy driver probe expects every DSI version to get a
"dsi_phy_regulator" mmio base. This isn't the case for 8x96.
Creating an init() op will allow us to accommodate such
differences.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver
enables core_mmss_clk. We're seeing some branch clock warnings on
8x96 when enabling this. There doesn't seem to be any negative effect
with not enabling this clock, so use it once we figure out why we
get the warnings.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Wed, 4 Jan 2017 08:44:58 +0000 (14:14 +0530)]
drm/msm/dsi: Don't error if a DSI host doesn't have a device connected
The driver returns an error if a DSI DT node is populated, but no device
is connected to it or if the data-lane map isn't present. Ideally, such
a DSI node shouldn't be probed at all (i.e, its status should be set to
"disabled in DT"), but there isn't any harm in registering the DSI device
even if it doesn't have a bridge/panel connected to it.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
projects / karo-tx-linux.git / log