Stephen Boyd [Mon, 22 Sep 2014 19:26:09 +0000 (12:26 -0700)]
mmc: sdhci-msm: Make tuning block table endian agnostic
If we're tuning on a big-endian CPU we'll never determine we properly
tuned the device because we compare the data we received from the
controller with a table that assumes the CPU is little-endian.
Change the table to be an array of bytes instead of 32-bit words
so we can use memcmp() without needing to byte-swap every word
depending on the endianess of the CPU.
Cc: Asutosh Das <asutoshd@codeaurora.org> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Stephen Warren [Mon, 22 Sep 2014 15:57:42 +0000 (09:57 -0600)]
mmc: don't request CD IRQ until mmc_start_host()
As soon as the CD IRQ is requested, it can trigger, since it's an
externally controlled event. If it does, delayed_work host->detect will
be scheduled.
Many host controller probe()s are roughly structured as:
In 3.17, CD IRQs can are enabled quite early via *_probe() ->
mmc_of_parse() -> mmc_gpio_request_cd() -> mmc_gpiod_request_cd_irq().
Note that in linux-next, mmc_of_parse() calls mmc_gpio*d*_request_cd()
rather than mmc_gpio_request_cd(), and mmc_gpio*d*_request_cd() doesn't
call mmc_gpiod_request_cd_irq(). However, this issue still exists if
mmc_gpio_request_cd() is called directly before mmc_start_host().
sdhci_add_host() may fail part way through (e.g. due to deferred
probe for a vmmc regulator), and sdhci_pltfm_free() does nothing to
unrequest the CD IRQ nor cancel the delayed_work. sdhci_pltfm_free() is
coded to assume that if sdhci_add_host() failed, then the delayed_work
cannot (or should not) have been triggered.
This can lead to the following with CONFIG_DEBUG_OBJECTS_* enabled, when
kfree(host) is eventually called inside sdhci_pltfm_free():
WARNING: CPU: 2 PID: 6 at lib/debugobjects.c:263 debug_print_object+0x8c/0xb4()
ODEBUG: free active (active state 0) object type: timer_list hint: delayed_work_timer_fn+0x0/0x18
The object being complained about is host->detect.
There's no need to request the CD IRQ so early; mmc_start_host() already
requests it. For most SDHCI hosts at least, the typical call path that
does this is: *_probe() -> sdhci_add_host() -> mmc_add_host() ->
mmc_start_host(). Therefore, remove the call to mmc_gpiod_request_cd_irq()
from mmc_gpio_request_cd(). This also matches mmc_gpio*d*_request_cd(),
which already doesn't call mmc_gpiod_request_cd_irq().
However, some host controller drivers call mmc_gpio_request_cd() after
mmc_start_host() has already been called, and assume that this will also
call mmc_gpiod_request_cd_irq(). Update those drivers to explicitly call
mmc_gpiod_request_cd_irq() themselves. Ideally, these drivers should be
modified to move their call to mmc_gpio_request_cd() before their call
to mmc_add_host(). However that's too large a change for stable.
This solves the problem (eliminates the kernel error message above),
since it guarantees that the IRQ can't trigger before mmc_start_host()
is called.
The critical point here is that once sdhci_add_host() calls
mmc_add_host() -> mmc_start_host(), sdhci_add_host() is coded not to
fail. In other words, if there's a chance that mmc_start_host() may have
been called, and CD IRQs triggered, and the delayed_work scheduled,
sdhci_add_host() won't fail, and so cleanup is no longer via
sdhci_pltfm_free() (which doesn't free the IRQ or cancel the work queue)
but instead must be via sdhci_remove_host(), which calls mmc_remove_host()
-> mmc_stop_host(), which does free the IRQ and cancel the work queue.
CC: Russell King <linux@arm.linux.org.uk> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexandre Courbot <acourbot@nvidia.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Sergei Shtylyov [Thu, 18 Sep 2014 19:33:49 +0000 (23:33 +0400)]
mmc: tmio: prevent endless loop in tmio_mmc_set_clock()
I spent a couple of days with the driver just hanging due to me forgetting to
specify the external crystal frequency, so that clk_get_rate() returned 0 and
thus the loop in tmio_mmc_set_clock() never ended. I don't think that's an
acceptable behavior, so I suggest that the minimum frequency is checked for 0
in tmio_mmc_host_probe().
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Ian Molton <ian.molton@codethink.co.uk> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Current tmio is using sd_ctrl_read16/write16_rep()
for data transfer.
It works if transfer size was even number,
but, last 1 byte will be ignored if
transfer size was odd number.
This patch adds new tmio_mmc_transfer_data()
and solve this issue.
Johan Rudholm [Wed, 17 Sep 2014 07:50:42 +0000 (09:50 +0200)]
mmc: block: change stop errors to info
Stop command errors are not fatal to the transfer since we make sure
that the card returns to the transfer state and check the card status.
Change an unnecessary error to an info.
Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
mmc: dw_mmc: Remove unused function for !CONFIG_OF
dw_mci_of_find_slot_node() is only used in dw_mci_of_get_slot_quirks()
if CONFIG_OF is defined, thus there is no need to have a !CONFIG_OF
version of it. Fixes the following compile warning with !CONFIG_OF:
CC [M] drivers/mmc/host/dw_mmc.o
drivers/mmc/host/dw_mmc.c:2223:28: warning: ‘dw_mci_of_find_slot_node’ defined but not used [-Wunused-function]
mmc: Checks EXT_CSD_PARTITION_SETTING_COMPLETED before partitions computation
Checks EXT_CSD_PARTITION_SETTING_COMPLETED bit before
computing enhanced user area offset and size, and
adding mmc general purpose partitions. The two needs
EXT_CSD_PARTITION_SETTING_COMPLETED bit be set to be
valid (as described in JEDEC standard).
Warn user in case of misconfiguration.
mmc: Replace "enhanced_area_en" attribute by "partition_setting_completed"
Replace ext_csd "enhanced_area_en" attribute by
"partition_setting_completed". It was used whether or
not enhanced user area is defined and without checks of
EXT_CSD_PARTITION_SETTING_COMPLETED bit.
Xiang Wang [Wed, 16 Jul 2014 07:50:09 +0000 (15:50 +0800)]
mmc: sdhci-pxav3: fix error handling of sdhci_add_host
Commit 0dcaa2499b7d111bd70da5b0976c34210c850fb3 improved error
handling of sdhci_add_host. However, "err_of_parse" and "err_cd_req"
should be placed after "pm_runtime_disable(&pdev->dev)".
mmc: mmci: rename sdio flag in vendor data to st_sdio
This patch renames sdio flag in vendor data to st_sdio, as this flag is
only used to enable ST specific sdio setup. This will also ensure that
the ST specfic setup is not done on other vendor like Qualcomm.
Originally the issue was detected while testing WLAN ath6kl on IFC6410
board with APQ8064 SOC.
This patch adds sdio enable mask in variant data, SOCs like ST have
special bits in datactrl register to enable sdio. Unconditionally setting
this bit in this driver breaks other SOCs like Qualcomm which maps this
bits to something else, so making this enable bit to come from variant
data solves the issue.
Originally the issue is detected while testing WLAN ath6kl on Qualcomm
APQ8064.
Linus Walleij [Wed, 27 Aug 2014 13:13:54 +0000 (15:13 +0200)]
mmc: mmci: augment driver to handle gpio descriptors
Currently the MMCI driver will only handle GPIO descriptors
implicitly through the device tree probe glue in mmc_of_init(),
but devices instatiated other ways such as through board files
and passing descriptors using the GPIO descriptor table will
not be able to exploit descriptors.
Augment the driver to look for a GPIO descriptor if device
tree is not used for the device, and if that doesn't work,
fall back to platform data GPIO assignment using the old
API. The end goal is to get rid of the platform data integer
GPIO assingments from the kernel.
This enable the MMCI-embedding platforms to be converted to
GPIO descritor tables.
Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Linus Walleij [Wed, 27 Aug 2014 11:00:52 +0000 (13:00 +0200)]
mmc: host: switch OF parser to use gpio descriptors
This switches the central MMC OF parser to use gpio descriptors
instead of grabbing GPIOs explicitly from the device tree.
This strips out an unecessary use of the integer-based GPIO
API that we want to get rid of, cuts down on code as the
gpio descriptor code will handle active low flags.
Linus Walleij [Wed, 27 Aug 2014 11:00:50 +0000 (13:00 +0200)]
mmc: slot-gpio: switch to use flags when getting GPIO
When the slot GPIO driver gets the GPIO to be used for card
detect, it is now possible to specify a flag to have the line
set up as input. Get rid of the explicit setup call for input
and use the flag.
The extra argument works as there are transition varargs
macros in place in the <linux/gpio/consumer.h> header, in
the future we will make the flags argument compulsory.
mmc: card: Prevent partition scan for the eMMC boot areas
It seems very unlikely that eMMC devices would hold a standard
partitiontable in one of it's boot areas. Therefore, let's prevent
them from being scanned.
mmc: sdhci-pci: disable preset register for Baytrail and Merrifield
Due to HW issue, SDHCI host controller on Intel
Baytrail/Merrifield platforms can not use preset
register. So, disable preset registers for them by quirks.
mmc: Add .multi_io_quirk callback for multi I/O HW bug
Historically, we have been using MMC_CAP* to handle host HW issues and
currently the block layer uses MMC_CAP2_NO_MULTI_READ flag for a multi
I/O HW bug workaround.
There are a few tweaks needed to make MMC_CAP2_NO_MULTI_READ suite all
situations. Therefore let's add an optional host ops callback to enable
host drivers to return the number of blocks it allows per request.
In a future patch and when host drivers have converted to the new
callback, MMC_CAP2_NO_MULTI_READ shall be removed.
Chuanxiao.Dong [Tue, 19 Aug 2014 03:02:41 +0000 (11:02 +0800)]
mmc: sdhci: check 1.2v IO capability for SDHC host
Right now enable 1.2v IO voltage for SDHC is by using vqmmc.
Thus for the host which doesn't have vqmmc, or its vqmmc does
not support 1.2v, directly use MMC_CAP2_HS200 may cause HS200
failure.
So needs to check if vqmmc is able to support 1.2v. If it does
not support, disable 1.2v IO for HS200.
Chuanxiao.Dong [Fri, 15 Aug 2014 03:28:07 +0000 (11:28 +0800)]
mmc: core: Fix sequence for I/O voltage in DDR mode for eMMC
Even (e)MMC card can support 3.3v to 1.2v vccq in DDR, but not all
host controller can support this, like some of the SDHCI host
which connect to an eMMC device. Some of these host controller
still needs to use 1.8v vccq for supporting DDR mode.
So the sequence will be:
if (host and device can both support 1.2v IO)
use 1.2v IO;
else if (host and device can both support 1.8v IO)
use 1.8v IO;
so if host and device can only support 3.3v IO, this is the last choice.
Robert Jarzmik [Tue, 2 Sep 2014 09:23:55 +0000 (11:23 +0200)]
mmc: pxamci: prepare and unprepare the clocks
Add the clock prepare and unprepare call to the driver set_ios calls
phase. This will remove a warning once the PXA architecture is migrated
to the clock infrastructure.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Chanho Min [Sat, 30 Aug 2014 03:40:40 +0000 (12:40 +0900)]
mmc: sdhci: handle busy-end interrupt during command
It is fully legal for a controller to start handling busy-end interrupt
before it has signaled that the command has completed. So make sure
we do things in the proper order, Or it results that command interrupt
is ignored so it can cause unexpected operations. This is founded at some
toshiba emmc with the bellow warning.
"mmc0: Got command interrupt 0x00000001 even though
no command operation was in progress."
This issue has been also reported by Youssef TRIKI:
It is not specific to Toshiba devices, and happens with eMMC devices
as well as SD card which support Auto-CMD12 rather than CMD23.
Also, similar patch is submitted by:
Gwendal Grignou <gwendal@chromium.org>
Changes since v1:
Fixed conflict with the next of git.linaro.org/people/ulf.hansson/mmc.git
and Tested if issue is fixed again.
Aisheng Dong [Wed, 27 Aug 2014 07:26:32 +0000 (15:26 +0800)]
mmc: sdhci: move timeout_clk dynamically calculation code into common code
The timeout_clk calculation code for SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK case
is common and could be moved into common sdhci_do_set_ios, then platform code
which is not using sdhci_set_clock does not need to write the same code again.
Aisheng Dong [Wed, 27 Aug 2014 07:26:31 +0000 (15:26 +0800)]
mmc: sdhci: calculate timeout_clk conditionally in sdhci_add_host
The timeout_clk calculation code in sdhci_add_host is meaningless for
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK.
So only execute them with no SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK set.
Aisheng Dong [Wed, 27 Aug 2014 07:26:30 +0000 (15:26 +0800)]
mmc: sdhci-esdhc-imx: set the correct max timeout value for uSDHC
The default sdhci driver write 0xE into timeout counter register to
set the maximum timeout. The value is not correct for uSDHC since the
max counter value for uSDHC is 0xF.
Instead of using common timeout code in sdhci, we implement esdhc_set_timeout
to handle the difference between eSDHC and uSDHC.
Currently we simply set the max timeout value as before.
But in the future, we probably may implement IMX specific timeout
setting algorithm and use suitable timeout for different CMDs.
Aisheng Dong [Wed, 27 Aug 2014 07:26:29 +0000 (15:26 +0800)]
mmc: sdhci: add platform set_timeout hook
Currently the common code assume 0xE is the maximum timeout counter
value and use it to write into the timeout counter register.
However, it's fairly possible that some other SoCs may have different
max timeout register value. That means 0xE may be incorrect and
becomes meaningless.
It's also possible that other platforms has different timeout
calculation algorithm. To be flexible, this patch provides a .set_timeout
hook for those platforms to set the timeout on their way if they need.
Aisheng Dong [Wed, 27 Aug 2014 07:26:28 +0000 (15:26 +0800)]
mmc: sdhci-esdhc-imx: fix incorrect max timeout cout for uSDHC
The default sdhci code use the 1 << 27 as the max timeout counter to
to calculate the max_busy_timeout, however it's not correct for uSDHC
since its the max counter is 1 << 28.
Implement esdhc_get_max_timeout_cout to handle it correctly.
Currently the max timeout count is hardcode to 1 << 27 for calcuate
the max_busy_timeout, however, for some platforms the max timeout
count may not be 1 << 27, e.g. i.MX uSDHC is 1 << 28.
Thus 1 << 27 is not correct for such platform.
It is also possible that other platforms may have different values.
To be flexible, we add a get_max_timeout_count hook to get the correct
maximum timeout value for these platforms.
Doug Anderson [Mon, 25 Aug 2014 18:19:04 +0000 (11:19 -0700)]
mmc: dw_mmc: Pass back errors from mmc_of_parse()
It's possible that mmc_of_parse() could return errors (possibly in
some future version it might return -EPROBE_DEFER even). Let's pass
those errors back.
Minda Chen [Tue, 26 Aug 2014 02:50:42 +0000 (10:50 +0800)]
mmc: sdhci-sirf: fix 8bit width enable by overwriting set_bus_width
the implementation of CSR SDHCI controller is a modified version of
the one described in the 1.0 specification, and not a normal 3.0
controller.
and 8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts
use bit 5.
this patch fixes the functionality of 8bit transfer in mmc controllers
and improve performance for mmc0 a lot.
Signed-off-by: Minda Chen <Minda.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Doug Anderson [Fri, 22 Aug 2014 13:47:51 +0000 (19:17 +0530)]
mmc: dw_mmc: Support voltage changes
For UHS cards we need the ability to switch voltages from 3.3V to
1.8V. Add support to the dw_mmc driver to handle this. Note that
dw_mmc needs a little bit of extra code since the interface needs a
special bit programmed to the CMD register while CMD11 is progressing.
This means adding a few extra states to the state machine to track.
Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yuvaraj CD [Fri, 22 Aug 2014 13:47:50 +0000 (19:17 +0530)]
mmc: dw_mmc: use mmc_regulator_get_supply to handle regulators
This patch makes use of mmc_regulator_get_supply() to handle
the vmmc and vqmmc regulators.Also it moves the code handling
the these regulators to dw_mci_set_ios().It turned on the vmmc
and vqmmc during MMC_POWER_UP and MMC_POWER_ON,and turned off
during MMC_POWER_OFF.
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
So, seems this bad SD card does not set valid value in related SSR / CSD register fields.
And then the driver will set card->erase_size to 0.
Then it triggered this divided by zero error when calculate card->pref_erase.
Shinobu Uehara [Mon, 25 Aug 2014 03:03:00 +0000 (20:03 -0700)]
mmc: tmio: add actual clock support as option
Some controller is supporting actual clock on SD_CLK_CTRL :: DIV[7:0].
Renesas SH-Mobile SDHI doesn't support,
but, Renesas R-Car SDHI supports it.
This patch adds new TMIO_MMC_CLK_ACTUAL flag for it.
mmc: tmio: remove SCLKEN bit setting from tmio_mmc_set_clock()
TMIO clock is set via tmio_mmc_set_clock() -> tmio_mmc_clk_start(),
and SCLKEN bit will be set on tmio_mmc_clk_start().
It is not needed on tmio_mmc_set_clock() function.
The required clock setting will not be able to set
in some clocks without this patch.
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shinobu Uehara [Mon, 25 Aug 2014 03:01:32 +0000 (20:01 -0700)]
mmc: tmio: check ILL_FUNC instead of CBSY
Some controllers need to check SD bus status when writing data.
Then, it checks ILL_FUNC bit on SD_INFO2 register,
and this method is controlled via TMIO_MMC_HAS_IDLE_WAIT flags.
Same method is required on tmio_mmc_data_irq() which will
be called after writing data.
Current driver is checking CBSY bit for this purpose,
but, some controllers doesn't have CBSY bit.
This patch checks ILL_FUNC bit instead of CBSY bit
if it has TMIO_MMC_HAS_IDLE_WAIT flags
Shinobu Uehara [Mon, 25 Aug 2014 03:00:52 +0000 (20:00 -0700)]
mmc: tmio: add TMIO_MMC_SDIO_STATUS_QUIRK
Renesas R-Car SDHI should set reserved bits
on CTL_SDIO_STATUS register when writing.
This patch adds new TMIO_MMC_SDIO_STATUS_QUIRK flags
for this purpose
[Kuninori Morimoto: tidyuped for upstreaming
enabled this flags for all SH-Mobile/R-Car]
Basically, SD_BUF0 Tx/Rx addresses are same
in normal TMIO controller,
but, it is different on Renesas R-Car SDHI controller
if it uses DMAC
(Rx address needs to add 0x2000 to Tx address)
This patch adds new .dma_rx_offset and cares it
Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Mon, 25 Aug 2014 10:28:20 +0000 (12:28 +0200)]
mmc: tmio_mmc: Fixup system PM suspend lock-up
At system PM suspend, the tmio core accessed the internal registers of
the controller without first moving the device into active state. This
caused a lock-up in system PM suspend phase.
The reason for the register access were masking of IRQs. Since that is
managed via the runtime PM suspend path, let's just re-use that path
for system PM suspend.
In other words force the device into runtime PM suspend state at system
PM suspend and restore it to active state at system PM resume.
Ulf Hansson [Mon, 25 Aug 2014 10:18:26 +0000 (12:18 +0200)]
mmc: sdhi: Fixup system PM suspend lock-up
At system PM suspend, the tmio core accessed the internal registers of
the controller without first moving the device into active state. This
caused a lock-up in system PM suspend phase.
The reason for the register access were masking of IRQs. Since that is
managed via the runtime PM suspend path, let's just re-use that path
for system PM suspend.
In other words force the device into runtime PM suspend state at system
PM suspend and restore it to active state at system PM resume.
Ulf Hansson [Thu, 24 Oct 2013 15:53:15 +0000 (17:53 +0200)]
mmc: tmio: Restructure ->set_ios() and adapt ->probe() to it
An internal power state machine were beeing used to keep ->probe() and
->set_ios() in sync. Especially for handling specific scenarios while
using CONFIG_MMC_CLKGATE. Moreover dependency to CONFIG_MMC_CLKGATE
existed to handle runtime PM properly, which we moves away from here.
By removing the state machine and instead make ->set_ios() rely on the
information provided through the function's in-parameters, the code
becomes significantly simplier.
Additonally as a part of this rework we prepares for making the runtime
PM callbacks responsible of clock gating.
mmc: core: Use regulator_get_voltage() if OCR mask is empty.
The operation conditions register (OCR) stores the voltage
profile of the card, however the list of possible voltages
is restricted by the voltage range supported by the supply
used as VCC/VDD. So in mmc_vddrange_to_ocrmask() a OCR mask
is obtained to filter the not supported voltages, from the
value read in the host controller OCR register.
For fixed regulators, regulator_list_voltage() returns the
fixed output for the first selector but this doesn't happen
for switch (FET) regulators that obtain their voltage from
their parent supply. A call to regulator_get_voltage() is
needed in this case so the regulator core can return the
FET's parent supply voltage output.
This change is consistent with the fact that for other
fixed regulators (that are not FETs) the OCR mask is
returned even when mmc_regulator_set_ocr() checks if the
regulator is fixed before calling regulator_set_voltage().
Without this patch, the following warning is reported when
a FET is used as a vmmc-supply:
Sascha Hauer [Tue, 19 Aug 2014 08:45:51 +0000 (10:45 +0200)]
mmc: implement Driver Stage Register handling
Some eMMC and SD cards implement a DSR register that allows to tune
raise/fall times and drive strength of the CMD and DATA outputs.
The values to use depend on the card in use and the host.
It might be needed to reduce the drive strength to prevent voltage peaks
above the host's specification.
Implement a 'dsr' devicetree property that allows to specify the value
to set the DSR to. For non-dt setups the new members of mmc_host can be
set by board code.
This patch was initially authored by Sascha Hauer. It contains
improvements authored by Markus Niebel and Uwe Kleine-König.
Peter Griffin [Fri, 15 Aug 2014 13:02:15 +0000 (14:02 +0100)]
mmc: sdhci-pxav3: set_uhs_signaling is initialized twice differently
.set_uhs_signaling field is currently initialised twice once to the
arch specific callback pxav3_set_uhs_signaling, and also to the generic
sdhci_set_uhs_signaling callback.
This means that uhs is currently broken for this platform currently, as pxav3
has some special constriants which means it can't use the generic callback.
This happened in
commit 96d7b78cfc2f ("mmc: sdhci: convert sdhci_set_uhs_signaling() into a library function")
commit a702c8abb2a9 ("mmc: host: split up sdhci-pxa, create sdhci-pxav3.c")'
Fix this and hopefully prevent it happening in the future by ensuring named
initialisers always follow the declaration order in the structure definition.
Peter Griffin [Tue, 12 Aug 2014 16:14:27 +0000 (17:14 +0100)]
mmc: dw_mmc-pltfm: Remove superflous #else condition on CONFIG_PM_SLEEP
As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to
nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define
the suspend/resume callbacks to NULL.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Griffin [Tue, 12 Aug 2014 16:14:26 +0000 (17:14 +0100)]
mmc: dw_mmc-pci: Remove superflous #else condition on CONFIG_PM_SLEEP
As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to
nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define
the suspend/resume callbacks to NULL.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Griffin [Tue, 12 Aug 2014 16:14:25 +0000 (17:14 +0100)]
mmc: remove .owner field for drivers using module_platform_driver
This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
platform_driver_register anyway.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Fu Zhonghui [Mon, 18 Aug 2014 02:48:14 +0000 (10:48 +0800)]
mmc: core: sdio: Fix unconditional wake_up_process() on sdio thread
781e989cf59 ("mmc: sdhci: convert to new SDIO IRQ handling") and bf3b5ec66bd ("mmc: sdio_irq: rework sdio irq handling") disabled
the use of our own custom threaded IRQ handler, but left in an
unconditional wake_up_process() on that handler at resume-time. Link: https://bugzilla.kernel.org/show_bug.cgi?id=80151
In addition, the check for MMC_CAP_SDIO_IRQ capability is added
before enable sdio IRQ.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <chris@printf.net> Signed-off-by: Fu Zhonghui <zhonghui.fu@linux.intel.com> Cc: <stable@vger.kernel.org> # v3.16+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The dw_mmc drivers rely on the DMA API, so update the Kconfig entry
to depend on HAS_DMA. Since the drivers should build on any platform
with DMA, allow the driver to compile tested on non-ARC/ARM platforms.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Matthieu CASTET [Thu, 14 Aug 2014 14:03:18 +0000 (16:03 +0200)]
sdhci : recompute timeout_clk when needed
when SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK is set, timeout_clk is sdclk.
We need to update it when we change sdclk in sdhci_set_clock.
This allow to have a more precisse timeout and max_busy_timeout. This
can help for command that need a big busy wait (erase, ...).
Matthieu CASTET [Thu, 14 Aug 2014 14:03:17 +0000 (16:03 +0200)]
sdhci : handle busy timeout irq
When we wait for busy after sending a command, if there is
a timeout, we got SDHCI_INT_DATA_TIMEOUT flags.
Before this commit we got the message :
"Got data interrupt 0x00100000 even though no data operation was in progress."
and we need to wait 10s that sdhci_timeout_timer expires.
Roger Tseng [Fri, 15 Aug 2014 06:06:01 +0000 (14:06 +0800)]
mmc: rtsx_usb_sdmmc: fix incorrect last byte in R2 response
Current code erroneously fill the last byte of R2 response with an undefined
value. In addition, the controller actually 'offloads' the last byte
(CRC7, end bit) while receiving R2 response and thus it's impossible to get the
actual value. This could cause mmc stack to obtain inconsistent CID from the
same card after resume and misidentify it as a different card.
Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2.
Roger Tseng [Fri, 15 Aug 2014 06:06:00 +0000 (14:06 +0800)]
mmc: rtsx_pci_sdmmc: fix incorrect last byte in R2 response
Current code erroneously fill the last byte of R2 response with an undefined
value. In addition, the controller actually 'offloads' the last byte
(CRC7, end bit) while receiving R2 response and thus it's impossible to get the
actual value. This could cause mmc stack to obtain inconsistent CID from the
same card after resume and misidentify it as a different card.
Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2.
Doug Anderson [Wed, 13 Aug 2014 15:13:43 +0000 (08:13 -0700)]
mmc: dw_mmc: Make sure we don't get stuck when we get an error
If we happened to get a data error at just the wrong time the dw_mmc
driver could get into a state where it would never complete its
request. That would leave the caller just hanging there.
We fix this two ways and both of the two fixes on their own appear to
fix the problems we've seen:
1. Fix a race in the tasklet where the interrupt setting the data
error happens _just after_ we check for it, then we get a
EVENT_XFER_COMPLETE. We fix this by repeating a bit of code.
2. Fix it so that if we detect that we've got an error in the "data
busy" state and we're not going to do anything else we end the
request and unblock anyone waiting.
Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@gmail.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yi Sun [Wed, 13 Aug 2014 05:34:01 +0000 (13:34 +0800)]
mmc: Correct the value of MMC_NUM_PHY_PARTITION
eMMC card can support up to 7 physical partitions, including 2 boot,
1 RPMB and 4 GPs. Change MMC_NUM_PHY_PARTITION from 6 to 7, which is
the correct value.
Signed-off-by: Yi Sun <yi.y.sun@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Chuanxiao.Dong [Fri, 1 Aug 2014 06:00:13 +0000 (14:00 +0800)]
mmc: sdhci: fix the wrong type of curr
curr should use signed type since it will contain the returned
value which is possible to be a negative value. Using u32 will
make the returned value to be true even there is a negative result.
Change to use int instead of u32
mmc: jz4740: prepare next dma transfer in parallel with current transfer
Make use of the MMC asynchronous request capability to prepare the
next DMA transfer request in parallel with the current transfer.
This is done by adding pre-request and post-request callbacks that are
used by the MMC framework during an active data transfer.
It should help reduce the impact of DMA preparation overhead on the SD
card performance.
mmc: jz4740: add dma infrastructure for data transfers
Until now the MMC driver for JZ4740 SoC was relying on PIO mode only
for data transfers.
This patch allows the use of DMA for data trasnfers in addition to PIO
mode by relying on DMA Engine.
DMA tranfers performance might be further improved by taking advantage
of the asynchronous request capability of the MMC framework.
Pawel Moll [Tue, 12 Aug 2014 10:37:52 +0000 (11:37 +0100)]
mmc: sdhci-pltfm: Do not use parent as the host's device
The code selecting a device for the sdhci host has been
continuously tweaked (4b711cb13843f5082e82970dd1e8031383134a65
"mmc: sdhci-pltfm: Add structure for host-specific data" and a4d2177f00a5252d825236c5124bc1e9918bdb41 "mmc: sdhci-pltfm: dt
device does not pass parent to sdhci_alloc_host" while there
does not seem to be any reason to use platform device's parent
in the first place.
The comment saying "Some PCI-based MFD need the parent here"
seem to refer to Timberdale FPGA driver (the only MFD driver
registering SDHCI cell, drivers/mfd/timberdale.c) but again,
the only situation when parent device matter is runtime PM,
which is not implemented for Timberdale.
Tim Kryger [Tue, 12 Aug 2014 05:05:12 +0000 (22:05 -0700)]
mmc: core: Remove fixed voltage regulator logic
There is no need for regulator consumers to include special logic for
fixed voltage regulators as they support regulator_set_voltage() just
like their non-fixed regulator counterparts.
Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
On Qualcomm APQ8064 SOCs, SD card controller has an additional glue
called DML (Data Mover Local/Lite) to assist dma transfers.
This hardware needs to be setup before any dma transfer is requested.
DML itself is not a DMA engine, its just a gule between the SD card
controller and dma controller.
Most of this code has been ported from qualcomm's 3.4 kernel.
This patch adds the code necessary to intialize the hardware and setup
before doing any dma transfers.
mmc: sdhci-s3c: fix runtime PM handling on sdhci_add_host() failure
Runtime Power Management handling for the sdhci_add_host() failure
case in sdhci_s3c_probe() should match the code in sdhci_s3c_remove()
(which uses pm_runtime_disable() call which matches the earlier
pm_runtime_enable() one). Fix it.
This patch fixes "BUG: spinlock bad magic on CPU#0, swapper/0/1" and
"Unbalanced pm_runtime_enable!" warnings.
>From the kernel log:
...
[ 1.659631] s3c-sdhci 12530000.sdhci: sdhci_add_host() failed
[ 1.665096] BUG: spinlock bad magic on CPU#0, swapper/0/1
[ 1.670433] lock: 0xea01e484, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0
[ 1.677895] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.16.0-next-20140804-00008-ga59480f-dirty #707
[ 1.687037] [<c0013ae4>] (unwind_backtrace) from [<c0010d70>] (show_stack+0x10/0x14)
[ 1.694740] [<c0010d70>] (show_stack) from [<c04050c8>] (dump_stack+0x68/0xb8)
[ 1.701948] [<c04050c8>] (dump_stack) from [<c0052558>] (do_raw_spin_lock+0x15c/0x1a4)
[ 1.709848] [<c0052558>] (do_raw_spin_lock) from [<c040a630>] (_raw_spin_lock_irqsave+0x20/0x28)
[ 1.718619] [<c040a630>] (_raw_spin_lock_irqsave) from [<c030d7d0>] (sdhci_do_set_ios+0x1c/0x5cc)
[ 1.727464] [<c030d7d0>] (sdhci_do_set_ios) from [<c030ddfc>] (sdhci_runtime_resume_host+0x50/0x104)
[ 1.736574] [<c030ddfc>] (sdhci_runtime_resume_host) from [<c02462dc>] (pm_generic_runtime_resume+0x2c/0x40)
[ 1.746383] [<c02462dc>] (pm_generic_runtime_resume) from [<c0247898>] (__rpm_callback+0x34/0x70)
[ 1.755233] [<c0247898>] (__rpm_callback) from [<c02478fc>] (rpm_callback+0x28/0x88)
[ 1.762958] [<c02478fc>] (rpm_callback) from [<c02486f0>] (rpm_resume+0x384/0x4ec)
[ 1.770511] [<c02486f0>] (rpm_resume) from [<c02488b0>] (pm_runtime_forbid+0x58/0x64)
[ 1.778325] [<c02488b0>] (pm_runtime_forbid) from [<c030ea70>] (sdhci_s3c_probe+0x4a4/0x540)
[ 1.786749] [<c030ea70>] (sdhci_s3c_probe) from [<c02429cc>] (platform_drv_probe+0x2c/0x5c)
[ 1.795076] [<c02429cc>] (platform_drv_probe) from [<c02415f0>] (driver_probe_device+0x114/0x234)
[ 1.803929] [<c02415f0>] (driver_probe_device) from [<c024179c>] (__driver_attach+0x8c/0x90)
[ 1.812347] [<c024179c>] (__driver_attach) from [<c023ffb4>] (bus_for_each_dev+0x54/0x88)
[ 1.820506] [<c023ffb4>] (bus_for_each_dev) from [<c0240df8>] (bus_add_driver+0xd8/0x1cc)
[ 1.828665] [<c0240df8>] (bus_add_driver) from [<c0241db8>] (driver_register+0x78/0xf4)
[ 1.836652] [<c0241db8>] (driver_register) from [<c00088a4>] (do_one_initcall+0x80/0x1d0)
[ 1.844816] [<c00088a4>] (do_one_initcall) from [<c059ac94>] (kernel_init_freeable+0x108/0x1d4)
[ 1.853503] [<c059ac94>] (kernel_init_freeable) from [<c0401300>] (kernel_init+0x8/0xe4)
[ 1.861568] [<c0401300>] (kernel_init) from [<c000e538>] (ret_from_fork+0x14/0x3c)
[ 1.869582] platform 12530000.sdhci: Driver s3c-sdhci requests probe deferral
...
[ 1.997047] s3c-sdhci 12530000.sdhci: Unbalanced pm_runtime_enable!
...
[ 2.027235] s3c-sdhci 12530000.sdhci: sdhci_add_host() failed
[ 2.032884] platform 12530000.sdhci: Driver s3c-sdhci requests probe deferral
...
Tested on Hardkernel's Exynos4412 based ODROID-U3 board.
Fixes: 9f4e8151dbbc ("mmc: sdhci-s3c: Enable runtime power management") Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Paul Bolle [Sun, 7 Sep 2014 18:25:55 +0000 (11:25 -0700)]
Documentation: NFS/RDMA: Document separate Kconfig symbols
The NFS/RDMA Kconfig symbol was split into separate options for client
and server in commit 2e8c12e1b765 ("xprtrdma: add separate Kconfig
options for NFSoRDMA client and server support").
Update the documentation to reflect this split.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Reviewed-by: Jeff Layton <jlayton@redhat.com> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: "J. Bruce Fields" <bfields@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
projects / linux-beck.git / log