Arnd Bergmann [Thu, 15 Oct 2015 21:09:17 +0000 (23:09 +0200)]
Merge tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/dt
Pull "Qualcomm ARM64 Updates for v4.4" from Andy Gross:
* Add RNG device tree node
* Add MSM8x16 serial UART1 node
* Enable eMMC on apq8016-sbc board
* Fix I2C pinconf sleep state function
* Add MSM8916 I2C nodes
* Enable I2C busses on LS and HS on APQ8016-sbc
* Enable SPI busses on LS and HS on APQ8016-sbc
* tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
arm64: dts: apq8016-sbc: enable spi buses on LS and HS
arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
arm64: dts: qcom: Add msm8916 I2C nodes.
arm64: dts: fix i2c pinconf sleep state function
arm64: dts: qcom: Enable eMMC on apq8016-sbc board
arm64: dts: qcom: Add 8x16 Serial UART1 node
arm64: dts: qcom: Add RNG device tree node
Arnd Bergmann [Tue, 13 Oct 2015 15:05:39 +0000 (17:05 +0200)]
soc: qcom/smem: add HWSPINLOCK dependency
This fixes a build error when smem is enabled without hwspinlock:
drivers/built-in.o: In function `qcom_smem_alloc':
rockchip-efuse.c:(.text+0x7a3e4): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7a568): undefined reference to `__hwspin_unlock'
drivers/built-in.o: In function `qcom_smem_remove':
rockchip-efuse.c:(.text+0x7a5cc): undefined reference to `hwspin_lock_free'
drivers/built-in.o: In function `qcom_smem_probe':
rockchip-efuse.c:(.text+0x7a960): undefined reference to `hwspin_lock_request_specific'
rockchip-efuse.c:(.text+0x7a988): undefined reference to `of_hwspin_lock_get_id'
drivers/built-in.o: In function `qcom_smem_get':
rockchip-efuse.c:(.text+0x7aa24): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7aafc): undefined reference to `__hwspin_unlock'
Arnd Bergmann [Thu, 15 Oct 2015 21:03:24 +0000 (23:03 +0200)]
Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers
Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross:
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
* tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
soc: qcom: smd_rpm: Handle big endian CPUs
soc: qcom: smd: Remove use of VLAIS
soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
soc: qcom: smd: Represent channel layout in structures
soc: qcom: smem: Handle big endian CPUs
soc: qcom: Make qcom_smem_get() return a pointer
soc: qcom: Reorder SMEM/SMD configs
soc: qcom: smem: Avoid NULL pointer exception on remove
soc: qcom: smd: Implement id_table driver matching
Arnd Bergmann [Thu, 15 Oct 2015 20:38:10 +0000 (22:38 +0200)]
Merge tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
Merge "SCPI support on ARM64 Juno Development Platform" from Sudeep Holla:
1. SRAM, MHU mailbox and SCPI support
2. CPU topology using cpu-map
3. Clock support for all the cpus
4. Support for SoC sensors
* tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: Add sensor node to Juno dt
arm64: dts: add clock support for all the cpus
arm64: dts: add CPU topology on Juno
arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno
Arnd Bergmann [Thu, 15 Oct 2015 20:26:03 +0000 (22:26 +0200)]
Merge tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc into next/drivers
Merge "PL172 driver updates for v4.4" from Joachim Eastwood:
Support for additional ARM MPMCs to the PL172 driver and an update to
the bindings documentation to reflect this from Vladimir Zapolskiy.
"The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
the static memory controllers on devices are similar to one found on
ARM PrimeCell PL172, add support to the existing driver."
* tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc:
doc: dt: arm,pl172: add description of PL175 and PL176 controllers
memory: pl172: add ARM PrimeCell PL176 MPMC support
memory: pl172: add ARM PrimeCell PL175 MPMC support
memory: pl172: correct MPMC peripheral ID register bits
Antoine Tenart [Thu, 15 Oct 2015 18:55:55 +0000 (20:55 +0200)]
clk: berlin: add cpuclk
Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
fixed to 1.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Arnd Bergmann [Thu, 15 Oct 2015 15:56:04 +0000 (17:56 +0200)]
Merge branches 'fixes' and 'next/dt' into for-next
* fixes:
ARM: dts: uniphier: fix IRQ number for devices on PH1-LD6b ref board
drivers/perf: arm_pmu: avoid CPU device_node reference leak
bus: arm-ccn: Fix irq affinity setting on CPU migration
bus: arm-ccn: Handle correctly no-more-cpus case
ARM: meson6: DTS: Fix wrong reg mapping and IRQ numbers
Documentation: ARM: List new omap MMC requirements
memory: omap-gpmc: dump "before" state before first modification
memory: omap-gpmc: Fix unselectable debug option for GPMC
ARM: dts: am57xx-beagle-x15: set VDD_SD to always-on
* next/dt: (29 commits)
ARM64: juno: add NOR flash to device tree
ARM: dts: uniphier: change the external bus address mapping
ARM: dts: msm8974: fix typo in "disabled" property
ARM: dts: qcom-pm8941: Add charger node
dt-binding: power: Add Qualcomm SMBB binding
arm: dts: qcom: Add #power-domain-cells property
ARM: dts: qs600: Add SD card detect support.
ARM: dts: apq8064-ifc6410: add notify led support.
ARM: dts: qs600: add pwrseq support to WLAN
ARM: dts: ifc6410: Add pwrseq support for WLAN
ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart
ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart
ARM: dts: apq8064: add missing gsbi7 uart pinctrl
ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
ARM: dts: apq8064: add pm8921 pwrkey support
ARM: dts: apq8064: add pm8921 rtc
ARM: dts: qs600: remove unnecessary eeprom label
ARM: dts: ifc6410: remove unnecessary eeprom label
ARM: dts: apq8064: remove redundant i2c pinctrl properties
ARM: dts: qcom: Remove extra reg element from iadc device
...
Arnd Bergmann [Thu, 15 Oct 2015 15:21:01 +0000 (17:21 +0200)]
Merge tag 'qcom-dt-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/dt
Pull "Qualcomm ARM Based Device Tree Updates for v4.4" from Andy Gross:
* Add DT binding document for SMEM
* Add SMD, RPM, and Regulator nodes on MSM8974
* Remove extra reg element from iadc device
* Remove redunandant i2c pinctrl properties on APQ8064
* Remove unnecessary eeprom label on IFC6410
* Remove unnecessary eeprom label from QS600
* Add PM8921 RTC support on APQ8064
* Add PM8921 pwrkey support on APQ8064
* Prefix GSBI6 uart pins on APQ8064 correctly
* Add missing GSBI7 uart pinctrl on APQ8064
* Add missing GSBI7 uart pinctrl on IFC6410
* Add missing GSBI7 pinctrl uart property on QS600
* Add pwrseq support for WLAN on IFC6410
* Add pwrseq support for WLAN on QS600
* Add notify led support on IFC6410
* Add SD card detect support onQS600
* Add #power-domain-cells property to documentation
* Add Qualcomm SMBB binding document
* Add PM8941 charge node
* Fix typo in disabled property on MSM8974
* tag 'qcom-dt-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
ARM: dts: msm8974: fix typo in "disabled" property
ARM: dts: qcom-pm8941: Add charger node
dt-binding: power: Add Qualcomm SMBB binding
arm: dts: qcom: Add #power-domain-cells property
ARM: dts: qs600: Add SD card detect support.
ARM: dts: apq8064-ifc6410: add notify led support.
ARM: dts: qs600: add pwrseq support to WLAN
ARM: dts: ifc6410: Add pwrseq support for WLAN
ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart
ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart
ARM: dts: apq8064: add missing gsbi7 uart pinctrl
ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
ARM: dts: apq8064: add pm8921 pwrkey support
ARM: dts: apq8064: add pm8921 rtc
ARM: dts: qs600: remove unnecessary eeprom label
ARM: dts: ifc6410: remove unnecessary eeprom label
ARM: dts: apq8064: remove redundant i2c pinctrl properties
ARM: dts: qcom: Remove extra reg element from iadc device
ARM: dts: msm8974: Add smd, rpm and regulator nodes
soc: qcom: Add device tree binding for SMEM
Linus Walleij [Thu, 15 Oct 2015 10:20:15 +0000 (12:20 +0200)]
ARM64: juno: add NOR flash to device tree
The Juno motherboard has a NOR flash on the motherboard, enable
this to be accessed with the CFI flash driver. Results after
enabling MTD, MTD_CFI, MTD_PHYSMAP, MTD_PHYSMAP_OF,
MTD_CFI_INTELEXT:
8000000.flash: Found 2 x16 devices at 0x0 in 32-bit bank.
Manufacturer ID 0x000089 Chip ID 0x008919
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Using buffer write method
Using auto-unlock on power-up/resume
cfi_cmdset_0001: Erase suspend on write enabled
erase region 0: offset=0x0,size=0x40000,blocks=255
erase region 1: offset=0x3fc0000,size=0x10000,blocks=4
Masahiro Yamada [Thu, 15 Oct 2015 09:05:32 +0000 (18:05 +0900)]
ARM: dts: uniphier: change the external bus address mapping
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
0x00000000 - 0x0fffffff
0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.
For the consistency, use the latter for all the SoCs.
Also, fix the range properties to reflect the real address mapping,
where the support card is located at the offset address 0x01f00000
of CS1 of the external bus.
Arnd Bergmann [Thu, 15 Oct 2015 15:13:26 +0000 (17:13 +0200)]
Merge tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Fixes for omap against v4.3-rc5" from Tony Lindgren:
- Regulator fix for beagle-x15 to fix HDMI without a SD card being
inserted
- GPMC fix for showing proper timings and to allow enabling debug
options that somehow was unselectable earlier
- Add minimal documentation for new MMC1 dependency on
REGULATOR_PBIAS as it may not be obvious for people with
targeted .config files
* tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Documentation: ARM: List new omap MMC requirements
memory: omap-gpmc: dump "before" state before first modification
memory: omap-gpmc: Fix unselectable debug option for GPMC
ARM: dts: am57xx-beagle-x15: set VDD_SD to always-on
Pawel Moll [Thu, 15 Oct 2015 13:32:46 +0000 (14:32 +0100)]
bus: arm-ccn: Fix irq affinity setting on CPU migration
When PMU context is migrating between CPUs, interrupt affinity is set as
well. Only this should not happen when the CCN interrupt is not being
used at all (the driver is using a hrtimer tick instead).
Pawel Moll [Thu, 15 Oct 2015 13:32:45 +0000 (14:32 +0100)]
bus: arm-ccn: Handle correctly no-more-cpus case
When migrating events the driver picks another cpu using
cpumask_any_but() function, which returns value >= nr_cpu_ids
when there is none available, not a negative value as the code
assumed. Fixed now.
Stephen Boyd [Thu, 8 Oct 2015 18:34:09 +0000 (13:34 -0500)]
soc: qcom: smem: Move RPM message ram out of smem DT node
SMEM is a software construct built on top of a DDR reserved region
and sometimes a device memory region called RPM message ram. Having
the RPM message ram in the smem DT node's reg property leads to the
smem node being located in different places depending on if the
message ram is being used or not. Let's add a qcom specific
property, qcom,rpm-msg-ram, and point to the device memory from
the SMEM node via a phandle. As SMEM is a software construct, it
really needs to reside at the root of the DT regardless of whether
it's using the message ram or not.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Arnd Bergmann [Mon, 12 Oct 2015 14:56:19 +0000 (16:56 +0200)]
firmware: qcom-scm: build for correct architecture level
The ".arch_extension sec" directive is only available on ARMv6 or higher,
so if we enable the SCM driver while building a kernel for an older CPU,
we get a build error:
/tmp/ccUyhMOY.s:130: Error: selected processor does not support ARM mode `smc #0'
/tmp/ccUyhMOY.s:216: Error: selected processor does not support ARM mode `smc #0'
/tmp/ccUyhMOY.s:373: Error: selected processor does not support ARM mode `smc #0'
make[4]: *** [drivers/firmware/qcom_scm-32.o] Error 1
This changes the Makefile so we pass the ARMv7 architecture level both
for the check and for the actual compilation of the scm driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andy Gross <agross@codeaurora.org>
Attempting to find room for a packet that's bigger than the fifo will
never succeed and the calling process will be sleeping forever in the
loop, waiting for enough room. So fail early instead.
Reported-by: Courtney Cavin <courtney.cavin@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Thu, 17 Sep 2015 21:50:53 +0000 (14:50 -0700)]
soc: qcom: smd: Handle big endian CPUs
The smd structures are always in little endian, but the smd
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Wed, 2 Sep 2015 22:46:50 +0000 (15:46 -0700)]
soc: qcom: smd_rpm: Handle big endian CPUs
The smd rpm structures are always in little endian, but this
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Wed, 2 Sep 2015 22:46:48 +0000 (15:46 -0700)]
soc: qcom: smd: Remove use of VLAIS
Usage of VLAIS prevents clang from compiling this file, and it
also opens us to the possibility of allocating a large structure
on the stack to the point that we blow past the limit of the
kernel stack. Remove the VLAIS and allocate a structure on the
heap with kmalloc so that we're safer and more clang friendly.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Wed, 2 Sep 2015 22:46:46 +0000 (15:46 -0700)]
soc: qcom: smd: Represent channel layout in structures
The rx and tx channel info are laid out in memory next to each
other, and there are two types of channel info structures, byte
based and word based. We have 4 pointers to these info
structures, when we really only need two to point to the
different types of structures. Encapsulate the byte based and
word based tx/rx structures in a "channel pair" structure that
describes the layout of memory and reduces the number of pointers
in the smd channel structure by two.
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Wed, 2 Sep 2015 22:46:45 +0000 (15:46 -0700)]
soc: qcom: smem: Handle big endian CPUs
The contents of smem are always in little endian, but the smem
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Wed, 2 Sep 2015 22:46:44 +0000 (15:46 -0700)]
soc: qcom: Make qcom_smem_get() return a pointer
Passing a void ** almost always requires a cast at the call site.
Instead of littering the code with casts every time this function
is called, have qcom_smem_get() return a void pointer to the
location of the smem item. This frees the caller from having to
cast the pointer.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Fri, 28 Aug 2015 18:23:33 +0000 (11:23 -0700)]
soc: qcom: Reorder SMEM/SMD configs
When I make nconfig, having the SMEM option after the SMD option
causes the configurator to get confused when I'm enabling and
disabling these options. Let's move SMEM before SMD so there's a
clear indented dependency chain.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
Implement a id_table based driver maching mechanism for drivers that
binds to fixed channels and doesn't need any additional configuration,
e.g. IPCRTR and DIAG.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
Arnd Bergmann [Wed, 14 Oct 2015 16:07:48 +0000 (18:07 +0200)]
Merge branch 'next/drivers' into for-next
* next/drivers:
hwmon: Support thermal zones registration for SCP temperature sensors
hwmon: Support sensors exported via ARM SCP interface
firmware: arm_scpi: Extend to support sensors
Documentation: add DT bindings for ARM SCPI sensors
cpufreq: arm_big_little: add SCPI interface driver
clk: scpi: add support for cpufreq virtual device
clk: add support for clocks provided by SCP(System Control Processor)
firmware: add support for ARM System Control and Power Interface(SCPI) protocol
Documentation: add DT binding for ARM System Control and Power Interface(SCPI) protocol
Arnd Bergmann [Wed, 14 Oct 2015 16:07:28 +0000 (18:07 +0200)]
Merge branch 'next/dt' into for-next
* next/dt: (117 commits)
ARM64: dts: vexpress: Use a symlink to vexpress-v2m-rs1.dtsi from arch=arm
ARM: meson6: DTS: Fix wrong reg mapping and IRQ numbers
ARM: hisilicon: DT: Drop console= and earlyprintk bootargs parameter
ARM: mvebu: modify Orion and Kirkwoord crypto compatible strings
ARM: mvebu: use new bindings for existing crypto devices
ARM: mvebu: define crypto SRAM ranges for all armada-38x boards
ARM: mvebu: add crypto related nodes to armada 38x dtsi
ARM: dts: Use GPIO constants for flags cells in exynos5440 boards
ARM: dts: Use GPIO constants for flags cells in exynos5420/5422/5800 boards
ARM: dts: Use GPIO constants for flags cells in exynos4412 boards
ARM: dts: Use GPIO constants for flags cells in exynos4120 boards
ARM: dts: Use GPIO constants for flags cells in exynos3250 boards
ARM: dts: Enable EC vboot context support on Peach boards
ARM: dts: sun6i: hummingbird: Drop AXP221 DC1SW and DC5LDO supplies
ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller
ARM: dts: sun8i: q8-common: Enable RSB controller for A23/A33 Q8 tablets
ARM: dts: sun8i: Add Reduced Serial Bus controller device node to A23/A33 dtsi
ARM: dts: Remove regulator-compatible usage in exynos4412-trats2
ARM: dts: Move display-timings node from fimd to dp in exynos5250-arndale, smdk5250 and smdk5420
ARM: berlin: add a PWM node on the BG2CD
...
Arnd Bergmann [Wed, 14 Oct 2015 15:57:03 +0000 (17:57 +0200)]
Merge tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v4.4" from Kukjin Kim:
- New board support
: add exynos5250-snow-rev5 DT file to support Snow Rev5+ board
: add exynos5422-odroidxu4 DT file to support Odroid XU4 board
: split exynos5422-odroidxu3-audio DT file from odroidxu3-common
- USE GPIO constants for flags cells for exynos boards
- fix cpu compatible value to 'arm926ej-s' for s3c2416
- add DMA support for serial ports for exynos4
- add suspend opp for exynos4412
- remove regulator-compatible usage for exynos4412-trats2
- enable EC vboot context support for Peach boards
- move display-timings node to DP for exynos5250-arndale, smdk5250 and smdk5420
- for exynos4412-odroid/odroidu3
: unify voltage regulator style and
: remove redundant pinctrl settings
: add pwm-fan node and use it as a colling device
- for exynos5422-odroidxu3
: fix power off method and LEDs
- dt-bindings
: grounded AC0KB pin on S2MPS11
: entry how to use PWM FAN as a cooling device
* tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (22 commits)
ARM: dts: Use GPIO constants for flags cells in exynos5440 boards
ARM: dts: Use GPIO constants for flags cells in exynos5420/5422/5800 boards
ARM: dts: Use GPIO constants for flags cells in exynos4412 boards
ARM: dts: Use GPIO constants for flags cells in exynos4120 boards
ARM: dts: Use GPIO constants for flags cells in exynos3250 boards
ARM: dts: Enable EC vboot context support on Peach boards
ARM: dts: Remove regulator-compatible usage in exynos4412-trats2
ARM: dts: Move display-timings node from fimd to dp in exynos5250-arndale, smdk5250 and smdk5420
ARM: dts: Add Exynos5250 Snow Rev5+ support on exynos5250-snow-rev5
ARM: dts: Unify voltage regulator style in exynos4412-odroid
ARM: dts: Remove redundant pinctrl settings in exynos4412-odroid
ARM: dts: Fix cpu compatible value for s3c2416
ARM: dts: Add support Odroid XU4 board for exynos5422-odroidxu4
ARM: dts: Split audio configuration to separate exynos5422-odroidxu3-audio
ARM: dts: Fix power off method for exynos5422-odroidxu3-common
dt-bindings: Document grounded ACOKB pin on S2MPS11
ARM: dts: use pwm-fan device as a cooling device for exynos4412-odroidu3
ARM: dts: Add pwm-fan node for exynos4412-odroidu3
dt-bindings: Documentation entry to explain how to use PWM FAN as a cooling device
ARM: dts: add suspend opp to exynos4412
...
Ian Campbell [Mon, 5 Oct 2015 11:53:52 +0000 (12:53 +0100)]
ARM64: dts: vexpress: Use a symlink to vexpress-v2m-rs1.dtsi from arch=arm
Commit 9ccd608070b6 "arm64: dts: add device tree for ARM SMM-A53x2 on
LogicTile Express 20MG" added a new dts file to arch/arm64 which
included "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi", i.e. a
.dtsi supplied by arch/arm.
Unfortunately this causes some issues for the split device tree
repository[0], since things get moved around there. In that context
the new .dts ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
while the include is at src/arm/vexpress-v2m-rs1.dtsi.
The sharing of the .dtsi is legitimate since the baseboard is the same
for various vexpress systems whatever processor they use.
Previously I attempted to resolve this by creating a shared location
for such things but we have been unable to come to a consensus on
where that should be.
Instead this patch simply replaces the use of ../../ in the dts
/include/ with a symlink in arch/arm64/boot/dts/arm pointing to the
file arch/arm/boot/dts.
Since the split device tree repo will shortly be required to flatten
symlinks for other reasons this will cause the dtsi file to appear in
both src/arm and src/arm64 in the split repo, which is an improvement
on not building for arm64 now.
Arnd Bergmann [Wed, 14 Oct 2015 15:48:10 +0000 (17:48 +0200)]
Merge tag 'sunxi-dt-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.4" from Maxime Ripard:
DT patches for the 4.4 merge window, most notably:
- Enable the OTG controller on more boards
- Create new DTSI for the q8's design
- Added RSB support to the A23 and A33 SoCs
- New boards: Olimex A20 EVB, Yones bs1078v2
Plus the usual random patches enabling and / or enhancing a few things in
particular boards.
* tag 'sunxi-dt-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (59 commits)
ARM: dts: sun6i: hummingbird: Drop AXP221 DC1SW and DC5LDO supplies
ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller
ARM: dts: sun8i: q8-common: Enable RSB controller for A23/A33 Q8 tablets
ARM: dts: sun8i: Add Reduced Serial Bus controller device node to A23/A33 dtsi
ARM: dts: sun4i: Add AXP209 PMU regulators for pcDuino1/2
ARM: sun7i: dt: Add new Olimex A20 EVB device
ARM: dts: sun6i: hummingbird: Add aliases for rtc devices
ARM: dts: sun7i: Add dts file for Wits Pro A20 DKT
ARM: dts: sun7i: Enable USB DRC on Wexler TAB7200
ARM: dts: sun7i: Enable USB DRC on the Orange pi
ARM: dts: sun7i: Enable USB DRC on orangepi-mini
ARM: dts: axp209: Add usb_power_supply child node to the ax209 node
ARM: dts: sun8i: Make ippo-q8h-v1.2.dts a symlink to q8-tablet.dts
ARM: dts: sun8i: Add sun8i-a33-q8-tablet.dts file
ARM: dts: sun6i: Add support for Yones Toptech bs1078v2 tablets
ARM: dts: sun4i: Enable USB DRC on the Marsboard A10
ARM: dts: sun4i: gemei-g9: Add accelerometer (bma250) IRQ
ARM: dts: sun8i-a33: Add security system crypto engine clock and device nodes
ARM: dts: sun8i: Add pwm-backlight device for A23/A33 Q8 format tablets
ARM: sun8i: A23: Add missing msgbox gate
...
Arnd Bergmann [Wed, 14 Oct 2015 15:42:14 +0000 (17:42 +0200)]
Merge tag 'berlin-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Marvell Berlin DT for 4.4 take 1" from Sebastian Hesselbarth:
- use serial aliases and stdout path
- add cpufreq properties to all SoCs
- add pwm nodes for all SoCs
This depends on topic branch berlin-cpuclk-for-4.4-1
* tag 'berlin-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: berlin: add a PWM node on the BG2CD
ARM: berlin: add a PWM node on the BG2
ARM: berlin: add a PWM node on the BG2Q
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2CD
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2Q
arm: dts: berlin: use stdout-path
arm: dts: berlin: add aliases for serial
Arnd Bergmann [Wed, 14 Oct 2015 15:29:32 +0000 (17:29 +0200)]
Merge tag 'mvebu-dt-4.4-1' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.4 (part 1)" from Gregory CLEMENT:
Update dts to use the new crypto driver on mvebu SoCs
* tag 'mvebu-dt-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: modify Orion and Kirkwoord crypto compatible strings
ARM: mvebu: use new bindings for existing crypto devices
ARM: mvebu: define crypto SRAM ranges for all armada-38x boards
ARM: mvebu: add crypto related nodes to armada 38x dtsi
ARM: mvebu: define crypto SRAM ranges in armada-375-db.dts
ARM: mvebu: add crypto related nodes to armada 375 dtsi
ARM: mvebu: define crypto SRAM ranges for all armada-370 boards
ARM: mvebu: add crypto related nodes to armada 370 dtsi
ARM: mvebu: define crypto SRAM ranges for all armada-xp boards
ARM: mvebu: add crypto related nodes to armada-xp.dtsi
ARM: mvebu: add CPU config registers in the Armada 370/XP Device Tree
Linus Walleij [Tue, 13 Oct 2015 17:46:54 +0000 (19:46 +0200)]
ARM: ux500: modify initial levelshifter status
commit 1d8aca9df612f5751892fb2642d72536f2f48fd0
"ARM: ux500: fix MMC/SD card regression"
fixed broken the level shifter: it should be default ON
but became default OFF.
Arnd Bergmann [Mon, 12 Oct 2015 13:44:49 +0000 (15:44 +0200)]
ARM: pxa: fix pxa3xx DFI lockup hack
Some recently added code to avoid a bug introduced a build error
when CONFIG_PM is disabled and a macro is hidden:
arch/arm/mach-pxa/pxa3xx.c: In function 'pxa3xx_init':
arch/arm/mach-pxa/pxa3xx.c:439:3: error: 'NDCR' undeclared (first use in this function)
NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL;
^
This moves the macro outside of the #ifdef so it can be
referenced correctly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: adf3442cc890 ("ARM: pxa: fix DFI bus lockups on startup") Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Arnd Bergmann [Wed, 14 Oct 2015 15:07:32 +0000 (17:07 +0200)]
Merge tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers
Merge "ARM System Control and Power Interface(SCPI) support" from Sudeep Holla
It adds support for the following features provided by SCP firmware
using different subsystems in Linux:
1. SCPI mailbox protocol driver which using mailbox framework
2. Clocks provided by SCP using clock framework
3. CPU DVFS(cpufreq) using existing arm-big-little driver
4. SCPI based sensors including temperature sensors
* tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
hwmon: Support thermal zones registration for SCP temperature sensors
hwmon: Support sensors exported via ARM SCP interface
firmware: arm_scpi: Extend to support sensors
Documentation: add DT bindings for ARM SCPI sensors
cpufreq: arm_big_little: add SCPI interface driver
clk: scpi: add support for cpufreq virtual device
clk: add support for clocks provided by SCP(System Control Processor)
firmware: add support for ARM System Control and Power Interface(SCPI) protocol
Documentation: add DT binding for ARM System Control and Power Interface(SCPI) protocol
Rajendra Nayak [Thu, 1 Oct 2015 09:26:02 +0000 (14:56 +0530)]
arm: dts: qcom: Add #power-domain-cells property
clock controller nodes which also support power domains (gdscs') need
to have a #power-domain-cells property. Add these for gcc and mmcc
nodes of msm8974, gcc of apq8084 and msm8916.
Also update gcc and mmcc bindings for it.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
Usage of generic names like "uart_pins" is confusing to the reader, given
the fact that there could be more than one uart on APQ8064.
This patch adds gsbi prefix to uart pinctrl nodes so as to avoid such
confusion.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch removes i2c pinctrl properties from board which which are now
mentioned in the SOC specific file. This will avoid redundant properties
across multiple board fiiles.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Stephen Boyd [Wed, 26 Aug 2015 19:35:04 +0000 (12:35 -0700)]
ARM: dts: qcom: Remove extra reg element from iadc device
This doesn't match the binding, and the driver doesn't look to
be using it. Remove the extra element.
CC: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Murali Karicheri [Tue, 13 Oct 2015 20:42:43 +0000 (13:42 -0700)]
ARM: dts: keystone: enable accumulator channels
Add low priority accumulator channel that can monitor multiple QMSS
queues. User for example could use the accumular queue for Netcp
Rx completion. While at it, also add an extra line end of each top
level node in DTS to make it more readable.
Sergei Shtylyov [Mon, 12 Oct 2015 22:12:18 +0000 (01:12 +0300)]
ARM: shmobile: porter: enable internal PCI and USB PHY
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached
to them and also enable USB PHY device for the Porter board. We have to
enable everything in one patch since EHCI/OHCI devices are already linked
to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Mugunthan V N [Mon, 12 Oct 2015 09:07:12 +0000 (14:37 +0530)]
ARM: dts: dra7xx: am57xx: fix cd-gpios definition as per hardware design and dt binding docs
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In DRA74x, DRA72x and AM57xx EVMs the card detect gpio is
designed as active low gpio. So correcting the dt card detect
gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Mugunthan V N [Mon, 12 Oct 2015 09:07:11 +0000 (14:37 +0530)]
ARM: dts: am43xx: fix cd-gpios definition as per hardware design and dt binding docs
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM43xx the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Mugunthan V N [Mon, 12 Oct 2015 09:07:10 +0000 (14:37 +0530)]
ARM: dts: am335x: fix cd-gpios definition as per hardware design and dt binding docs
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM335x the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>