Laurent Pinchart [Fri, 10 May 2013 14:48:36 +0000 (16:48 +0200)]
gpio-rcar: Make the platform data gpio_base field signed
The gpio_base field is used to specify the desired GPIO base for the
GPIO controller. The GPIO core can automatically allocate a GPIO number
range when the base is set to -1. To make this possible, make the field
signed.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Maxime Ripard [Tue, 14 May 2013 15:38:43 +0000 (17:38 +0200)]
ARM: shmobile: r8a7790: Remove init_irq declaration in machine description
Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
specified") removed the need to explictly setup the init_irq field in
the machine description when using only irqchip_init. Remove that
declaration for shmobile as well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Maxime Ripard [Tue, 14 May 2013 15:38:42 +0000 (17:38 +0200)]
ARM: shmobile: r8a73a4: Remove init_irq declaration in machine description
Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
specified") removed the need to explictly setup the init_irq field in
the machine description when using only irqchip_init. Remove that
declaration for shmobile as well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Maxime Ripard [Tue, 14 May 2013 15:38:41 +0000 (17:38 +0200)]
ARM: shmobile: emev2: Remove init_irq declaration in machine description
Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
specified") removed the need to explictly setup the init_irq field in
the machine description when using only irqchip_init. Remove that
declaration for shmobile as well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Maxime Ripard [Tue, 14 May 2013 15:38:39 +0000 (17:38 +0200)]
ARM: shmobile: kzm9g: Remove init_irq declaration in machine description
Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
specified") removed the need to explictly setup the init_irq field in
the machine description when using only irqchip_init. Remove that
declaration for shmobile as well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bastian Hecht [Wed, 8 May 2013 13:20:04 +0000 (15:20 +0200)]
irqchip: Add irqchip_init dummy function
We add an empty irqchip_init dummy function for cases in which
CONFIG_IRQCHIP is not used. In these cases irqchip.c is not compiled,
but a funtion call may still be present in architecture code, that in
runtime doesn't get hit.
E.g. this is needed in the arch/arm/mach-shmobile/intc-r8a7740.c
interrupt setup code where OF use and non OF us is both handled in one
file.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
[horms+renesas@verge.net.au: Make non-CONFIG_IRQCHIP version static inline
and remove trailing ';'.] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We add 2 Suspend to RAM modes:
- A3SM PLL0 on/off: Power domain A3SM that contains the ARM core
and the 2nd level cache with either PLL0 on
or off
As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
is included here too, so CPUIdle can use both power down modes (not
included in this patch).
The setup of the SYSC regarding the external IRQs is taken from
pm-sh7372.c from Magnus Damm.
Sergei Shtylyov [Tue, 9 Apr 2013 17:48:59 +0000 (21:48 +0400)]
ARM: shmobile: R8A7779: fix Ether device name
While recasting the commit "ARM: shmobile: R8A7779: add Ether support", I made a
typo in the platform device's name: used underscore instead of hyphen.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: sh-mobile: r8a7790: Make private clock arrays static
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car M1 has many clocks, and it is possible to
read/use clock ratio of these clocks from FRQMRx.
But, these ratio are fixed value and
these are decided by MD pin status.
This patch reads MD pin status,
and used fixed ratio clock for other clocks.
It was tesed on bock-w board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Tue, 9 Apr 2013 17:47:51 +0000 (21:47 +0400)]
ARM: shmobile: R8A7778: fix Ether device name
While recasting the commit "ARM: shmobile: R8A7778: add Ether support", I made a
typo in the platform device's name: used underscore instead of hyphen.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car H1 or Gen2 GPIO interrupts are assigned per each GPIO domain,
but, Gen1 E1/M1 GPIO interrupts are shared for all GPIO domain.
gpio-rcar driver needs IRQF_SHARED flags for these.
This patch was tested on Bock-W board
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car series gpio_rcar driver can control GPIO IRQ today.
It needs base IRQ number for gpio_rcar_config :: .irq_base
This patch adds macro for GPIO IRQ.
This patch was tested on Bock-W board
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 16 Apr 2013 23:03:45 +0000 (03:03 +0400)]
ARM: shmobile: BOCK-W: enable CONFIG_PM_RUNTIME in defconfig
Enable CONFIG_PM_RUNTIME in 'bockw_defconfig' -- it's already used by TMU, SCI,
I2C, and Ether drivers to control the clocks...
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: kzm9g-reference: add AS3711 and CPUFreq DT bindings
This adds DT bindings for an AS3711 PMIC, used for supplying power to the
CPU, some peripherals and the backlight, as well as extends the cpu0 DT
node with OPPs and a reference to the PMIC to support the CPUFreq and
CPU DVFS functions.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7740: Prepare for reference DT setup
We need three steps to prepare for the new Armadillo reference DT board code:
- Split the device list into r8a7740_early_devices used by the old platform
data setup (board-armadillo.c) and r8a7740_devices_dt used by both
setup variants.
- Introduce new r8a7740_init_delay() to be more flexible about calling
shmobile_setup_delay().
- For the generic r8a7740 support, we switch to device tree setup for
the GIC, the irqpin devices and the I2C controllers.
This is slightly similar to commit 3b00f9342623a5ebc
"ARM: shmobile: sh73a0: Do not use early devices with DT reference"
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: sh-mobile: r8a7740: Make private clock arrays static
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
To avoid further similar issues, also define the main_clks as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Define DT bindings for timer devices
The SH mobile series currently features 3 timer devices in the kernel:
Compare Match Timer (CMT), Timer Unit (TMU) and MTU2. These devices
share register layout characteristics amongst each that enable us to
define common DT bindings for them.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Most Renesas irqpin controllers have 4-bit sense fields, however, some
have different widths. This patch adds a DT binding to optionally
specify such non-standard values.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 8 Apr 2013 02:08:44 +0000 (11:08 +0900)]
ARM: shmobile: Add second I/O range for r8a7790 PFC
Add the GPIO I/O memory range to the r8a7790 PFC device.
This extra I/O memory range is needed when using the PFC
tables to drive both pin functions (using PINCTRL or
function GPIO for old code) and actual GPIO. The goal is
however to use a separate GPIO driver in the long run
and when that happens this extra I/O memory range can
be removed.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: add AS3711 PMIC platform data on kzm9g
KZM9G uses an AS3711 PMIC to supply power to the CPU and the LCD backlight.
The PMIC on the board is pre-programmed to supply correct voltages to the
CPU, power supply to the backlight has to be turned on at run-time. The
latter is currently performed by a hard-coded I2C command sequence in the
board file. This patch removes the backlight hack and instead adds an I2C
device to instantiate the AS3711 MFD driver, which will add a regulator
device to dynamically adjust CPU voltages and a backlight device.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Thu, 4 Apr 2013 02:20:33 +0000 (11:20 +0900)]
ARM: shmobile: kzm9d: resigser smsc911x platform device with id -1
As the kzm9d only has one smsc911x device it
may be registered as a platform device with id -1.
This allows the kzm9d board to access the smsc911x device
when CONFIG_REGULATOR (and CONFIG_REGULATOR_FIXED_VOLTAGE)
are set. The motivation for which is twofold: using regulators
seems to be generally a good thing; it will move the kzm9d defconfig
one step closer to being able to be consolidated with other
shmobile defconfigs.
An alternate but so far untested approach would be to
update the definition of dummy_supplies in board-kzm9d.c
to use "smsc911x.0" instead of "smsc911x".
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778_init_irq_extpin() for IRQ0 - IRQ3.
But this patch doesn't enable DT settings on r8a7778.dts,
because R8A7778 chip external IRQ depends on
IRQ0 - IRQ3 pin encoding which came from platform board
implementation.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
MMCIF and SDHI1 share the same slot on mackerel. One of them is selected
by a jumper, which cannot be queried from software. Currently in software
one of the two interfaces is selected, depending whether or not the MMCIF
driver is enabled. This is not optimal, since the kernel has to be rebuilt
to switch from one interface to another. Still, so far there isn't a
better option. At least make this selection consistent.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 29 Mar 2013 08:00:21 +0000 (17:00 +0900)]
ARM: shmobile: APE6EVM LAN9220 support
Add LAN9220 support to the APE6EVM board using C and DT.
At this point the PFC driver lacks DT bindings so to
configure the PFC we use PINCTRL in C board code.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Wed, 3 Apr 2013 01:49:18 +0000 (10:49 +0900)]
Merge tag 'renesas-pinmux2-for-v3.10' into boards-base
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10
Highlights:
* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC
This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
This merge is made to supply run-time dependencies for the following
patches that will bea added on top:
ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
Magnus Damm [Tue, 26 Mar 2013 13:50:09 +0000 (22:50 +0900)]
sh-pfc: r8a73a4: GPIO IRQ support
V2 of code to add GPIO -> IRQ mappings to the
PFC table for the r8a73a4 SoC. Requires the IRQs
to be mapped at a fixed location in Linux IRQ
space. The actual IRQs are not handled by the
PFC, instead IRQC is used on r8a73a4.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 13:49:59 +0000 (22:49 +0900)]
sh-pfc: r8a73a4: Support sparse GPIO numbers
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers
in the PFC SoC data. Pin numbers shall be used with the GPIO API from
this point on.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 13:49:49 +0000 (22:49 +0900)]
sh-pfc: Add r8a73a4 pinmux support
Add initial PFC support for the r8a73a4 SoC.
At this point only GPIO interface is supported, move to newer interfaces
planned as incremental changes.
Original authors are Morimoto-san with help from Yoshii-san, thanks to
them for the heavy lifting. Adjusted by Magnus to work together with
updated code in drivers/pinctrl.
Laurent Pinchart [Sun, 10 Mar 2013 16:30:25 +0000 (17:30 +0100)]
sh-pfc: Configure pins as GPIOs at request time when handled externally
When a GPIO is handled by a separate driver the pinmux
gpio_set_direction() handler won't be called. The pin mux type then need
to be configured to GPIO at request time.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Laurent Pinchart [Sun, 10 Mar 2013 02:19:44 +0000 (03:19 +0100)]
sh-pfc: Skip gpiochip registration when no GPIO resource is found
Boards/platforms that register dedicated GPIO devices will not supply a
memory resource for GPIOs. Try to locate the GPIO memory resource at
initialization time, and skip registration of the gpiochip if the
resource can't be found.
This is a temporary modification to ease the transition to separate GPIO
drivers. It should be reverted when all boards and platforms will have
been moved.
Laurent Pinchart [Sun, 10 Mar 2013 02:19:44 +0000 (03:19 +0100)]
sh-pfc: Make GPIO support optional
When implemented as a separate IP block, GPIOs should be handled by a
separate driver. To make this possible GPIO support needs to be optional
in the sh-pfc driver.
If no GPIO data registers are supplied in the SoC information structure
skip registration of the gpiochip.
The target is to get rid of function GPIOs completely. To reach this,
make function GPIOs support optional by skipping the function GPIO chip
registration if no function GPIOS are defined in SoC data.
Magnus Damm [Wed, 13 Mar 2013 11:32:13 +0000 (20:32 +0900)]
gpio: Renesas R-Car GPIO driver V3
This patch is V3 of a GPIO driver for the R-Car series of
SoCs from Renesas. This driver is designed to be reusable
between multiple SoCs that share the same basic building block,
but so far it has only been used on R-Car H1 (r8a7779).
Each driver instance handles 32 GPIOs with individually
maskable IRQs. The driver operates on a single I/O memory
range and the 32 GPIOs are hooked up a single interrupt.
In the case of R-Car H1 either external IRQ pins or GPIOs
with interrupts can be used for on-board interupts. For
external IRQs 4 pins are supported, and in the case of GPIO
there are 202 GPIOS as 202 interrupts hooked up via 6 driver
instances and to the GIC and the Cortex-A9 Quad.
At this point this driver is interfacing as a regular
platform device driver. In the future DT support will be
submitted as an incremental feature patch.
Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
projects / karo-tx-linux.git / log