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10 years agoENGR00290496-2 ARM: imx_v7_defconfig: Enable gpio-led in configs
Robin Gong [Tue, 3 Dec 2013 07:03:03 +0000 (15:03 +0800)]
ENGR00290496-2 ARM: imx_v7_defconfig: Enable gpio-led in configs

Enable the related option of configuration.

Signed-off-by: Robin Gong <b38343@freescale.com>
10 years agoENGR00290496-1 ARM: imx6: Add charging led support on Sabresd board
Robin Gong [Tue, 3 Dec 2013 06:59:05 +0000 (14:59 +0800)]
ENGR00290496-1 ARM: imx6: Add charging led support on Sabresd board

Enable led lighting while the board in charging status. Implement it on Sabresd
board.

Signed-off-by: Robin Gong <b38343@freescale.com>
10 years agoENGR00290361-2 MXC IPUv3 fb:Add check for a IDMAC errata
Liu Ying [Mon, 2 Dec 2013 08:56:00 +0000 (16:56 +0800)]
ENGR00290361-2 MXC IPUv3 fb:Add check for a IDMAC errata

The IPUv3 IDMAC has a bug to read 32bpp pixels from a
graphics plane whose alpha component is at the most
significant 8 bits. The bug only impacts on cases in which
the relevant separate alpha channel is enabled.
This patch adds check for the errata so that the bad
cases won't be triggered.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agoENGR00290361-1 IPUv3 IC:Add check for a IDMAC errata
Liu Ying [Thu, 21 Nov 2013 08:39:08 +0000 (16:39 +0800)]
ENGR00290361-1 IPUv3 IC:Add check for a IDMAC errata

The IPUv3 IDMAC has a bug to read 32bpp pixels from a
graphics plane whose alpha component is at the most
significant 8 bits. The bug only impacts on cases in which
the relevant separate alpha channel is enabled.
This patch adds check for the errata so that the bad
cases won't be triggered.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agoENGR00290337 ipuv3: Setup pixel clock tree after ipu reset
Sandor Yu [Mon, 2 Dec 2013 07:40:46 +0000 (15:40 +0800)]
ENGR00290337 ipuv3: Setup pixel clock tree after ipu reset

When the ipu pixel clocks are initialized, the default pixel clock rate
will be calucated according to the present ipu register setting which
is likely set by a bootloader.
But these registers will be reset by the ipu reset function.
If the default pixel clock rate is the same to what is requested later,
the clk_set_rate function will treat this case as pixel clock unchanged.

Move the pixel clock setup function after the ipu reset function to
resolve this issue

Signed-off-by: Sandor Yu <R01008@freescale.com>
10 years agomtd: add MTD_MLCNANDFLASH case for mtd_type_show()
Huang Shijie [Wed, 25 Sep 2013 06:58:19 +0000 (14:58 +0800)]
mtd: add MTD_MLCNANDFLASH case for mtd_type_show()

The current mtd_type_show() misses the MTD_MLCNANDFLASH case.
This patch adds the case for it, and also updates the ABI.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agoENGR00290297 usb: imx6-usb-charger: disable charger if it has not configurated
Peter Chen [Thu, 28 Nov 2013 08:06:44 +0000 (16:06 +0800)]
ENGR00290297 usb: imx6-usb-charger: disable charger if it has not configurated

If the user set imx6-usb-charger-detection at dts, but not enable
CONFIG_IMX6_USB_CHARGER, the imx6_usb_create_charger will return
-ENODEV, and the controlller probe will fail, it is not we want,
what we expect is the charger detection has disabled, but controller
function should not be affected.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00290021 [iMX6QDL] Skip RNG instantiation unless needed.
Dan Douglass [Thu, 28 Nov 2013 07:29:05 +0000 (01:29 -0600)]
ENGR00290021 [iMX6QDL] Skip RNG instantiation unless needed.

Adding check to skip RNG instantiation if previously performed. This will prevent CAAM from crashing when HAB instantiates the RNG at boot on a closed device. Also removed an extra printk that isn't needed in secvio initialization.

Signed-off-by: Dan Douglass <b41520@freescale.com>
10 years agoENGR00290236 PXP: Correct PXP settings when s0 format is PXP_PIX_FMT_YUV422P
Fancy Fang [Fri, 29 Nov 2013 10:37:45 +0000 (18:37 +0800)]
ENGR00290236 PXP: Correct PXP settings when s0 format is PXP_PIX_FMT_YUV422P

When the s0 format is PXP_PIX_FMT_YUV422P, the s0 pitch and U/V
buffer address cannot be set correctly.

Signed-off-by: Fancy Fang <B47543@freescale.com>
10 years agoENGR00290229 ASoC: fsl: Drop snd_soc_dapm_sync() in imx-wm8962
Nicolin Chen [Fri, 29 Nov 2013 09:44:39 +0000 (17:44 +0800)]
ENGR00290229 ASoC: fsl: Drop snd_soc_dapm_sync() in imx-wm8962

As DAPM would do the sync() for us, we don't need to handle it by ourselves.
And leaving snd_soc_dapm_sync() here is dangerous because it would disable
the clock from WM8962 during the short period of the output route changing
since we don't leave the alternative route's enanbling to this machine driver
but to DAPM core.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00289645 usb: chipidea: udc: don't do hardware access if gadget has stopped
Peter Chen [Tue, 26 Nov 2013 05:33:21 +0000 (13:33 +0800)]
ENGR00289645 usb: chipidea: udc: don't do hardware access if gadget has stopped

After _gadget_stop_activity is executed, we can consider the hardware
operation for gadget has finished, and the udc can be stopped and enter
low power mode. So, any later hardware operations (from usb_ep_ops APIs
or usb_gadget_ops APIs) should be considered invalid, any deinitializatons
has been covered at _gadget_stop_activity.

I meet this problem when I plug out usb cable from PC (using g_mass_storage),
my callstack like: vbus interrupt->.vbus_session->composite_disconnect
->pm_runtime_put_sync(&_gadget->dev), the composite_disconnect will
call fsg_disable, but fsg_disable calls usb_ep_disable using async way,
there are register accesses for usb_ep_disable. So sometimes, I get system
hang due to visit register without clock, sometimes not.

The Linux Kernel USB maintainer Alan Stern suggests this kinds of solution.
See: http://marc.info/?l=linux-usb&m=138541769810983&w=2.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit ac760d29366f19eb1a4d4c37899b33019570a447)

10 years agoENGR00290176 mxc: mlb: Fix MLB suspend/resume issue
Luwei Zhou [Fri, 29 Nov 2013 04:54:49 +0000 (12:54 +0800)]
ENGR00290176 mxc: mlb: Fix MLB suspend/resume issue

There is risk that mlb register will be access when clock
is closed. This patch fix it.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00289381 mxc: asrc: Fix RCU stall in output_task_worker
Nicolin Chen [Fri, 22 Nov 2013 12:22:47 +0000 (20:22 +0800)]
ENGR00289381 mxc: asrc: Fix RCU stall in output_task_worker

In kernel 3.10.17, RCU has its threshold to detect RCU stall. So it might be
risky for us to use a whole second to wait for the completion, which would
be surely returned within 100ms. Thus, we shrink the wait period so as to
circumvent some potential RCU stall issue.

This patch also moved pair_hold into spin_lock protection due to a race with
pair_hold in close() and release().

Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit 5b35fca56107cb04bdf342969887b386683da901)

10 years agoENGR00211653 [MX6Q ARD] IMX UART add support for loopback mode.
Israel Perez [Thu, 28 Nov 2013 07:00:33 +0000 (15:00 +0800)]
ENGR00211653 [MX6Q ARD] IMX UART add support for loopback mode.

ttymxc serial uart driver add  support loopback mode.
returns TIOCM_LOOP set when reading the status.

[original hash:42d5723   fix a litte for 3.10.17]
Signed-off-by: Israel Perez <B37753@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agoENGR00289889 pcie: make all pcie gpio be optional
Richard Zhu [Wed, 27 Nov 2013 07:24:37 +0000 (15:24 +0800)]
ENGR00289889 pcie: make all pcie gpio be optional

make all pcie gpio be optional, since
ard board doesn't have pcie reset gpio pin

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00289885 [iMX6Q] Add Secure Memory and SECVIO support.
Dan Douglass [Wed, 27 Nov 2013 09:40:44 +0000 (03:40 -0600)]
ENGR00289885 [iMX6Q] Add Secure Memory and SECVIO support.

1. Pull in secure memory support from 3.0.35 kernel.
2. Pull in SECVIO support from 3.0.35 kernel.
3. Make changes to support device tree.
4. Add device tree setting for SECVIO sources.

Signed-off-by: Dan Douglass <b41520@freescale.com>
10 years agoENGR00289643-2 ASoC: fsl: Add missing spba clock for esai and spdif
Nicolin Chen [Tue, 26 Nov 2013 07:08:41 +0000 (15:08 +0800)]
ENGR00289643-2 ASoC: fsl: Add missing spba clock for esai and spdif

Both esai and spdif are using SDMA script to transmit and receive data while
the essential spba clock is missed in the current two drivers. Thus add them.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00289643-1 arm: imx6sl: add missing spba clock to clock tree
Nicolin Chen [Wed, 27 Nov 2013 10:32:03 +0000 (18:32 +0800)]
ENGR00289643-1 arm: imx6sl: add missing spba clock to clock tree

We are missing spba clock in imx6sl's clock tree, thus add it.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00289859 PXP: fix that multi users may access PXP hardware simultaneously
Fancy Fang [Wed, 27 Nov 2013 08:41:38 +0000 (16:41 +0800)]
ENGR00289859 PXP: fix that multi users may access PXP hardware simultaneously

After the patch 6320ada11093ef0a4ded9065d6ae284a9129f7d6, there still exists
some cases that more than one user would set PXP hardware registers before the
previous task done. Now use another mutex lock to make sure that registers
settings can only happen when PXP hardware is idle.

Signed-off-by: Fancy Fang <B47543@freescale.com>
10 years agoENGR00289857 mxsfb: add suspend/resume function
Sandor Yu [Tue, 26 Nov 2013 09:31:12 +0000 (17:31 +0800)]
ENGR00289857 mxsfb: add suspend/resume function

Add suspend/resume function to mxsfb driver.

Signed-off-by: Sandor Yu <R01008@freescale.com>
10 years agoENGR00289648 mx6sl: v4l2 output: Add UYVY format as input format for v4l2
Robby Cai [Tue, 26 Nov 2013 07:20:28 +0000 (15:20 +0800)]
ENGR00289648 mx6sl: v4l2 output: Add UYVY format as input format for v4l2

This feature is easy for gstreamer to pipeline v4lsrc and v4lsink, since
camera output format can be set as UYVY in v4l2 capture driver, and PxP
will do the CSC from UYVY to RGB565 in v4l2 output driver for LCD display.

Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit d8f47ca83385f3e96ce457f35b69c4a7ac733a6e)

10 years agoENGR00289553 IPU dev:correct downsize overflow check in rot case
Liu Ying [Mon, 25 Nov 2013 10:34:40 +0000 (18:34 +0800)]
ENGR00289553 IPU dev:correct downsize overflow check in rot case

In rotation cases, the width and height of IPUv3 IC scaling block's
output should align with the width and height of IPUv3 IC rotation
block. And, users only tell the IPUv3 device driver about the parameters
of scaling block's input and rotation block's output. So, we need to
swap the width and height of rotation block in cache before we do
downsize(a functionality of the scaling block) overflow check.

This patch fixes the issue which can be reproduced by this unit test case:
/unit_tests/mxc_v4l2_output.out -iw 128 -ih 128 -ow 176 -oh 10 -r 90

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agoENGR00289436 - [V4L2 Capture] Build warning on mxc_v4l2_capture.c
Oliver Brown [Fri, 22 Nov 2013 16:30:15 +0000 (10:30 -0600)]
ENGR00289436 - [V4L2 Capture] Build warning on mxc_v4l2_capture.c

Need to remove the following warning:

warning: array subscript is above array bounds

Summary of changes:
Moved MXC_SENSOR_NUM definition to mxc_v4l2_capture.h.
all_sensors[] now uses MXC_SENSOR_NUM in definition.
MXC_SENSOR_NUM is now used for bounds checking the array.

Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
10 years agoENGR00289268 [iMX6x] Ensure there is no TLB miss when DDR is in self-refresh
Ranjani Vaidyanathan [Fri, 22 Nov 2013 06:20:32 +0000 (00:20 -0600)]
ENGR00289268 [iMX6x] Ensure there is no TLB miss when DDR is in self-refresh

During DDR frequency change code or in low power IDLE code (in iMX6SL),
we need to ensure that all register addresses accessed in the IRAM
code are in the TLB. There should be no TLB walks when DDR is in self-refresh.
To ensure this flush the TLB before DDR frequency change and before
low power IDLE (only iMX6SL) procedures.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
10 years agoENGR00274166 - Split mode has artifacts
Oliver Brown [Mon, 18 Nov 2013 20:52:27 +0000 (14:52 -0600)]
ENGR00274166 - Split mode has artifacts

- Need to use different multiple and index parameters for vertical
and horizontal stripes
- Use correct multiple and index based upon pixel format
- Allow input crop and size to be larger than width by upto 16 pixels

Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
10 years agoENGR00272541 IPUv3 IC: Split Downsizing overflow for size greater than 1024
Oliver Brown [Tue, 19 Nov 2013 15:49:53 +0000 (09:49 -0600)]
ENGR00272541 IPUv3 IC: Split Downsizing overflow for size greater than 1024

For downscaling, it is possible that downscaler output is greater
than 1024. Added a function, calc_split_resize_coeffs, based upon
_calc_resize_coeffs to calculate resizing and downscaling coefficients.

In ipu_ic.c, checks for the range of *_resize_ratio are no longer needed.
 Non split cases will always have  *_resize_ratio of zero.

In ipu_device, additional checks are needed to check for an error from
ipu_calc_stripes_sizes if calc_split_resize_coeffs fails.

Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
10 years agoENGR00289406-2 mmc: sdhci-esdhc-imx: add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER
Dong Aisheng [Fri, 22 Nov 2013 12:39:15 +0000 (20:39 +0800)]
ENGR00289406-2 mmc: sdhci-esdhc-imx: add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER

The max timeout counter for uSDHC is SDCLK x (1 << 28), not as standard
controller defined as TMCLK x (1 <<27).
Add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to handle it.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00289406-1 mmc: sdhci: add quirk for get max timeout counter
Dong Aisheng [Fri, 22 Nov 2013 12:34:38 +0000 (20:34 +0800)]
ENGR00289406-1 mmc: sdhci: add quirk for get max timeout counter

The max timeout counter of some SoCs like i.MX6 uSDHC may not be standard,
add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to get the correct max timeout
counter from platform specific code.
Then we can calculate the correct max_discard_to value.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00258885 flexcan: fix errata ERR005829 that MB may fail to be sent
Dong Aisheng [Fri, 12 Apr 2013 10:49:36 +0000 (18:49 +0800)]
ENGR00258885 flexcan: fix errata ERR005829 that MB may fail to be sent

This is an issue from IC errata ERR005829 which is described as follows:
----------------------------------------------------------
FlexCAN does not transmit a message that is enabled to be transmitted
in a specific moment during the arbitration process. The following
conditions are necessary to have the issue.
- Only one MB is configured to be transmitted
- The write which enables the MB to be transmitted (write on Control status
  word) happens during a specific clock during the arbitration process.

After this arbitration process occurs, the bus goes to Idle state and no
new message is received on bus.

For example:
1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control
Status word) - First write on CODE
2) Reconfigure the ID and data fields
3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code
field) - Second write on code
4) CAN bus keeps in Idle state
5) No write on Control status from any MB happens.
During the second write on code (step 3), the write must happen one clock
before the current MB13 is to be scanned by arbitration process.
In this case, it does not detect the new code (0xC) and no new arbitration is
scheduled.

The suggested workaround which is implemented in this patch is:
The workaround consists of executing two extra steps:
6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first
valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter.
7. Write twice INACTIVE code (0b1000) into the first valid mailbox.
Note: The first mailbox cannot be used for reception or transmission process.
-------------------------------------------------------------

Note: Although the currently flexcan driver does not have the step 1 to run,
it's also possible to meet this issue in theory because we can not predict
when the arbitration is scheduled.

With a modified can-utils/canfdttest tool simulating Pingpong test, we were
able to reproduce this issue after running a about one day.
After applying this patch, we ran six days and did not see the issue happen
again on two mx6q sabrelite boards.

Note: with a few minors change for new kernel and change errata id from
ERR005641 to ERR005829 which is the open one in freescale website.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 872eb1691afb83a2760052c615ed410a7cfe71e0)

10 years agoENGR00289237 PXP: fix a multiple instances hang issue
Fancy Fang [Thu, 21 Nov 2013 11:44:45 +0000 (19:44 +0800)]
ENGR00289237 PXP: fix a multiple instances hang issue

In pxp_issue_pending(), the wait for pxp done processes will be woken up
together in PXP ISR. So there will be some situations that one process will
set PXP hardware registers after another process's setting but before the
first PXP task done. So the PXP hardware may be corrupted and hang maybe
happen.

Signed-off-by: Fancy Fang <B47543@freescale.com>
10 years agoENGR00288569: net:fec_ptp: fix the potential issue for storing timestamp
Fugang Duan [Tue, 19 Nov 2013 04:59:18 +0000 (12:59 +0800)]
ENGR00288569: net:fec_ptp: fix the potential issue for storing timestamp

The timestamps generated in the i.MX drivers are generated by the
nanoseconds part coming from the 1588 clock. But the number of seconds
are maintained in a private structure of the interface. Those are
updated in a 1588 clock rollover interrupt.

The timestamp is generated right before a rollover of a second and the
timestamp value is constructed afterwards. Therefore the bigger part of
the timestamp is wrong (the second).

commit:54181c1d83e04b18e63c7723ac80f974b760e019
Suggested solution (pseudo-code):
    If( actual-time.nsec < timestamp.nsec )
        Timestamp.sec = fpp->prtc -1;
    Else
        Timestamp.sec = fpp->prtc;

But it is not perfect and there still exist potenitial second sync issue.
So, the patch Suggested solution (pseudo-code):
    If( actual-time.nsec < timestamp.nsec &&
!FEC_IEVENT[TS_TIMER] )
        Timestamp.sec = fpp->prtc -1;
    Else
        Timestamp.sec = fpp->prtc;

Signed-off-by: Fugang Duan <B38611@freescale.com>
10 years agoENGR00289278 dts: imx6qdl-sabreauto: fix usdhc1 pin conflict with gpmi
Dong Aisheng [Fri, 22 Nov 2013 05:45:22 +0000 (13:45 +0800)]
ENGR00289278 dts: imx6qdl-sabreauto: fix usdhc1 pin conflict with gpmi

The SD1 on sabreauto baseboard is conflict with gpmi nand. The conflict
pins are DAT4~DAT7. Since the SD3 on cpu board already supports 8 bit bus
width, we do not want add an extra dts file for it, so we disable 8 bit and use
4 bit width for this issue.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00289279 mmc: sdhci: get runtime pm when sdio irq is enabled
Dong Aisheng [Fri, 15 Nov 2013 09:54:36 +0000 (17:54 +0800)]
ENGR00289279 mmc: sdhci: get runtime pm when sdio irq is enabled

SDIO cards may need clock to send the card interrupt to host.
Thus, we get runtime pm when sdio irq is enabled to prevent the clock
resource is released and put it when sdio irq is disabled.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00288578-8 usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection
Peter Chen [Thu, 21 Nov 2013 08:45:18 +0000 (16:45 +0800)]
ENGR00288578-8 usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection

At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288578-7 usb: phy-mxs: add controller id
Peter Chen [Thu, 21 Nov 2013 11:14:42 +0000 (19:14 +0800)]
ENGR00288578-7 usb: phy-mxs: add controller id

Meanwhile, we fix the problem that we only use controller-1's related
registers at mxs_phy_disconnect_line.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288578-6 ARM: imx: add mxs phy controller id
Peter Chen [Thu, 21 Nov 2013 08:55:28 +0000 (16:55 +0800)]
ENGR00288578-6 ARM: imx: add mxs phy controller id

We use to use controller id to access different register regions

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288578-5 usb: chipidea: change some output message
Peter Chen [Tue, 19 Nov 2013 08:32:52 +0000 (16:32 +0800)]
ENGR00288578-5 usb: chipidea: change some output message

To reduce the message output when unload the module

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288578-4 usb: chipidea: using timer to delay decreasing power.usage_count
Peter Chen [Tue, 19 Nov 2013 07:42:32 +0000 (15:42 +0800)]
ENGR00288578-4 usb: chipidea: using timer to delay decreasing power.usage_count

We need to keep controller as active until the udc or host driver
requests its power.usage_count, otherwise, the system will hang
due to access register at low power mode.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288578-3 usb: chipidea: only update ci->vbus_active at peripheral mode
Peter Chen [Tue, 19 Nov 2013 06:29:33 +0000 (14:29 +0800)]
ENGR00288578-3 usb: chipidea: only update ci->vbus_active at peripheral mode

If we connect between otg-host and host pc with Male-A-To-Male-A cable,
the ci->vbus_active will be error, and cause the controller run when
we load gadget module (ci_udc_start will be run), it causes the kernel
panic since no one will handle irq at that mode.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288578-2 usb: phy-mxs: Add sync time after controller clear phcd
Peter Chen [Thu, 21 Nov 2013 07:37:38 +0000 (15:37 +0800)]
ENGR00288578-2 usb: phy-mxs: Add sync time after controller clear phcd

After clear portsc.phcd, PHY needs 200us time from switch
32K clock to AHB clock.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288578-1 usb: chipidea: using correct low power timing
Peter Chen [Tue, 19 Nov 2013 06:25:04 +0000 (14:25 +0800)]
ENGR00288578-1 usb: chipidea: using correct low power timing

After PHY leaves low power mode, the controller needs 2ms
to reflect PHY's status correctly.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00288522 power: imx6-usb-charger: fix build error when build as module
Peter Chen [Tue, 19 Nov 2013 02:38:55 +0000 (10:38 +0800)]
ENGR00288522 power: imx6-usb-charger: fix build error when build as module

It is a library, so it can't be built as a module, besides,
it uses anatop register, it should depends on imx6 soc series.
Below is the build error message it fixes:

CC [M]  drivers/power/imx6_usb_charger.o
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:173:5: error: redefinition of 'imx6_usb_vbus_connect'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:70:5: note: previous definition of 'imx6_usb_vbus_connect' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:200:5: error: redefinition of 'imx6_usb_charger_detect_post'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:74:5: note: previous definition of 'imx6_usb_charger_detect_post' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:235:5: error: redefinition of 'imx6_usb_vbus_disconnect'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:65:5: note: previous definition of 'imx6_usb_vbus_disconnect' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:256:5: error: redefinition of 'imx6_usb_create_charger'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:59:5: note: previous definition of 'imx6_usb_create_charger' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:290:6: error: redefinition of 'imx6_usb_remove_charger'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:54:6: note: previous definition of 'imx6_usb_remove_charger' was here
make[3]: *** [drivers/power/imx6_usb_charger.o] Error 1
make[2]: *** [drivers/power] Error 2

Signed-off-by: Peter Chen <peter.chen@freescale.com>
10 years agoENGR00277698 net:fec: avoid kernel dump for skb page allocation fail
Fugang Duan [Thu, 21 Nov 2013 04:58:01 +0000 (12:58 +0800)]
ENGR00277698 net:fec: avoid kernel dump for skb page allocation fail

Fast reproduce steps:
1. set kernel parameter mem=500M, after kernel up, run below steps.
1. mount 10.192.225.224:/nfsroot /media/Videos/224nfsroot -t nfs
   -o rw,nolock,addr=10.192.225.224
2. cd /media/Videos/224nfsroot/gst-sanity-test
3. ./linux_recording_sanity_test.sh recording_playback_cmd.txt

kernel dump:
--------------------------------------------------------------
Swap cache stats: add 0, delete 0, find 0/0
Free swap  = 0kB
Total swap = 0kB
kswapd0: page allocation failure: order:0, mode:0x20
CPU: 0 PID: 54 Comm: kswapd0 Tainted: G        W    3.10.17-16884-gc530ac0 #239
[<80013c4c>] (unwind_backtrace+0x0/0xf8) from [<80011704>] (show_stack+0x10/0x14)
[<80011704>] (show_stack+0x10/0x14) from [<8008bb7c>] (warn_alloc_failed+0xd0/0x114)
[<8008bb7c>] (warn_alloc_failed+0xd0/0x114) from [<8008e860>] (__alloc_pages_nodemask+0x5e0/0x8b8)
[<8008e860>] (__alloc_pages_nodemask+0x5e0/0x8b8) from [<804cceb8>] (__netdev_alloc_frag+0x9c/0x138)
[<804cceb8>] (__netdev_alloc_frag+0x9c/0x138) from [<804cddc4>] (__netdev_alloc_skb+0x40/0xe0)
[<804cddc4>] (__netdev_alloc_skb+0x40/0xe0) from [<8037dc8c>] (fec_enet_rx_napi+0x268/0x7e0)
[<8037dc8c>] (fec_enet_rx_napi+0x268/0x7e0) from [<804d7cf8>] (net_rx_action+0x94/0x160)
[<804d7cf8>] (net_rx_action+0x94/0x160) from [<8002c8fc>] (__do_softirq+0xe8/0x1d0)
[<8002c8fc>] (__do_softirq+0xe8/0x1d0) from [<8002ca8c>] (do_softirq+0x4c/0x58)
[<8002ca8c>] (do_softirq+0x4c/0x58) from [<8002ccf4>] (irq_exit+0x90/0xc8)
[<8002ccf4>] (irq_exit+0x90/0xc8) from [<8000ea88>] (handle_IRQ+0x3c/0x94)
[<8000ea88>] (handle_IRQ+0x3c/0x94) from [<8000855c>] (gic_handle_irq+0x28/0x5c)
[<8000855c>] (gic_handle_irq+0x28/0x5c) from [<8000de00>] (__irq_svc+0x40/0x50)
Exception stack(0xac21be08 to 0xac21be50)
be00:                   80ca16f0 00000000 0000bf28 0000bf28 80ca16c8 ac449c00
be20: 000006a4 00000000 00000000 00000000 000003a4 00000000 00000000 ac21be50
be40: 800bf9e4 805fc0d4 600f0013 ffffffff
[<8000de00>] (__irq_svc+0x40/0x50) from [<805fc0d4>] (_raw_spin_lock+0x38/0x3c)
[<805fc0d4>] (_raw_spin_lock+0x38/0x3c) from [<800bf9e4>] (put_super+0x18/0x3c)
[<800bf9e4>] (put_super+0x18/0x3c) from [<800c0968>] (prune_super+0x13c/0x17c)
[<800c0968>] (prune_super+0x13c/0x17c) from [<80093ff8>] (shrink_slab+0x88/0x218)
[<80093ff8>] (shrink_slab+0x88/0x218) from [<8009637c>] (kswapd+0x510/0x80c)
[<8009637c>] (kswapd+0x510/0x80c) from [<80042d64>] (kthread+0xa4/0xb0)
[<80042d64>] (kthread+0xa4/0xb0) from [<8000e258>] (ret_from_fork+0x14/0x3c)
--------------------------------------------------------------

Firstly, alloc_page() try to allocate page from pcp high speed cached page or
free_list by calling get_page_from_freelist(). If failed, and then use low
speed allocation mechanism by calling  __alloc_pages_slowpath(), which may
allocate from reclaimed pages and kernel dump the memory allocate info.

Still don't find the root cause, this patch avoid the kernel dump
in temporarily.

Signed-off-by: Fugang Duan <B38611@freescale.com>
10 years agoENGR00289050 mxsfb: remove dev_err in pan_dispaly function
Sandor Yu [Thu, 21 Nov 2013 08:00:12 +0000 (16:00 +0800)]
ENGR00289050 mxsfb: remove dev_err in pan_dispaly function

Xserver will call pan display after fb blanked when device bootup.
mxsfb have prevent such operate.
Replace dev_err with dev_dbg to avoid message print.

Signed-off-by: Sandor Yu <R01008@freescale.com>
10 years agoENGR00289037 dts: Remove hdcp ddc pin property in imx6qdl-sabresd.dtsi
Sandor Yu [Thu, 21 Nov 2013 07:35:09 +0000 (15:35 +0800)]
ENGR00289037 dts: Remove hdcp ddc pin property in imx6qdl-sabresd.dtsi

HDCP ddc pin property define in imx6q-sabresd-hdcp.dts,
so remove the ddc pin preperty from imx6qdl-sabresd.dtsi.

Signed-off-by: Sandor Yu <R01008@freescale.com>
10 years agoENGR00264453 asoc: when codec probe failed, alsa return RETRY error.
Shengjiu Wang [Thu, 21 Nov 2013 08:10:55 +0000 (16:10 +0800)]
ENGR00264453 asoc: when codec probe failed, alsa return RETRY error.

If there is no codec device, the machine driver will not register the
card. then alsa will not return RETRY error. update the error handling
for machine driver.
Add for cs42888 and si476x.
update dts file for sound-fm.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
10 years agoENGR00288985 imx: sata: add bus frequency high callbacks
Richard Zhu [Thu, 21 Nov 2013 04:46:08 +0000 (12:46 +0800)]
ENGR00288985 imx: sata: add bus frequency high callbacks

Add the fsl BUS_FREQ_HIGH request/release callbacks, during
clk enable/disable operations.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288972 HDMI: unmask overflow interrupter when HDMI phy power on
Sandor Yu [Thu, 21 Nov 2013 05:20:37 +0000 (13:20 +0800)]
ENGR00288972 HDMI: unmask overflow interrupter when HDMI phy power on

Clean HDMI overflow bit need pixel clock on.
HDMI phy power state is align with pixel clock,
so move HDMI overflow bit mask/unmask code to
hdmi phy powerdown/powerup function.

Signed-off-by: Sandor Yu <R01008@freescale.com>
10 years agomtd: gpmi: change pr_debug to dev_dbg
Huang Shijie [Wed, 20 Nov 2013 02:09:44 +0000 (10:09 +0800)]
mtd: gpmi: change pr_debug to dev_dbg

change all the pr_debug to dev_dbg.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: change pr_err to dev_err
Huang Shijie [Wed, 20 Nov 2013 02:09:43 +0000 (10:09 +0800)]
mtd: gpmi: change pr_err to dev_err

There are pr_err and dev_err in the gpmi driver now.
It makes people confused.

This patch changes all the pr_err to dev_err except the one
in the gpmi_reset_block(). We also remove the unnecessary
print for OOM message.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: remove the unnecessary pr_err()
Huang Shijie [Tue, 19 Nov 2013 02:57:50 +0000 (10:57 +0800)]
mtd: gpmi: remove the unnecessary pr_err()

The error messages for the failure of dmaengine_prep_slave_sg are
not necessary, this patch removes all these pr_err, and returns with
the proper error code -EINVAL, not -1.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agoENGR00288506 [iMX6SL] Improve Audio playback power
Ranjani Vaidyanathan [Mon, 18 Nov 2013 22:20:33 +0000 (16:20 -0600)]
ENGR00288506 [iMX6SL] Improve Audio playback power

When ARM executes WFI in audio playback mode, its possible to
lower the power consumed on the VDDHIGH_IN and VDDSOC_IN rails
by:
1. Putting DDR into self-refresh
2. Lower DDR frequency to 25MHz
3. Float DDR IO pads.

Also drop AHB to 8MHz in audio playback mode (aligning with 3.0.35)

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
10 years agoENGR00285283 PXP: make pxp driver compatible for G2D
Fancy Fang [Wed, 20 Nov 2013 02:25:45 +0000 (10:25 +0800)]
ENGR00285283 PXP: make pxp driver compatible for G2D

Use stride to set AS and PS pitch by default, if stride is 0, then use
width to set AS and PS pitch instead. This will make PXP driver both
work for PXP kernel users and G2D applications.

Signed-off-by: Fancy Fang <B47543@freescale.com>
10 years agoENGR00284411-1 PXP: Enhance YUV, alpha blend and rotation
Fancy Fang [Mon, 21 Oct 2013 05:51:21 +0000 (13:51 +0800)]
ENGR00284411-1 PXP: Enhance YUV, alpha blend and rotation

Support YUV formats like: I420, NV12, NV21, UYVY,
YUYV, VYUY, YVYU, NV16, NV61 and YV12.
Support rotation in both stages before and after alpha blending.

Signed-off-by: Fancy Fang <B47543@freescale.com>
10 years agoENGR00288842 mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fix
Dong Aisheng [Tue, 19 Nov 2013 10:10:27 +0000 (18:10 +0800)]
ENGR00288842 mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fix

The uSDHC has an ADMA Length Mismatch errata ERR004536 which may cause ADMA
work abnormally. The errata has already been fixed for i.MX6Q TO1.2
and i.MX6DL TO1.1 by enable the bit 7 in 0x6c register.
Unfortunately this fix is not included in i.MX6SL.
So we disable ADMA for i.MX6SL and use SDMA instead.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
10 years agoENGR00288409 pcie: enable pcie pm when pcie is enabled
Richard Zhu [Mon, 18 Nov 2013 08:42:18 +0000 (16:42 +0800)]
ENGR00288409 pcie: enable pcie pm when pcie is enabled

L2 can exit by 'reset' or Inband beacon (from remote EP)
toggling phy_powerdown has same effect as 'inband beacon'
So, toggle bit18 of GPR1, used as a workaround of errata
"PCIe PCIe does not support L2 Power Down"
WARNING: This is not official workaround for ERR005723. But we
have not found issue yet. User should take own risk to use it.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288407 pcie: add pcie ep rc validation system
Richard Zhu [Thu, 14 Nov 2013 09:16:53 +0000 (17:16 +0800)]
ENGR00288407 pcie: add pcie ep rc validation system

HW setup:
* Two i.MX6Q SD boards, one is used as PCIe RC, the other
is used as PCIe EP. Connected by 2*mini_PCIe to standard_PCIe
adaptors, 2*PEX cable adaptors, One PCIe cable.

SW setup:
* When build RC image, make sure that
  CONFIG_IMX_PCIE=y
  # CONFIG_EP_MODE_IN_EP_RC_SYS is not set
  # CONFIG_EP_SELF_IO_TEST is not set
  CONFIG_RC_MODE_IN_EP_RC_SYS=y
* When build EP image,(enable if you want ep do self IO test):
  CONFIG_EP_MODE_IN_EP_RC_SYS=y
  CONFIG_EP_SELF_IO_TEST=y
  # CONFIG_RC_MODE_IN_EP_RC_SYS is not set

Features:
* Set-up link between RC and EP by their stand-alone
125MHz running internally.
* In EP's system, EP can access the reserved ddr memory
(default address:0x40000000) of PCIe RC's system, by the
interconnection between PCIe EP and PCIe RC.
* add the configuration methods in the EP side, used to
configure the start address and the size of the reserved
RC's memory window.
- cat /sys/devices/soc0/soc.1/1ffc000.pcie/rc_memw_info
- echo 0x41000000 > /sys/devices/soc0/soc.1/1ffc000.pcie/rc_memw_start_set
- echo 0x800000 > /sys/devices/soc0/soc.1/1ffc000.pcie/rc_memw_size_set
* provide one example, howto configure the bar# and so on, when
* pcie ep emaluates one memory ram ep device

Throughput:
* To Be fine-tuned.

NOTE:
* boot up EP platform firstly, then boot up RC platform.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288406 pcie: imx: enable pcie switch support
Richard Zhu [Wed, 13 Nov 2013 08:42:06 +0000 (16:42 +0800)]
ENGR00288406 pcie: imx: enable pcie switch support

Fix the pcie switch no detection issue
Root cause why the switch can't be detected before:
* The initialization sequence is not properly, 100ms reset
should be just issue before ltssm enable.
* Lagency INTx mapping is wrong
* remove un-correct IO/MEM iATU outbound mapping.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00286487 pci: imx: eanble pcie msi support
Richard Zhu [Tue, 12 Nov 2013 07:57:42 +0000 (15:57 +0800)]
ENGR00286487 pci: imx: eanble pcie msi support

eanble pcie msi support on imx6 platforms
* add check_device api in the msi chip.
* add the quirks into pcie_port struct for the deviation
from standard routines.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci
Thomas Petazzoni [Fri, 9 Aug 2013 20:27:12 +0000 (22:27 +0200)]
ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci

Some PCI drivers may need to adjust the pci_bus structure after it has
been allocated by the Linux PCI core. The PCI core allows
architectures to implement the pcibios_add_bus() and
pcibios_remove_bus() for this purpose. This commit therefore extends
the hw_pci and pci_sys_data structures of the ARM PCI core to allow
PCI drivers to register ->add_bus() and ->remove_bus() in hw_pci,
which will get called when a bus is added or removed from the system.

This will be used for example by the Marvell PCIe driver to connect a
particular PCI bus with its corresponding MSI chip to handle Message
Signaled Interrupts.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Daniel Price <daniel.price@gmail.com>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: integrator: merge PCIv3 driver into one file
Linus Walleij [Tue, 29 Jan 2013 16:14:18 +0000 (17:14 +0100)]
ARM: integrator: merge PCIv3 driver into one file

The Integrator/AP PCI bridget, "v3" is contained in two files,
where pci.c is a socket container to plug in the v3 device.
However to transition the v3 to enable device tree probing, it
need to be converted to a platform device (so that it can have
a device node in the device tree) and then we want the PCI
driver in a single file, as any other device driver, so we can
handle variants using compatible strings and device name,
and get the base address etc from resources connected to the
device node.

To move toward this goal we consolidate all code in the
pci_v3.c file.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
10 years agoof: pci: add registry of MSI chips
Thomas Petazzoni [Fri, 9 Aug 2013 20:27:09 +0000 (22:27 +0200)]
of: pci: add registry of MSI chips

This commit adds a very basic registry of msi_chip structures, so that
an IRQ controller driver can register an msi_chip, and a PCIe host
controller can find it, based on a 'struct device_node'.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoof/pci: Add of_pci_parse_bus_range() function
Thierry Reding [Thu, 16 May 2013 15:55:19 +0000 (17:55 +0200)]
of/pci: Add of_pci_parse_bus_range() function

This function can be used to parse a bus-range property as specified by
device nodes representing PCI bridges.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoof/pci: Add of_pci_get_devfn() function
Thierry Reding [Thu, 16 May 2013 15:55:18 +0000 (17:55 +0200)]
of/pci: Add of_pci_get_devfn() function

This function can be used to parse the device and function number from a
standard 5-cell PCI resource. PCI_SLOT() and PCI_FUNC() can be used on
the returned value obtain the device and function numbers respectively.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoPCI: Introduce new MSI chip infrastructure
Thierry Reding [Fri, 9 Aug 2013 20:27:08 +0000 (22:27 +0200)]
PCI: Introduce new MSI chip infrastructure

The new struct msi_chip is used to associated an MSI controller with a
PCI bus. It is automatically handed down from the root to its children
during bus enumeration.

This patch provides default (weak) implementations for the architecture-
specific MSI functions (arch_setup_msi_irq(), arch_teardown_msi_irq()
and arch_msi_check_device()) which check if a PCI device's bus has an
attached MSI chip and forward the call appropriately.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Daniel Price <daniel.price@gmail.com>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoPCI: use weak functions for MSI arch-specific functions
Thomas Petazzoni [Fri, 9 Aug 2013 20:27:06 +0000 (22:27 +0200)]
PCI: use weak functions for MSI arch-specific functions

Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to switch all those functions to use
the 'weak' mechanism. This commit converts all the architectures that
were overidding those MSI functions to use the new strategy.

Note that we keep two separate, non-weak, functions
default_teardown_msi_irqs() and default_restore_msi_irqs() for the
default behavior of the arch_teardown_msi_irqs() and
arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
code.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Daniel Price <daniel.price@gmail.com>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux390@de.ibm.com
Cc: linux-s390@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: x86@kernel.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: linux-ia64@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: David S. Miller <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Cc: Chris Metcalf <cmetcalf@tilera.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoPCI: Allocate only as many MSI vectors as requested by driver
Alexander Gordeev [Mon, 13 May 2013 09:05:48 +0000 (11:05 +0200)]
PCI: Allocate only as many MSI vectors as requested by driver

Because of the encoding of the "Multiple Message Capable" and "Multiple
Message Enable" fields, a device can only advertise that it's capable of a
power-of-two number of vectors, and the OS can only enable a power-of-two
number.

For example, a device that's limited internally to using 18 vectors would
have to advertise that it's capable of 32.  The 14 extra vectors consume
vector numbers and IRQ descriptors even though the device can't actually
use them.

This fix introduces a 'msi_desc::nvec_used' field to address this issue.
When non-zero, it is the actual number of MSIs the device will send, as
requested by the device driver.  This value should be used by architectures
to set up and tear down only as many interrupt resources as the device will
actually use.

Note, although the existing 'msi_desc::multiple' field might seem
redundant, in fact it is not.  The number of MSIs advertised need not be
the smallest power-of-two larger than the number of MSIs the device will
send.  Thus, it is not always possible to derive the former from the
latter, so we need to keep them both to handle this case.

[bhelgaas: changelog, rename to "nvec_used"]
Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
10 years agoPCI: designware: Add irq_create_mapping()
Pratyush Anand [Wed, 9 Oct 2013 12:32:12 +0000 (21:32 +0900)]
PCI: designware: Add irq_create_mapping()

Without irq_create_mapping(), the correct IRQ number cannot be
provided.  In this case, it makes problems such as NULL dereference.
Thus, irq_create_mapping() should be added for MSI.

Suggested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
10 years agoPCI: designware: Make dw_pcie_rd_own_conf(), etc., static
Bjorn Helgaas [Wed, 9 Oct 2013 15:12:37 +0000 (09:12 -0600)]
PCI: designware: Make dw_pcie_rd_own_conf(), etc., static

The following variables and functions are used only in pcie-designware.c,
so make them static:

  global_io_offset
  dw_pcie_rd_own_conf()
  dw_pcie_wr_own_conf()
  dw_pcie_setup()
  dw_pcie_scan_bus()
  dw_pcie_map_irq()

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
10 years agoPCI: designware: Add header guards
Seungwon Jeon [Wed, 9 Oct 2013 15:12:21 +0000 (09:12 -0600)]
PCI: designware: Add header guards

Add header guards to prevent redundant inclusion.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
10 years agoPCI: exynos: Add missing clk_disable_unprepare() on error path
Wei Yongjun [Sun, 29 Sep 2013 02:29:11 +0000 (10:29 +0800)]
PCI: exynos: Add missing clk_disable_unprepare() on error path

Add the missing clk_disable_unprepare() before return
from exynos_pcie_probe() in the error handling case.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
10 years agoPCI: exynos: Turn off power of phy block when link failed
Jingoo Han [Fri, 6 Sep 2013 08:21:45 +0000 (17:21 +0900)]
PCI: exynos: Turn off power of phy block when link failed

When link failed, there is no need to turn on phy block. Also,
turning on phy block is added, in order to turn on phy block
regardless of the default value of phy registers.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
10 years agoPCI: exynos: Add support for MSI
Jingoo Han [Fri, 6 Sep 2013 06:54:59 +0000 (15:54 +0900)]
PCI: exynos: Add support for MSI

This patch adds support for Message Signaled Interrupt in the
Exynos PCIe driver using Synopsys designware PCIe core IP.

Signed-off-by: Siva Reddy Kallam <siva.kallam@samsung.com>
Signed-off-by: Srikanth T Shivanand <ts.srikanth@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
10 years agoENGR00288405: pcie: switch to upstreamed pcie driver
Richard Zhu [Mon, 11 Nov 2013 07:33:02 +0000 (15:33 +0800)]
ENGR00288405: pcie: switch to upstreamed pcie driver

Based on community patch-set, re-setup pcie driver on
imx6 platforms.
* re-fine the pcie clks.
* add the pcie support in dts files.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoPCI: imx6: Probe the PCIe in fs_initcall()
Marek Vasut [Tue, 15 Oct 2013 16:06:38 +0000 (18:06 +0200)]
PCI: imx6: Probe the PCIe in fs_initcall()

Probe the PCIe driver in fs_initcall() instead of module_init()
to assure that pci_assign_unassigned_resources() will be called
early.  This function is called in dw_pcie_host_init(), which is
in turn called from imx6_add_pcie_port(), which is called from
imx6_pcie_probe().  If this is not called early, we will hit
resource collisions since pcieport driver is then probed way too
late.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Frank Li <lznuaa@gmail.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Yinghai Lu <yinghai@kernel.org>(cherry picked from commit f216f57ffe6eede3c8a763add65d331e688f8c56)
10 years agoPCI: imx6: Remove redundant of_match_ptr
Sachin Kamat [Mon, 21 Oct 2013 09:06:41 +0000 (14:36 +0530)]
PCI: imx6: Remove redundant of_match_ptr

imx6_pcie_of_match is always compiled in because PCI_IMX6 depends on
SOC_IMX6Q, which only supports OF build.  Hence of_match_ptr is not
required.

[bhelgaas: add changelog details from Shawn]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sean Cross <xobs@kosagi.com>(cherry picked from commit 8bcadbe17207aee0df4a1f5cb41371d71bf3e4b0)
10 years agoPCI: imx6: Increase link startup timeout
Marek Vasut [Wed, 23 Oct 2013 05:12:18 +0000 (22:12 -0700)]
PCI: imx6: Increase link startup timeout

A longer link startup timeout is required when certain PCI switches are
attached to the root complex.  This was tested with a Pericom switch
and a PLX switch.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>(cherry picked from commit 017f10e1c78e14d48be7a28f2c33a32dae15fee5)
10 years agoPCI: imx6: Fix imprecise abort handler
Tim Harvey [Fri, 18 Oct 2013 00:27:22 +0000 (17:27 -0700)]
PCI: imx6: Fix imprecise abort handler

An imprecise abort is triggered when a port behind a switch is accessed
and no device is present.  At enumeration, imprecise aborts are not enabled
thus this ends up getting deferred until the kernel has completed init.  At
that point we must not adjust PC - the handler must do nothing, but a
handler must exist.

This fixes random crashes that occur right after freeing init.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>(cherry picked from commit 4ec3ed7f5e91e9325c810dcb995ef5a55e4a79a6)
10 years agoPCI: imx6: Remove redundant dev_err() in imx6_pcie_probe()
Wei Yongjun [Sat, 12 Oct 2013 06:11:02 +0000 (14:11 +0800)]
PCI: imx6: Remove redundant dev_err() in imx6_pcie_probe()

There is an error message within devm_ioremap_resource()
already, so remove the dev_err() call to avoid redundant
error message.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>(cherry picked from commit 9b5cd0948b67e1750498b5ff85267e87d3b4c5b3)
10 years agoPCI: imx6: Add support for i.MX6 PCIe controller
Sean Cross [Thu, 26 Sep 2013 03:24:47 +0000 (11:24 +0800)]
PCI: imx6: Add support for i.MX6 PCIe controller

Add support for the PCIe port present on the i.MX6 family of controllers.
These use the Synopsis Designware core tied to their own PHY.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
(cherry picked from commit bb38919ec56e0758c3ae56dfc091dcde1391353e)

10 years agoARM: imx6q: Add PCIe bits to GPR syscon definition
Sean Cross [Thu, 26 Sep 2013 03:24:46 +0000 (11:24 +0800)]
ARM: imx6q: Add PCIe bits to GPR syscon definition

PCIe requires additional bits be defined for GPR8 and GPR12.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit 8d6a35fb13406f87d926fffeee0d70360ce3077d)

10 years agoARM: dts: imx6qdl: add pcie device node
Sean Cross [Thu, 26 Sep 2013 02:51:09 +0000 (10:51 +0800)]
ARM: dts: imx6qdl: add pcie device node

Add pcie device node for imx6qdl.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
(cherry picked from commit 3a57291fa4ca7f7647d826f5b47082ef306d839f)

10 years agoENGR00288568 Revert "ENGR00275213-1 arm: pcie: enable pcie on imx6 platforms"
Richard Zhu [Thu, 7 Nov 2013 08:44:23 +0000 (16:44 +0800)]
ENGR00288568 Revert "ENGR00275213-1 arm: pcie: enable pcie on imx6 platforms"

switch to community upstreamed pcie driver.
Revert "ENGR00275213-1 arm: pcie: enable pcie on imx6 platforms"
This reverts commit d33370c77e57aed5a9b6733c9898418541fed54a.

Conflicts:

Documentation/devicetree/bindings/clock/imx6q-clock.txt
arch/arm/mach-imx/clk-imx6q.c

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288567 Revert "ENGR00275213-2 ARM: imx6q: update the pcie bits definitions...
Richard Zhu [Thu, 7 Nov 2013 08:39:38 +0000 (16:39 +0800)]
ENGR00288567 Revert "ENGR00275213-2 ARM: imx6q: update the pcie bits definitions of gpr"

switch to community upstreamed pcie driver.
Revert "ENGR00275213-2 ARM: imx6q: update the pcie bits definitions of gpr"
This reverts commit 0ddad708c7484a8b5d2016d31fda2bd8b9b8f275.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288566 Revert "ENGR00275213-3 arm: dts: enable pcie on imx6 platforms"
Richard Zhu [Thu, 7 Nov 2013 08:38:10 +0000 (16:38 +0800)]
ENGR00288566 Revert "ENGR00275213-3 arm: dts: enable pcie on imx6 platforms"

switch to community upstreamed pcie driver.
Revert "ENGR00275213-3 arm: dts: enable pcie on imx6 platforms"
This reverts commit 085fa6af23253017220d29e156dd19060af3d9c1.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288565 Revert "ENGR00275213-4 pcie_imx: enable pcie on imx6 platforms"
Richard Zhu [Thu, 7 Nov 2013 08:34:54 +0000 (16:34 +0800)]
ENGR00288565 Revert "ENGR00275213-4 pcie_imx: enable pcie on imx6 platforms"

switch to community upstreamed pcie driver.
Revert "ENGR00275213-4 pcie_imx: enable pcie on imx6 platforms"
This reverts commit dce7d25b770086a978d4dd9838c46f5ff52ee135.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288564 Revert "ENGR00277241 imx: pcie: Re-correct the pcie dts"
Richard Zhu [Thu, 7 Nov 2013 08:34:31 +0000 (16:34 +0800)]
ENGR00288564 Revert "ENGR00277241 imx: pcie: Re-correct the pcie dts"

switch to community upstreamed pcie driver.
Revert "ENGR00277241 imx: pcie: Re-correct the pcie dts"
This reverts commit 611f8d430690643f828ba94f8cab52e45bbfcca9.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288563 Revert "ENGR00277654 imx: pcie: enable pcie lm errata when pcie is enabled"
Richard Zhu [Thu, 7 Nov 2013 08:34:15 +0000 (16:34 +0800)]
ENGR00288563 Revert "ENGR00277654 imx: pcie: enable pcie lm errata when pcie is enabled"

switch to community upstreamed pcie driver.
Revert "ENGR00277654 imx: pcie: enable pcie lm errata when pcie is enabled"
This reverts commit 72524b16f5cb4e13c1a194dda4cc0c4f206e4e46.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00288562 Revert "ENGR00278492 imx: pcie: delay is required after REF_CLK_EN is...
Richard Zhu [Thu, 7 Nov 2013 08:33:17 +0000 (16:33 +0800)]
ENGR00288562 Revert "ENGR00278492 imx: pcie: delay is required after REF_CLK_EN is set"

switch to community upstreamed pcie driver.
Revert "ENGR00278492 imx: pcie: delay is required after REF_CLK_EN is set"
This reverts commit 1976e889408175354a19824375bc5137f43ef14e.

Signed-off-by: Richard Zhu <r65037@freescale.com>
10 years agoENGR00270037 mxc: mlb: Fix MLB crash when testing abnormally
Luwei Zhou [Tue, 19 Nov 2013 09:32:35 +0000 (17:32 +0800)]
ENGR00270037 mxc: mlb: Fix MLB crash when testing abnormally

If quit the test program via CTRL+c during the test and leaving
the MITB still running, kernel crash sometimes happen when launching
the test program for a second time. This patch fix this issue. The
main modification is:

* Initialize the wait queue head dynamically not statically
* Enable/Disalbe IRQ when necessary

Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 80004000
[00000000] *pgd=00000000
Internal error: Oops: 80000007 [#1] SMP ARM
Modules linked in: mxc_mlb150
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.17-16879-g5d48ab5 #227
task: 80c2d908 ti: 80c22000 task.ti: 80c22000
PC is at 0x0
LR is at __wake_up_common+0x54/0x94
pc : [<00000000>]    lr : [<8004b9fc>]    psr: 90000193
sp : 80c23e18  ip : dc86ff1c  fp : 80c23e44
r10: 00000000  r9 : 00000001  r8 : 00000000
r7 : 00000000  r6 : 7f002fe0  r5 : 7f0017fc  r4 : dcaff0f4
r3 : 00000000  r2 : 00000000  r1 : 00000001  r0 : dc86ff1c
Flags: NzcV  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7d  Table: 6c90004a  DAC: 00000015
Process swapper/0 (pid: 0, stack limit = 0x80c22238)
Stack: (0x80c23e18 to 0x80c24000)
3e00:                                                       00000000 00000001
3e20: dc1d14c0 7f002fdc 20000193 00000001 00000001 00000000 00000000 80c7018e
3e40: 80c23e6c 8004bbf4 00000000 8004bbf4 00000004 0091a840 7f002f80 7f002e1c
3e60: 00000004 fffffff9 00000001 7f001054 ffffae63 00000009 0000005a 00000000
3e80: ffffffff 00000010 00000095 00000000 00000000 00000095 dc011180 7f001168
3ea0: dc482e40 80073c08 00000015 80c2a770 80c1e7e0 dc011180 00000095 00000000
3ec0: f4000100 00000000 00000000 80c22000 80c2a4d8 80073d70 00000000 dc011180
3ee0: 00000095 80076ae8 00000095 800733d0 80c1ee3c 8000e848 f400010c 80c2a8b8
3f00: 80c23f20 80008570 8005a15c 804299d0 60000013 ffffffff 80c23f54 8000dbc0
3f20: 80c23f68 0000005a 3437dc5e 00000015 34373d83 00000015 81aef080 80c30050
3f40: 00000000 00000000 80c22000 80c2a4d8 00000017 80c23f68 8005a15c 804299d0
3f60: 60000013 ffffffff 3437dc5e 00000015 80cc41a4 806152ac 81aef080 80cc41a4
3f80: 00000000 80c30050 00000000 80429b10 00000001 80c7017a 80c2a524 806152ac
3fa0: 80c22000 80c7017a 80c22000 8000eb7c 00067162 800599f0 000000d9 80c12ef0
3fc0: 00000000 80bd6a9c ffffffff ffffffff 80bd6548 00000000 00000000 80c12ef0
3fe0: 10c53c7d 80c2a4a0 80c12eec 80c2e6ec 1000406a 10008074 00000000 00000000
[<8004b9fc>] (__wake_up_common+0x54/0x94) from [<8004bbf4>] (__wake_up+0x3c/0x50)
[<8004bbf4>] (__wake_up+0x3c/0x50) from [<7f001054>] (mlb_tx_isr+0xa0/0xf4 [mxc_mlb150])
[<7f001054>] (mlb_tx_isr+0xa0/0xf4 [mxc_mlb150]) from [<7f001168>] (mlb_ahb_isr+0xc0/0x134 [mxc_mlb150])
[<7f001168>] (mlb_ahb_isr+0xc0/0x134 [mxc_mlb150]) from [<80073c08>] (handle_irq_event_percpu+0x54/0x17c)
[<80073c08>] (handle_irq_event_percpu+0x54/0x17c) from [<80073d70>] (handle_irq_event+0x40/0x60)
[<80073d70>] (handle_irq_event+0x40/0x60) from [<80076ae8>] (handle_fasteoi_irq+0x80/0x158)
[<80076ae8>] (handle_fasteoi_irq+0x80/0x158) from [<800733d0>] (generic_handle_irq+0x2c/0x3c)
[<800733d0>] (generic_handle_irq+0x2c/0x3c) from [<8000e848>] (handle_IRQ+0x40/0x90)
[<8000e848>] (handle_IRQ+0x40/0x90) from [<80008570>] (gic_handle_irq+0x2c/0x5c)
[<80008570>] (gic_handle_irq+0x2c/0x5c) from [<8000dbc0>] (__irq_svc+0x40/0x50

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00288421-4 mxc: asrc: keep map/unmap parameters symmetic
Nicolin Chen [Tue, 19 Nov 2013 06:57:00 +0000 (14:57 +0800)]
ENGR00288421-4 mxc: asrc: keep map/unmap parameters symmetic

We are using DEV_TO_MEM for dma_map but MEM_TO_DEV for dma_unmap, thus fix it.
It also adds missing device pointer since assigning it to dma_free_coherent().

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00288421-3 ASoC: fsl_ssi: Move i2s_mode from static to ssi_private
Nicolin Chen [Mon, 18 Nov 2013 09:54:01 +0000 (17:54 +0800)]
ENGR00288421-3 ASoC: fsl_ssi: Move i2s_mode from static to ssi_private

It's no good to use static variable because there might be several
drivers calling the function and the value would be overwritten by
all of them. Thus we move it into ssi_private.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00288421-2 ASoC: fsl_spdif: Ignore system clock due to potential risk
Nicolin Chen [Mon, 18 Nov 2013 09:35:19 +0000 (17:35 +0800)]
ENGR00288421-2 ASoC: fsl_spdif: Ignore system clock due to potential risk

The current clock selecting mechanism would choose a clock and set its rate
later when using it. It might be feasible for other clock sources but not
for sysclk -- ipg clock. Changing ipg clock rate in specific driver would
be a dangerous operation, so we here ingore the sysclk and will restore it
after we accomplish a better mechanism.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoENGR00288421-1 ASoC: fsl_spdif: Use correct clock for Rx clock rate calculation
Nicolin Chen [Mon, 18 Nov 2013 09:17:10 +0000 (17:17 +0800)]
ENGR00288421-1 ASoC: fsl_spdif: Use correct clock for Rx clock rate calculation

According to the Reference Manual, we should use system clock to calculate
rx clock rate instead of spdif own clock. Thus add system clock to spdif
driver and replace the incorrect one in rate calculation.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agomtd: gpmi: use devm_request_irq
Huang Shijie [Thu, 14 Nov 2013 06:25:49 +0000 (14:25 +0800)]
mtd: gpmi: use devm_request_irq

Use devm_request_irq to simplify the code.
Also remove the unused fields of structure resources{}.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: use devm_ioremap_resource
Huang Shijie [Thu, 14 Nov 2013 06:25:48 +0000 (14:25 +0800)]
mtd: gpmi: use devm_ioremap_resource

Use the devm_ioremap_resource to simplify the code.

[Note: as a side effect, this adds a missing call to request_memory().]

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: rename the functions from gpmi_nfc_* to gpmi_nand_*
Huang Shijie [Thu, 14 Nov 2013 06:25:47 +0000 (14:25 +0800)]
mtd: gpmi: rename the functions from gpmi_nfc_* to gpmi_nand_*

The gpmi_nfc_* is the legacy name. In order to avoid the confusion,
The patch renames the gpmi_nfc_* functions to gpmi_nand_*.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: remove the unused line
Huang Shijie [Thu, 14 Nov 2013 06:25:46 +0000 (14:25 +0800)]
mtd: gpmi: remove the unused line

We do not use the chip->oob_poi in the mx23_write_transcription_stamp.
So remove the unused line.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: delete the gpmi_pre_bbt_scan
Huang Shijie [Thu, 14 Nov 2013 06:25:45 +0000 (14:25 +0800)]
mtd: gpmi: delete the gpmi_pre_bbt_scan

We do not scan the BBT after we call the gpmi_pre_bbt_scan,
so it has lost the meaning of existence.

This patch merges this function into gpmi_init_last, and delete it.
This patch does not change any logic.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
10 years agomtd: gpmi: do not use the local array to do the DMA transfer
Huang Shijie [Thu, 14 Nov 2013 06:25:44 +0000 (14:25 +0800)]
mtd: gpmi: do not use the local array to do the DMA transfer

The local array feature[] is in the stack. We can see the warning
when we enable the CONFIG_DMA_API_DEBUG:
----------------------------------------------------------
WARNING: at lib/dma-debug.c:950 check_for_stack+0xac/0xf8()
gpmi-nand 112000.gpmi-nand: DMA-API: device driver maps memory fromstack [addr=dc05be34]
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.17-16851-g2414a73 #1324
[<80014cbc>] (unwind_backtrace+0x0/0x138) from [<8001251c>] (show_stack+0x10/0x14)
[<8001251c>] (show_stack+0x10/0x14) from [<8002699c>] (warn_slowpath_common+0x4c/0x68)
[<8002699c>] (warn_slowpath_common+0x4c/0x68) from [<80026a4c>] (warn_slowpath_fmt+0x30/0x40)
[<80026a4c>] (warn_slowpath_fmt+0x30/0x40) from [<8028e2f8>] (check_for_stack+0xac/0xf8)
[<8028e2f8>] (check_for_stack+0xac/0xf8) from [<8028e438>] (debug_dma_map_sg+0xf4/0x188)
[<8028e438>] (debug_dma_map_sg+0xf4/0x188) from [<803968d0>] (prepare_data_dma+0xb8/0x1a8)
[<803968d0>] (prepare_data_dma+0xb8/0x1a8) from [<80397b20>] (gpmi_send_data+0x84/0xfc)
[<80397b20>] (gpmi_send_data+0x84/0xfc) from [<8038c2b4>] (nand_onfi_set_features+0x50/0x74)
[<8038c2b4>] (nand_onfi_set_features+0x50/0x74) from [<80397198>] (gpmi_extra_init+0x90/0x170)
[<80397198>] (gpmi_extra_init+0x90/0x170) from [<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c)
[<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c) from [<8031b974>] (platform_drv_probe+0x18/0x1c)
----------------------------------------------------------

The patch uses the kzalloc to allocate the buffer, and free it when
we do not use it anymore.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>