Nicolin Chen [Mon, 11 Mar 2013 09:09:14 +0000 (17:09 +0800)]
ENGR00234501 ASoC: spdif: fix Ubuntu reboot hang issue
spdif driver registered kcontrol for ALSA subsystem controlling, while some
of those kcontrol functions lack of clk_enable() before register-accessing. So
system would definitely hang when those functions're called, which did happen
during reboot test on Ubuntu due to its pulse-audio.
This patch added paired clk_en/disable() to those functions so as to pevent
system hang issue.
If DAC volume's set to a value that's lower than 0xd8, contineously FLL
setting of wm8962 in machine driver would cause playback distortion issue,
which happens to ENGR219882. so we have to put some another code in machine
driver to prevent distortion issue.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
We put some code to set default volumes in codec driver, but later we found
that one of volume was higher than 0db, which would cause over-gained volume.
So this patch removed DAC default volume setting, and reverted the volume
interface of it to let user control the register from user space.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Will Deacon [Fri, 11 May 2012 16:42:37 +0000 (17:42 +0100)]
ARM: 7417/1: vfp: ensure preemption is disabled when enabling VFP access
The vfp_enable function enables access to the VFP co-processor register
space (cp10 and cp11) on the current CPU and must be called with
preemption disabled. Unfortunately, the vfp_init late initcall does not
disable preemption and can lead to an oops during boot if thread
migration occurs at the wrong time and we end up attempting to access
the FPSID on a CPU with VFP access disabled.
This patch fixes the initcall to call vfp_enable from a non-preemptible
context on each CPU and adds a BUG_ON(preemptible) to ensure that any
similar problems are easily spotted in the future.
Cc: stable@vger.kernel.org Reported-by: Hyungwoo Yang <hwoo.yang@gmail.com> Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[Fix merge conflict] Signed-off-by: Jason Liu <r64343@freescale.com>
Peter Chen [Tue, 5 Mar 2013 03:21:04 +0000 (11:21 +0800)]
ENGR00251209-9 msl: usb: make global variable as drvdata
There is a bug when we try to remove wakeup module twice as
g_ctrl is a globle variable, in fact, it is per controller
wakeup driver, so the private data should be per device.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Mon, 4 Mar 2013 09:35:02 +0000 (17:35 +0800)]
ENGR00251209-6 msl-mx6: usb: keep the phy lower flag as true defaultly
Keep the phy lower flag as true defaultly, the driver should mark
it as false when the driver begins to use PHY.
This fixes one bug that when build both host and gadget as loadable
modules, the phy lower flag is false if the related module is not
loaded, then, the wakeup interrupt will not be treated as happened
if host module is loaded, but gadget is not loaded, or vice verse.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Mon, 4 Mar 2013 09:30:08 +0000 (17:30 +0800)]
ENGR00251209-5 usb: fix the system hang when unload gadget module
- For gadget, the clock will be closed at platform code, so
the driver should not be close clock beforehand.
- For host, the PHY should not be low power mode when the host
controller has still possibilities to use. Besides, the 5v should
be off at last as some platform uses 5v for PHY's power.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Mon, 4 Mar 2013 09:19:20 +0000 (17:19 +0800)]
ENGR00251209-4 msl-mx6: usb: Fix system hang when unload gadget module
At gadget module remove function, it closes the clock, but
at platform code, it still visits register. In fact,
The PHY has already been low power mode when driver's remove
before platform code is called.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Mon, 4 Mar 2013 06:22:52 +0000 (14:22 +0800)]
ENGR00251209-3 usb: fix below build warning
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
In function 'mx6_usb_dr_init':
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
615: warning: unused variable 'imx6q_mxc_ehci_otg_data'
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
At top level:
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
77: warning: 'fsl_platform_otg_set_usb_phy_dis' defined but not used
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Fri, 1 Mar 2013 08:37:42 +0000 (16:37 +0800)]
ENGR00251209-2 usb: otg: fix the dp/dm will be floating when phy is no 3v3
For the design which the phy is no power (no 5v for VBUS), the
PHY can't get dp/dm correctly, so it the port change interrpt
is enabled or the host enters low power mode, the unexpected
interrupt will occur.
This commit will make the dp/dm as zero at otg configuration.
For gadget-only, the same function is existed at probe.
For host-only, the vbus will be on before port change interrupt
is enabled.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Loren Huang [Tue, 5 Mar 2013 07:44:28 +0000 (15:44 +0800)]
ENGR00252727-2 [GPU]Power on VG core if there is only VG core in SoC
-Power on VG core to makesure VG can be initalized if there is only
VG core in SoC.
-Power off VG core after initalization is done.
-Adjust VG power and clock state to match above changing.
Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:
Item#1: If add performance stress test while runing IEEE1588, the link
down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
no such issue found.
The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.
Dong Aisheng [Wed, 27 Feb 2013 08:50:30 +0000 (16:50 +0800)]
ENGR00252418 imx6: add fuse check for available devices
Since device availability may be different on the same SoC,
so we add fuse check for the supported device before we really
adding the device to the kernel.
This may avoid kernel crash once the CPU at the slot are changed to
a different one which with different device available but the kernel is
the same one.
Reviewed-by: Jason Liu <r64343@freescale.com> Acked-by: Jason Liu <r64343@freescale.com> Signed-off-by: Dong Aisheng <b29396@freescale.com>
the reason is that the local timer will stop when enter C3 state,
we need switch the local timer to bc timer when enter the state
and switch back when exit from the that state.The code is like this:
when the broadcast timer interrupt arrives(this interrupt just wakeup
the ARM, and ARM has no chance to handle it since local irq is disabled.
In fact it's disabled in cpu_idle() of arch/arm/kernel/process.c)
the broadcast timer interrupt will wake up the CPU and run:
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu); ->
tick_broadcast_oneshot_control(...);
->
tick_program_event(dev->next_event, 1);
->
tick_dev_program_event(dev, expires, force);
->
for (i = 0;;) {
int ret = clockevents_program_event(dev, expires, now);
if (!ret || !force)
return ret;
dev->retries++;
....
now = ktime_get();
expires = ktime_add_ns(now, dev->min_delta_ns);
}
clockevents_program_event(dev, expires, now);
delta = ktime_to_ns(ktime_sub(expires, now));
if (delta <= 0)
return -ETIME;
when the bc timer interrupt arrives, which means the last local timer
expires too. so, clockevents_program_event will return -ETIME, which will
cause the dev->retries++ when retry to program the expired timer.
Even under the worst case, after the re-program the expired timer,
then CPU enter idle quickly before the re-progam timer expired,
it will make system ping-pang forever if no interrupt happen.
We have found the ping-pang issue during the video play-back test.
system will freeze and video not playing for sometime until other interrupt
occured to break the error condition.
The detailed information, please refer to the LKML:https://lkml.org/lkml/2013/2/20/216
which posted by Jason Liu.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jason Liu <r64343@freescale.com> Tested-by: Jason Liu <r64343@freescale.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Wayne Zou [Mon, 25 Feb 2013 08:35:09 +0000 (16:35 +0800)]
ENGR00251830 LDB: Fix the bug of LDB separate mode for dual LVDS display
Fix the bug of LDB separate mode for dual LVDS display on i.mx6.
For 'ldb=sep0' option on kernel command line, it means that LVDS0 is
the primary display. While 'ldb=sep1' means that LVDS1 is the primary display.
For LDB separate mode, the Display Interface(disp_id) should be
configured differently on the platform layer. That is, IPU DI0 to LVDS1 or
IPU DI1 to LVDS0 configuration should be avoided.
Robin Gong [Tue, 26 Feb 2013 08:10:54 +0000 (16:10 +0800)]
ENGR00251849-2 ldo_bypass:print the ldo_bypass mode directly, not obscure number
You can see "cpu regulator mode:ldo_bypass" log directly from console when boot.
not "cpu regulator init ldo=1" before. Signed-off-by: Robin Gong <b38343@freescale.com>
Robin Gong [Mon, 25 Feb 2013 02:56:21 +0000 (10:56 +0800)]
ENGR00251630 MX6DQ: do not power off ARM in suspend on TO1.1
System will resume back failed which caused by IPG clock glich issue. The issue
(TKT094231) has been fixed on MX6DQ TO1.2 and MX6DL TO1.1.It is hard to
reproduced on MX6DQ TO1.1/1.0 with 0xffffffff in GPC_PGC_CPU_PUPSCR
which implemented on GA release. But it is easy to reproduced with 0xf0f0 on
mainline now. As we focus on latest formal chip, the problem is cleaned up until
now. We will aign with the workaround on MX6DL which do not power off ARM in
suspend.
Richard Zhu [Fri, 1 Feb 2013 04:31:21 +0000 (12:31 +0800)]
ENGR00243106 imx: pcie: enable pcie msi on imx6 platforms
deprieved from boundary msi support patch
add the following modifications
* use the RC's line address 0x01FF8000 instead of one
actual physical memory as the msi start address.
The physical memory address is not mandatory required by the
msi start address.
* set PCI_MSI_FLAGS_ENABLE in RC's msi capability
structure when the msi int is enabled.
* the data of msg is only 16bit, set the upper 8bit
cputype, and the msi int num to the lower 8bit.
make shi [Thu, 23 Aug 2012 09:07:13 +0000 (17:07 +0800)]
ENGR00220096 USB core: remove Logitech Quickcam E3500 form usb_quirk_list
Since Logitech Quickcam E3500 is defaultly listed in usb_quirk_list on current
linux kernel. So the USB camera only supports reset resume, but doesn't support
normal usb suspend/resume. Actually, the USB camera works abnormally after USB
reset resume, but it works well after doing normal suspend/resume.
Peter Chen [Fri, 1 Feb 2013 03:05:30 +0000 (11:05 +0800)]
ENGR00242788: usb: host: disable stream mode due to IC problem
There is a bug at chipidea core, please see below synopsis problem title
and its number.
STAR 9000378958
Title: Non-Double Word Aligned Buffer Address Sometimes
Causes Host to Hang on OUT Retry
This problem will be showed when we use Ethernet device at host port, there
is an errata ERR006308 for it.
The workaround for this issue is to disable stream mode at register usbmode.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Since we've already reduced 2 cycles before writing PWMPR
register, the real period cycle on PWMO is the value of
period_cycles (before reducing 2). So, the following commit
message of ENGR00170342, which changes the duty cycle
calculation wrongly, is not reasonable:
===================================================
The chip document says the counter counts up to period_cycles + 1
and then is reset to 0, so the actual period of the PWM wave is
period_cycles + 2
===================================================
Revert "ENGR00170342 PWM: fix pwm output can't be set to 100% full duty"
Rong Dian [Fri, 25 Jan 2013 05:45:01 +0000 (13:45 +0800)]
ENGR00241739-1 thermal: providing the thermal hot notification
Create thermal hot's own hot notificaiton callback register and unregister
function.
Provide the thermal notification broadcast enable and disable through /sys fs.
make shi [Wed, 23 Jan 2013 02:36:00 +0000 (10:36 +0800)]
ENGR00241582 MX6 USB host: USB host certification patch
The patch include:
- USB test mode on hub port and Root-hub port
- support 3 types of message:
too much hub ties for hub attachment
too much power consumption for device attachment
unsupported device class warning
- support menuconfig select the FSL_USB_TEST_MODE, located in:
-> Device Drivers
-> USB support (USB_SUPPORT [=y])
-> FSL High-speed Electrical Test Mode support
Anson Huang [Wed, 23 Jan 2013 07:11:34 +0000 (15:11 +0800)]
ENGR00241003-2 pfuze: using _sel interface to add delay support
use regulator _sel interface set to support auto delay,
as when regulator's voltage go up, it will take some time
to ramp up to the required voltage, so the delay is necessary.
_sel interface set support such function, now we switch to this
interface set.
Anson Huang [Mon, 21 Jan 2013 08:20:56 +0000 (16:20 +0800)]
ENGR00241003-1 mx6: need to add delay in LDO voltage setting
1.LDO ramp up time may be modified by ROM code
according to fuse setting, cpu freq driver use
fixed delay time which assume the LDO ramp up time
is the reset value of ANATOP register, need to set
it to reset value in regulator init.
2.The regulator set voltage should take care of
the ramp up time, calculate the ramp up time based
of register setting and to the delay, make sure that
when the set voltage function return, the voltage is
stable enough.
3.CPUFreq no need to use delay, it is already taken
care by regulator voltage setting.
Loren HUANG [Fri, 9 Nov 2012 04:51:41 +0000 (12:51 +0800)]
ENGR00240988-5 Update gpu code to support 3.5 kernel
Cherry-pick from imx_3.5.7 branch.
-Comment regulator setting code temperarily for 3.5 kernel.
-Adjust clock setting code based on new clock framework.
-Disable dynamic frequency change feature as it depends on thermal
driver.
-Use DTS to get reserved memory information.
-Comment cpu check code for 3.5 kernel.
-Comment GPU reset code for 3.5 kernel.
Wayne Zou [Mon, 21 Jan 2013 05:44:54 +0000 (13:44 +0800)]
ENGR00240972-3 V4L2: VDI double frame rate for interlace stream
Each VPU decoded frame is de-interlaced twice inside v4l2 output driver,
and show twice also to achieve IPU/VDI double frame rate output.
This feature is disable by default.
This patch sets HDMI PHY register values in MXC HDMI driver
platform data so that MXC HDMI driver can configure the
0x09 CKSYMTXCTRL register(Clock Symbol and Transmitter
Control Register) and 0x0E VLEVCTRL register(Voltage Level
Control Register), then we may pass HDMI compliance test
for MX6 HDMI dongle board.
Enabling IPU hsp clock in mxcfb_probe() context by calling
ipu_init_channel() can avoid the IPU display channel(setup
in bootloader) from being damaged by some IPU common driver
APIS which enable/disable IPU hsp clock when doing driver
probe. However, somehow, after LDO bypass patch set is pushed
to kernel, this clock enablement can trigger IPU errors
(IPU_INT_STAT_5 - 0x00800000/IPU_INT_STAT_10 - 0x00100000) and
a display flash. A workaround is to enable IPU hsp clock when
we are at ipu_probe() context, which is earlier than mxcfb_probe()
context, and then to disable(cleanup) the clock once more when
fb_set_par() is triggered by the user for the first time. This
patch updates the comment for ipu_init_channel() and
ipu_enable_channel() in mxcfb_probe() context, and disables ipu
hsp clock when fb_set_par() is triggered by the user for the first
time.
Liu Ying [Fri, 18 Jan 2013 08:20:22 +0000 (16:20 +0800)]
ENGR00240740-1 IPUv3:Workaround bootup ipu error
Enabling IPU hsp clock in mxcfb_probe() context by calling
ipu_init_channel() can avoid the IPU display channel(setup
in bootloader) from being damaged by some IPU common driver
APIS which enable/disable IPU hsp clock when doing driver
probe. However, somehow, after LDO bypass patch set is pushed
to kernel, this clock enablement can trigger IPU errors
(IPU_INT_STAT_5 - 0x00800000/IPU_INT_STAT_10 - 0x00100000) and
a display flash. A workaround is to enable IPU hsp clock when
we are at ipu_probe() context, which is earlier than mxcfb_probe()
context, and then to disable(cleanup) the clock once more when
fb_set_par() is triggered by the user for the first time. This
patch exports an interface to disable ipu hsp clock so that
fb_set_par() may call it, and enables ipu hsp clock in ipu_probe()
context.
Sandor Yu [Fri, 11 Jan 2013 07:28:51 +0000 (15:28 +0800)]
ENGR00239734 Mx6 HDMI PHY: Add 2 variable to pass board specific config
The PHY register 0x9 and 0xe should setting
to different value in different board to pass HCT.
Add variable phy_reg_vlev and phy_reg_cksymtx to pass
phy config data.
Huang Shijie [Thu, 17 Jan 2013 08:15:45 +0000 (16:15 +0800)]
ENGR00240571 mtd: gpmi: fix the compiler warning
The current code may print out the following warning:
....................................................................
drivers/mtd/nand/gpmi-nand/gpmi-lib.c: In function gpmi_begin:
drivers/mtd/nand/gpmi-nand/gpmi-lib.c:1163: warning: hw.use_half_periods
may be used uninitialized in this function
drivers/mtd/nand/gpmi-nand/gpmi-lib.c:1163: warning: hw.sample_delay_factor
may be used uninitialized in this function
....................................................................
When disabling IPU channels, it needs less than 200us to wait for stop
Using msleep, it often sleep longer(above 10ms). So the extra delay
decrease the performance.
For 720p video playback on 1080p display(60Hz), the performance is about 40fps
With this patch, it can achieve around 60fps.
Richard Zhu [Mon, 7 Jan 2013 05:26:03 +0000 (13:26 +0800)]
ENGR00239905 PCIe Enable PCIe switch support
PCIe switch access mechanism:
- CfgRd0/CfgWr0 is used to access the CFG space of the EP device
or the upstream port of PCIe switch that is connected to RC directly.
- CfgRd1/CfgWr1 is used to access the CFG space of the downstream port
of PCIe switch and so on cases.
UR and kernel crash problem:
i.MX6 PCIe maps UR(Unsupported Request)err to AXI SLVERR err, which would
cause the arm data abort exception.
There is one "Received Master Abort" in iMX6 Root complex Secondary
status register when a requester receives a Completion
with Unsupported Request Completion Status.
In this case, the Linux kernel would be crashed.
Workaround: correct this imprecise external abort.
make shi [Thu, 10 Jan 2013 05:16:24 +0000 (13:16 +0800)]
ENGR00232755 USB: disable clock and abnormal wakeup when remove gadget driver
- In current bsp, the usb clock mismatch when rmmod gadget class driver. The
clock should be turn off when gadget class driver unregister.
- There is an abnormal usb wakeup interrupt happen if phy is no power without
VBUS. If we unplug the usb cable after unregister usb gadget driver, it is
difficult to handle the unexpected usb wakeup interrupt. SO we must call
dr_discharge_line() to make sure no abnormal usb wakeup interrupt happen in
usb unregister gadget class driver.
Sheng Nan [Tue, 8 Jan 2013 09:32:25 +0000 (17:32 +0800)]
ENGR00237682-3: mxc_v4l2_capture: ov5640: support scaling modes
The method for change between scaling and subsampling mode is different
from ov5640_mipi.
(image bigger than 1280*960 is scaling mode, smaller is subsampling).
According to OV5640 Auto Focus Camera Module Application Notes
(with DVP Interface) R2.14.pdf,
change back from QSXGA to VGA, don't need to do exposure calculation.
According to the test result, if we do exposure calculation when change
back from scaling to subsampling mode, the image would be dark.
So the method is:
Change to scaling mode, go through exposure calcuation.
Change to or back to subsampling mode, change mode directly.
Supported mode:
- QSXGA@7.5fps
- 1080P@7.5fps
Can't make 1080P works at 15fps. Here is a reply from ov fae:
because of scaling down, max frame for 1080P is the same as 5M, both are 15fps.
so if 5M can runs up to 7.5fps on your demo, then 1080P is the same 7.5fps max.
Sheng Nan [Wed, 19 Dec 2012 10:39:46 +0000 (18:39 +0800)]
ENGR00237682-2: mxc_v4l2_capture: ov5640: support all subsampling modes
Supported the following modes, verified image quality and frame rate
- VGA 30/15fps
- QVGA 30/15fps
- NTSC 30/15fps
- PAL 30/15fps
- 720P 30/15fps
Note: use the same setting as app note of ov5640 dvp
- QCIF 30/15fps
- XGA 22.5/15fps
Note: cannot make XGA work on 30fps. Just a reference of ov5640 datasheet:
1280*960 YUV422 maximum at 22.5fps.
1280*720 YUV422 maximum at 30fps.
Need to confirm later.
Sheng Nan [Wed, 19 Dec 2012 07:58:58 +0000 (15:58 +0800)]
ENGR00237682-1: mxc_v4l2_capture: ov5640: use global initialization
The current code struct of parallel ov5640 set mode directly.
The newest settings need to go through global initialization.
New settings are provided by ov company
So this patch does:
- Make parallel ov5640 mode settings go through global initialization.
- Only VGA (640 * 480) are provided as a validation of the new setting.
- Other modes will be provided in the later patches.
* Fix adv7180 tvin powerdown function
gpio power pin already exported in io-mux setup function
no need to request/free gpio
* Update copyrigth year 2013.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Jason Liu [Tue, 8 Jan 2013 08:13:07 +0000 (16:13 +0800)]
fix echo 1 > compact_memory return error issue
when run the folloing command under shell, it will return error
sh/$ echo 1 > /proc/sys/vm/compact_memory
sh/$ sh: write error: Bad address
After strace, I found the following log:
...
write(1, "1\n", 2) = 3
write(1, "", 4294967295) = -1 EFAULT (Bad address)
write(2, "echo: write error: Bad address\n", 31echo: write error: Bad address
) = 31
This tells system return 3(COMPACT_COMPLETE) after write data to compact_memory.
The fix is to make the system just return 0 instead 3(COMPACT_COMPLETE) from
sysctl_compaction_handler after compaction_nodes finished.
Signed-off-by: Jason Liu <r64343@freescale.com> Suggested-by: David Rientjes <rientjes@google.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Rik van Riel <riel@redhat.com> Cc: Minchan Kim <minchan@kernel.org> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Peter Chan [Tue, 8 Jan 2013 08:04:41 +0000 (16:04 +0800)]
ENGR00232879 mx6sl: EPDC VDDH and VPOS power on/off sequence is wrong
VDDH should only be ON after VPOS when power up and should be off
before VPOS when power down. Set the appropriate MAX17135 timing
parameters for the correct power up/down sequence
Robby Cai [Wed, 26 Dec 2012 07:26:39 +0000 (15:26 +0800)]
ENGR00238237-1 mx6sl: csi/v4l: fix camera picture flickering issue
Flickering issue happens when there's no buffer to be processed(e.g., the
pace of QBUF is much slower than DQBUF). The cause is the hardware is using
double buffering, while the driver has no good protection at above case and
thus the CSI will fill the buffer not in the right order. The way to fix is
refining the output of the working_q buffer list, that is, if there's no buffer
to be processed then output to a dummy buffer.
Another important change is to only do DMA reflash operation when SOF is
detected in streamon. Remove this operation is CSI interrupt handler because
it violates to the SPEC (only do DMA reflash before DMA is enabled but NOT at
the time or after DMA's enabled).
Signed-off-by: LiGang <b41990@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit 0c4584763fa44b01a2f48198fa27c9206a116164)
Lionel Xu [Wed, 26 Dec 2012 05:54:49 +0000 (13:54 +0800)]
ENGR00238281 MX6SL_EVK: Add rfkill interface to bluetooth
MX6SL EVK board uses Silex SX-SDMAN board for bluetooth.
Add rfkill interface to control SX-SDMAN reset.
The reset signal is required before using bluetooth.
Gary Zhang [Fri, 4 Jan 2013 02:09:00 +0000 (10:09 +0800)]
ENGR00238809-2 mx6sl: ssi: add IRAM support
locate SSI playback buffer into IRAM in mx6sl.
because left IRAM room is not enough to contain record
buffer, if IRAM allocation for record fails, record
buffer will use external ram
Chen Liangjun [Fri, 28 Dec 2012 08:42:42 +0000 (16:42 +0800)]
ENGR00238439 ASRC: add delay before reading ASRC FIFO status
ASRC driver would read the sample number of ASRC output FIFO to fetch
the data from ASRC output FIFO. However, SDMA's fetching operation may
not finished before ASRC's reading. In this case, ASRC driver may read a
error data from the register.
In this patch, add delay before reading ASRC FIFO status to prevent
noise.
guoyin.chen [Fri, 7 Dec 2012 02:39:57 +0000 (10:39 +0800)]
ENGR00236141 csi:Add stride alignment setting from userspace
In android, IPU fills the I420 buffer. And GPU shows the buffer to display.
mx6's GPU has 32 Y-stride alignment for I420. The stride alignment will
be passed through by bytesperline. This update is only for
csi->smfc->mem channel.
Robin Gong [Wed, 19 Dec 2012 10:48:45 +0000 (18:48 +0800)]
ENGR00237742 busfreq:fix IPG_PERCLK will be decreased to 6M once exit low bus
on Sabresd board, IPG_PERCLK will be fixed on 6Mhz once system enter low bus,
and never restore to 22Mhz which be set in boot. It means some device clock
which sourcing from IPG_PERCLK such as I2C will be slow down. The root cause is
that there is workaround for GPT timer of Arik TO1.0 in mx6_ddr_freq.S. GPT
clock source from IPG_PERCLK on TO1.0 and should be fixed on 6Mhz. But for
TO1.1 and TO1.2 ,the workaround should be removed. Signed-off-by: Robin Gong <B38343@freescale.com>
Liu Ying [Wed, 19 Dec 2012 06:46:06 +0000 (14:46 +0800)]
ENGR00237678 IPUv3:Clean up sync and error interrupt
1) Split sync and error interrupt handler into 2 different
handlers, so that we may save several CPU cycles to
handler sync interrupt which is triggered in most IPU
usecases.
2) So far, every IPUv3 version in different SoCs has sync
and error interrupts, so we return -ENODEV if they cannot
be gotten from platform resource. Then, we may request
them directly but do not check more.
3) Clean up free irq code by removing unnecessary check.
Fugang Duan [Fri, 7 Dec 2012 10:48:34 +0000 (18:48 +0800)]
ENGR00236240 i2c: i2c performance optimization
It is unnecessary to calculate and update i2c divider during
every transaction. Only do it if current i2c clock is different
with the previous clock frequency.
projects / karo-tx-linux.git / log