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7 years agodrm/amdgpu: add more cases to DCE11 possible crtc mask setup
Alex Deucher [Fri, 10 Feb 2017 05:00:52 +0000 (00:00 -0500)]
drm/amdgpu: add more cases to DCE11 possible crtc mask setup

Add cases for asics with 3 and 5 crtcs.  Fixes an artificial
limitation on asics with 3 or 5 crtcs.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=99744

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
7 years agoMerge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Fri, 10 Feb 2017 00:13:30 +0000 (10:13 +1000)]
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next

Some additional fixes for 4.11.  Delayed a bit due to Chinese New Year. Highlights:
- Powerplay fixes
- VCE and UVD powergating fixes
- Clean up amdgpu SI gfx code to match CI and VI
- Misc bug fixes

* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (30 commits)
  drm/amdgpu: report the number of bytes moved at buffer creation
  drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
  drm/amdgpu: add support for new smc firmware on polaris
  drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
  drm/amdgpu: shut up #warning for compile testing
  drm/amdgpu/virt: fix double kfree on bo_va
  drm/radeon: remove some dead code
  drm/radeon: avoid kernel segfault in vce when gpu fails to resume
  drm/amd/powerplay: set fan speed to max in profile peak mode only.
  drm/amd/gfx6: update gb_addr_config
  drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: refine si_read_register
  drm/amdgpu/gfx6: clean up spi configuration
  drm/amdgpu/gfx6: clean up cu configuration
  drm/amdgpu/gfx6: clean up rb configuration
  drm/amdgpu: refine vce3.0 code and related powerplay pg code.
  drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
  drm/amdgpu: enable vce pg feature on Kv.
  drm/amdgpu: refine code for VCE2.0 and related dpm code.
  ...

7 years agoMerge tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu into...
Dave Airlie [Fri, 10 Feb 2017 00:12:56 +0000 (10:12 +1000)]
Merge tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next

two minor fixes.

* tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu:
  drm/fsl-dcu: check for clk_prepare_enable() error
  drm/fsl-dcu: remove unneeded 'ret' assignment

7 years agoMerge tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm...
Dave Airlie [Fri, 10 Feb 2017 00:12:00 +0000 (10:12 +1000)]
Merge tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc into drm-next

Just 3 bugfixes for 4.11 merge window:

- fbdev module unload oops fix from Chris
- patch from Dan that look really dangers, better safe than sorry

* tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc:
  drm/atomic: fix an error code in mode_fixup()
  drm: Cancel drm_fb_helper_resume_work on unload
  drm: Cancel drm_fb_helper_dirty_work on unload

7 years agodrm/amdgpu: report the number of bytes moved at buffer creation
Samuel Pitoiset [Thu, 9 Feb 2017 10:33:37 +0000 (11:33 +0100)]
drm/amdgpu: report the number of bytes moved at buffer creation

Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.

v2: fix computation

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
Samuel Pitoiset [Thu, 9 Feb 2017 10:33:36 +0000 (11:33 +0100)]
drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()

When ttm_bo_init() fails, the reservation mutex should be unlocked.

In debug build, the kernel reported "possible recursive locking
detected" in this codepath. For debugging purposes, I also added
a "WARN_ON(ww_mutex_is_locked())" when ttm_bo_init() fails and the
mutex was locked as expected.

This should fix (random) GPU hangs. The easy way to reproduce the
issue is to change the "Super Sampling" option from 1.0 to 2.0 in
Hitman. It will create a huge buffer, evict a bunch of buffers
(around ~5k) and deadlock.

This regression has been introduced pretty recently.

v2: only release the mutex if resv is NULL

Fixes: 12a852219583 ("drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add support for new smc firmware on polaris
Alex Deucher [Thu, 9 Feb 2017 03:35:51 +0000 (22:35 -0500)]
drm/amdgpu: add support for new smc firmware on polaris

Some polaris variants require new smc firmware.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
Rex Zhu [Mon, 6 Feb 2017 04:58:57 +0000 (12:58 +0800)]
drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: shut up #warning for compile testing
Arnd Bergmann [Wed, 1 Feb 2017 15:59:21 +0000 (16:59 +0100)]
drm/amdgpu: shut up #warning for compile testing

My randconfig tests on linux-next showed a newly introduced warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function 'amdgpu_bo_create_restricted':
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:377:2: error: #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance thanks to write-combining [-Werror=cpp]

Generally speaking, warnings about bad kernel configuration are not particularly
helpful. We could enforce the selection of X86_PAT through Kconfig, so the driver
cannot even be used unless it is enabled, or we could just rely on the runtime
warning that is also there.

In this version, I'm making the warning conditional on CONFIG_COMPILE_TEST, which
shuts it up for me, but not people that may actually want to run the kernel
as a compromize.

Fixes: a2e2f29970aa ("drm/amdgpu: Bring bo creation in line with radeon driver (v2)")
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: fix double kfree on bo_va
Colin Ian King [Fri, 3 Feb 2017 20:23:42 +0000 (20:23 +0000)]
drm/amdgpu/virt: fix double kfree on bo_va

bo_va is being kfree'd twice, once in the call to amdgpu_vm_bo_rmv
and then a short while later. Fix this double free by removing
the 2nd kfree.

Detected by CoverityScan, CID#1399524 ("Double Free")

Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: remove some dead code
Dan Carpenter [Tue, 7 Feb 2017 13:16:04 +0000 (16:16 +0300)]
drm/radeon: remove some dead code

If "rdev->bios" is NULL then we don't need to free it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: avoid kernel segfault in vce when gpu fails to resume
Jérôme Glisse [Mon, 6 Feb 2017 20:13:18 +0000 (15:13 -0500)]
drm/radeon: avoid kernel segfault in vce when gpu fails to resume

When GPU fails to resume we can not trust that value we write to GPU
memory will post and we might get garbage (more like 0xffffffff on
x86) when reading them back. This trigger out of range memory access
in the kernel inside the vce resume code path.

This patch use canonical value to compute offset instead of reading
back value from GPU memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: set fan speed to max in profile peak mode only.
Rex Zhu [Tue, 7 Feb 2017 09:34:11 +0000 (17:34 +0800)]
drm/amd/powerplay: set fan speed to max in profile peak mode only.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/gfx6: update gb_addr_config
Flora Cui [Tue, 7 Feb 2017 07:36:32 +0000 (15:36 +0800)]
drm/amd/gfx6: update gb_addr_config

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
Flora Cui [Tue, 7 Feb 2017 07:35:09 +0000 (15:35 +0800)]
drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
Flora Cui [Tue, 7 Feb 2017 07:32:34 +0000 (15:32 +0800)]
drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine si_read_register
Flora Cui [Tue, 7 Feb 2017 07:24:25 +0000 (15:24 +0800)]
drm/amdgpu: refine si_read_register

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: clean up spi configuration
Flora Cui [Tue, 7 Feb 2017 07:20:37 +0000 (15:20 +0800)]
drm/amdgpu/gfx6: clean up spi configuration

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: clean up cu configuration
Flora Cui [Tue, 7 Feb 2017 07:18:27 +0000 (15:18 +0800)]
drm/amdgpu/gfx6: clean up cu configuration

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: clean up rb configuration
Flora Cui [Tue, 7 Feb 2017 07:14:48 +0000 (15:14 +0800)]
drm/amdgpu/gfx6: clean up rb configuration

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine vce3.0 code and related powerplay pg code.
Rex Zhu [Thu, 26 Jan 2017 02:47:00 +0000 (10:47 +0800)]
drm/amdgpu: refine vce3.0 code and related powerplay pg code.

1. not start vce3.0 when hw_init
2. stop vce3.0 when vce idle.
3. pg mask used to ctrl power down/up vce.
4. change cg pg sequence in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move subfunctions to the front of vce_v2_0.c.
Rex Zhu [Thu, 26 Jan 2017 08:46:22 +0000 (16:46 +0800)]
drm/amdgpu: move subfunctions to the front of vce_v2_0.c.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable vce pg feature on Kv.
Rex Zhu [Wed, 25 Jan 2017 08:50:15 +0000 (16:50 +0800)]
drm/amdgpu: enable vce pg feature on Kv.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine code for VCE2.0 and related dpm code.
Rex Zhu [Thu, 26 Jan 2017 08:25:05 +0000 (16:25 +0800)]
drm/amdgpu: refine code for VCE2.0 and related dpm code.

v2: clean up vce cg function.
    use sw cg when vce stoped.

1. implement vce_stop function.
2. not start vce when hw_init.
3. refine vce cg/pg code.
4. delete bypass mode.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: when dpm disabled, also need to stop/start vce.
Rex Zhu [Wed, 25 Jan 2017 09:35:14 +0000 (17:35 +0800)]
drm/amdgpu: when dpm disabled, also need to stop/start vce.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine uvd5.0/6.0 code.
Rex Zhu [Fri, 20 Jan 2017 09:46:34 +0000 (17:46 +0800)]
drm/amdgpu: refine uvd5.0/6.0 code.

1. delete redundant cg pg mask check.
   pg mask use to ctrl power on/down uvd.
   not start/stop uvd.
   cg mask will be check when enable mgcg.
2. no need to start uvd when initializ.
   when ring test/ib test/encode, uvd was enabled.
   when uvd idle, uvd was stopped.
3. chang cg pg sequence in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix uvd can't initialized when dpm disabled on Ci.
Rex Zhu [Fri, 3 Feb 2017 09:33:11 +0000 (17:33 +0800)]
drm/amdgpu: fix uvd can't initialized when dpm disabled on Ci.

need to start smc when dpm disabled.
otherwise, uvd can't get response from smu.
so uvd ring test and ib test will timeout.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine uvd4.2 init/stop code.
Rex Zhu [Fri, 20 Jan 2017 07:56:45 +0000 (15:56 +0800)]
drm/amdgpu: refine uvd4.2 init/stop code.

1. set uvd_status busy before uvd_start.
2. clear uvd_status to 0 after uvd stop.
   smu firmware may check uvd_status.
3. wait uvd idle before stop uvd.
4. not start uvd when hw_init.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine uvd pg code in kv_dpm.c
Rex Zhu [Fri, 20 Jan 2017 06:34:43 +0000 (14:34 +0800)]
drm/amdgpu: refine uvd pg code in kv_dpm.c

1. no need to set cg as use hw dynamic cg.
2. when uvd idle, stop uvd. encode, start uvd.
3. if pg feature enabled, power on/down uvd by smu.
4. drm/amdgpu: dpm do not set uvd pg status.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: power down/up uvd4 when smu disabled.
Rex Zhu [Fri, 20 Jan 2017 07:07:47 +0000 (15:07 +0800)]
drm/amdgpu: power down/up uvd4 when smu disabled.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add current_pg_status register define for smu7.1
Rex Zhu [Wed, 25 Jan 2017 04:17:59 +0000 (12:17 +0800)]
drm/amdgpu: add current_pg_status register define for smu7.1

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: when dpm disabled, also can enable uvd cg/pg.
Rex Zhu [Fri, 20 Jan 2017 04:06:05 +0000 (12:06 +0800)]
drm/amdgpu: when dpm disabled, also can enable uvd cg/pg.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/atomic: fix an error code in mode_fixup()
Dan Carpenter [Tue, 7 Feb 2017 23:46:01 +0000 (02:46 +0300)]
drm/atomic: fix an error code in mode_fixup()

Having "ret" be a bool type works for everything except
ret = funcs->atomic_check().  The other functions all return zero on
error but ->atomic_check() returns negative error codes.  We want to
propagate the error code but instead we return 1.

I found this bug with static analysis and I don't know if it affects
run time.

Fixes: 4cd4df8080a3 ("drm/atomic: Add ->atomic_check() to encoder helpers")
Cc: stable@vger.kernel.org
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170207234601.GA23981@mwanda
7 years agodrm: Cancel drm_fb_helper_resume_work on unload
Chris Wilson [Tue, 7 Feb 2017 12:49:56 +0000 (12:49 +0000)]
drm: Cancel drm_fb_helper_resume_work on unload

We can not allow the worker to run after its fbdev, or even the module,
has been removed.

Fixes: cfe63423d9be ("drm/fb-helper: Add drm_fb_helper_set_suspend_unlocked()")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: dri-devel@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v4.9+
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170207124956.14954-2-chris@chris-wilson.co.uk
7 years agodrm: Cancel drm_fb_helper_dirty_work on unload
Chris Wilson [Tue, 7 Feb 2017 12:49:55 +0000 (12:49 +0000)]
drm: Cancel drm_fb_helper_dirty_work on unload

We can not allow the worker to run after its fbdev, or even the module,
has been removed.

Fixes: eaa434defaca ("drm/fb-helper: Add fb_deferred_io support")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: dri-devel@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v4.7+
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170207124956.14954-1-chris@chris-wilson.co.uk
7 years agodrm/fsl-dcu: check for clk_prepare_enable() error
Fabio Estevam [Wed, 28 Dec 2016 16:48:48 +0000 (14:48 -0200)]
drm/fsl-dcu: check for clk_prepare_enable() error

clk_prepare_enable() may fail, so we should better check its return
value.

Also place the of_node_put() function right after clk_prepare_enable(),
in order to avoid calling of_node_put() twice in case clk_prepare_enable()
fails.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
7 years agodrm/fsl-dcu: remove unneeded 'ret' assignment
Fabio Estevam [Wed, 28 Dec 2016 16:48:47 +0000 (14:48 -0200)]
drm/fsl-dcu: remove unneeded 'ret' assignment

When devm_kzalloc() fails there is no need to assign an error code
to the 'ret' variable as it will not be used after jumping to the
'err_node_put' label, so just remove the assignment.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Gabriel Krisman Bertazi <krisman@collabora.co.uk>
Signed-off-by: Stefan Agner <stefan@agner.ch>
7 years agoMerge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daein...
Dave Airlie [Wed, 8 Feb 2017 01:34:56 +0000 (11:34 +1000)]
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

Summary:
   - Add UHD support on TM2/TM2E boards.
     . adding interlace mode support and 297MHz pixel clock support
       for UHD mode, setting sysreg register in case of HW trigger mode,
       and adding SiI8620 MHL bridge device support.
   - Fix trigger mode issue on Rinato board.
     . On Rinato board, HW trigger mode doesn't work so fix it.
   - Some fixup and cleanup.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
  drm/exynos: fimd: Do not use HW trigger for exynos3250
  drm/exynos/hdmi: add bridge support
  drm/exynos/decon5433: signal vblank only on odd fields
  drm/exynos/decon5433: add support for interlace modes
  drm/exynos/hdmi: fix PLL for 27MHz settings
  drm/exynos/hdmi: fix VSI infoframe registers
  drm/exynos/hdmi: add 297MHz pixel clock support
  drm/exynos: g2d: change platform driver name to 'exynos-drm-g2d'
  drm/exynos/decon5433: configure sysreg in case of hardware trigger

7 years agoMerge branch 'drm-rockchip-next-2017-02-07' of https://github.com/markyzq/kernel...
Dave Airlie [Wed, 8 Feb 2017 01:28:19 +0000 (11:28 +1000)]
Merge branch 'drm-rockchip-next-2017-02-07' of https://github.com/markyzq/kernel-drm-rockchip into drm-next

Single compile fix.

* 'drm-rockchip-next-2017-02-07' of https://github.com/markyzq/kernel-drm-rockchip:
  drm/rockchip: cdn-dp: fix cdn-dp complie warning

7 years agodrm/exynos: fimd: Do not use HW trigger for exynos3250
Hoegeun Kwon [Fri, 3 Feb 2017 06:12:16 +0000 (15:12 +0900)]
drm/exynos: fimd: Do not use HW trigger for exynos3250

Commit a6f75aa161c5 ("drm/exynos: fimd: add HW trigger support") added
hardware trigger support to the FIMD controller driver. I have tested
but this broke the display in at least the exynos3250 Gear 2. So until
the issue is fixed, avoid using HW trigger for the exynos3250 based
boards and use SW trigger as it was before the mentioned commit.

Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos/hdmi: add bridge support
Andrzej Hajda [Wed, 1 Feb 2017 08:29:14 +0000 (09:29 +0100)]
drm/exynos/hdmi: add bridge support

On TM2/TM2e platforms HDMI output is connected to MHL bridge
SiI8620. To allow configure UltraHD modes on the bridge
and to eliminate unsupported modes this bridge should be
attached to drm_encoder implemented in exynos_hdmi.

Changelog v1:
- fix drm_attach_bridge argument.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos/decon5433: signal vblank only on odd fields
Andrzej Hajda [Fri, 20 Jan 2017 06:52:24 +0000 (07:52 +0100)]
drm/exynos/decon5433: signal vblank only on odd fields

In case of interlace mode irq is generated for odd and even fields, but
vblank should be signaled only for the last emitted field.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos/decon5433: add support for interlace modes
Andrzej Hajda [Fri, 20 Jan 2017 06:52:23 +0000 (07:52 +0100)]
drm/exynos/decon5433: add support for interlace modes

Some registers should be programmed differently in interlace mode.
Additionally IP does not signal stop state properly in interlaced
mode, so warning has been removed.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos/hdmi: fix PLL for 27MHz settings
Andrzej Hajda [Fri, 20 Jan 2017 06:52:21 +0000 (07:52 +0100)]
drm/exynos/hdmi: fix PLL for 27MHz settings

Current settings for 27MHz and 27.027MHz do not work. Use the settings from
vendor code instead.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos/hdmi: fix VSI infoframe registers
Andrzej Hajda [Fri, 20 Jan 2017 06:52:20 +0000 (07:52 +0100)]
drm/exynos/hdmi: fix VSI infoframe registers

VSI infoframe registers address space is non-contiguous, so infoframe write
should be split into two chunks.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos/hdmi: add 297MHz pixel clock support
Andrzej Hajda [Fri, 20 Jan 2017 06:52:19 +0000 (07:52 +0100)]
drm/exynos/hdmi: add 297MHz pixel clock support

297MHz is used by Ultra HD modes.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos: g2d: change platform driver name to 'exynos-drm-g2d'
Tobias Jakobi [Fri, 20 Jan 2017 16:02:51 +0000 (17:02 +0100)]
drm/exynos: g2d: change platform driver name to 'exynos-drm-g2d'

The current name is 's5p-g2d', which is identical with the driver
name of the old V4L2 driver in media/platform.
This is probably due to the DRM driver being based on the V4L2
driver when it was initially created. Still the clashing of driver
names is confusing, so rename it to something in line with the
other DRM subdrivers.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/exynos/decon5433: configure sysreg in case of hardware trigger
Andrzej Hajda [Wed, 1 Feb 2017 06:35:07 +0000 (15:35 +0900)]
drm/exynos/decon5433: configure sysreg in case of hardware trigger

In case of HW trigger mode, sysreg register should be configured to
enable TE functionality. The patch refactors also trigger setup function.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
7 years agodrm/rockchip: cdn-dp: fix cdn-dp complie warning
Mark Yao [Sun, 5 Feb 2017 09:10:57 +0000 (17:10 +0800)]
drm/rockchip: cdn-dp: fix cdn-dp complie warning

fix warning:

drivers/gpu/drm/rockchip/cdn-dp-reg.c:632:24: warning:
  'val[1]' may be used uninitialized in this function [-Wmaybe-uninitialized]
  msa_misc = 2 * val[0] + 32 * val[1] +

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
7 years agoMerge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm...
Dave Airlie [Tue, 7 Feb 2017 01:05:42 +0000 (11:05 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next

The big things this time around are:
1) support for hw cursor on newer mdp5 devices (snapdragon 820+,
tested on db820c)
2) dsi encoder cleanup
3) gpu dt bindings cleanup so we can get the gpu nodes merged upstream

* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (32 commits)
  drm/msm: return -EFAULT if copy_from_user() fails
  drm/msm/dsi: Add PHY/PLL for 8x96
  drm/msm/dsi: Add new method to calculate 14nm PHY timings
  drm/msm/dsi: Move PHY operations out of host
  drm/msm/dsi: Reset both PHYs before clock operation for dual DSI
  drm/msm/dsi: Pass down use case to PHY
  drm/msm/dsi: Return more timings from PHY to host
  drm/msm/dsi: Add a PHY op that initializes version specific stuff
  drm/msm/dsi: Add 8x96 info in dsi_cfg
  drm/msm/dsi: Don't error if a DSI host doesn't have a device connected
  drm/msm/mdp5: Add support for legacy cursor updates
  drm/msm/mdp5: Refactor mdp5_plane_atomic_check
  drm/msm/mdp5: Add cursor planes
  drm/msm/mdp5: Misc cursor plane bits
  drm/msm/mdp5: Configure COLOR3_OUT propagation
  drm/msm/mdp5: Use plane helpers to configure src/dst rectangles
  drm/msm/mdp5: Prepare CRTC/LM for empty stages
  drm/msm/mdp5: Create only as many CRTCs as we need
  drm/msm/mdp5: cfg: Change count to unsigned int
  drm/msm/mdp5: Create single encoder per interface (INTF)
  ...

7 years agoMerge branch 'drm-rockchip-next-2017-02-05' of https://github.com/markyzq/kernel...
Dave Airlie [Tue, 7 Feb 2017 01:03:30 +0000 (11:03 +1000)]
Merge branch 'drm-rockchip-next-2017-02-05' of https://github.com/markyzq/kernel-drm-rockchip into drm-next

rockchip CDN-DP support.

* 'drm-rockchip-next-2017-02-05' of https://github.com/markyzq/kernel-drm-rockchip:
  drm/rockchip: cdn-dp: don't configure hardware in mode_set
  drm/rockchip: cdn-dp: retry to check sink count
  drm/rockchip: cdn-dp: Move mutex_init to probe
  drm/rockchip: cdn-dp: do not use drm_helper_hpd_irq_event
  drm/rockchip: cdn-dp: Do not run worker while suspended
  drm/rockchip: cdn-dp: Load firmware if no monitor connected
  drm/rockchip: cdn-dp: add cdn DP support for rk3399
  drm/rockchip: return ERR_PTR instead of NULL
  drm/rockchip: vop: make vop register setting take effect

7 years agoMerge tag 'drm-misc-next-2017-02-03' of git://anongit.freedesktop.org/git/drm-misc...
Dave Airlie [Tue, 7 Feb 2017 00:54:12 +0000 (10:54 +1000)]
Merge tag 'drm-misc-next-2017-02-03' of git://anongit.freedesktop.org/git/drm-misc into drm-next

Final 4.11 feature pull request:
- sii8520 bridge update from Andrzej
- ->release callback, maybe somewhen in the future we'll even get
  drm_device lifetimes correct! (Chris Wilson)
- drm_mm search improvements, and good docs for different search
  strategies now (Chris)
- simplify fbdev emulation init parameters (Gabriel)
- bunch of misc things all over

... and the first few patches from our small driver in drm-misc
experiment:
- cleanups for qxl and bochs from a few different people
- dsi support for vc4 (not yet the panel driver, that's under discussion
  still) from Eric
- meson rename to meson-drm to distinguish from other platform drivers
  (Neil Amstrong)

* tag 'drm-misc-next-2017-02-03' of git://anongit.freedesktop.org/git/drm-misc: (47 commits)
  drm: kselftest for drm_mm and bottom-up allocation
  drm: Improve drm_mm search (and fix topdown allocation) with rbtrees
  drm: Fix build when FBDEV_EMULATION is disabled
  drm: Rely on mode_config data for fb_helper initialization
  drm: Provide a driver hook for drm_dev_release()
  drm: meson: rename driver name to meson-drm
  drm: meson: rename module name to meson-drm
  drm/bridge/sii8620: enable interlace modes
  drm/bridge/sii8620: enable MHL3 mode if possible
  drm/bridge/sii8620: add HSIC initialization code
  drm/bridge/sii8620: improve gen2 write burst IRQ routine
  drm/bridge/sii8620: send EMSC features on request
  drm/bridge/sii8620: rewrite hdmi start sequence
  drm/bridge/mhl: add MHL3 infoframe related definitions
  drm/bridge/sii8620: fix disconnect sequence
  drm/bridge/sii8620: split EDID read and write code
  drm/bridge/sii8620: add delay during cbus reset
  drm/bridge/sii8620: do not stop MHL output when TMDS input is stopped
  drm/bridge/sii8620: set gen2 write burst before sending MSC command
  drm/bridge/sii8620: abstract out sink detection code
  ...

7 years agodrm/msm: return -EFAULT if copy_from_user() fails
Dan Carpenter [Mon, 16 Jan 2017 11:58:08 +0000 (14:58 +0300)]
drm/msm: return -EFAULT if copy_from_user() fails

copy_from_user_inatomic() is actually a local function that returns
-EFAULT or positive values on error.  Otherwise copy_from_user() returns
the number of bytes remaining to be copied.  We want to return -EFAULT
here.

I removed an unlikely() because we just did a copy_from_user()
so I don't think it can possibly make a difference.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Add PHY/PLL for 8x96
Archit Taneja [Tue, 3 Jan 2017 14:15:43 +0000 (19:45 +0530)]
drm/msm/dsi: Add PHY/PLL for 8x96

Extend the DSI PHY/PLL drivers to support the DSI 14nm PHY/PLL
found on 8x96.

These are picked up from the downstream driver. The PHY part is similar
to the other DSI PHYs. The PLL driver requires some trickery so that
one DSI PLL can drive both the DSIs (i.e, dual DSI mode).

In the case of dual DSI mode. One DSI instance becomes the clock master,
and other the clock slave. The master PLL's output (Byte and Pixel clock)
is fed to both the DSI hosts/PHYs.

When the DSIs are configured in dual DSI mode, the PHY driver communicates
to the PLL driver using msm_dsi_pll_set_usecase() which instance is the
master and which one is the slave. When setting rate, the master PLL also
configures some of the slave PLL/PHY registers which need to be identical
to the master's for correct dual DSI behaviour.

There are 2 PLL post dividers that should have ideally been modelled as
generic clk_divider clocks, but require some customization for dual DSI.
In particular, when the master PLL's post-diviers are set, the slave PLL's
post-dividers need to be set too. The clk_ops for these use clk_divider's
helper ops and flags internally to prevent redundant code.

Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Add new method to calculate 14nm PHY timings
Hai Li [Tue, 3 Jan 2017 14:01:16 +0000 (19:31 +0530)]
drm/msm/dsi: Add new method to calculate 14nm PHY timings

The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different
set of calculations for computing D-PHY timing params. Create a
timing_calc_v2 func for the newer v2 PHYs.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Move PHY operations out of host
Hai Li [Sat, 7 Jan 2017 08:54:38 +0000 (14:24 +0530)]
drm/msm/dsi: Move PHY operations out of host

Since DSI PHY has been a separate platform device, it should not
depend on the resources in host to be functional. This change is
to trigger PHY operations in manager, instead of host, so that
host and PHY can be completely separated.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Reset both PHYs before clock operation for dual DSI
Archit Taneja [Wed, 29 Jul 2015 16:14:12 +0000 (12:14 -0400)]
drm/msm/dsi: Reset both PHYs before clock operation for dual DSI

In case of dual DSI, some registers in PHY1 have been programmed
during PLL0 clock's set_rate. The PHY1 reset called by host1 later
will silently reset those PHY1 registers. This change is to reset
and enable both PHYs before any PLL clock operation.

[Originally worked on by Hai Li <hali@codeaurora.org>. Fixed up
by Archit Taneja <architt@codeaurora.org>]

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Pass down use case to PHY
Hai Li [Thu, 15 Sep 2016 09:14:22 +0000 (14:44 +0530)]
drm/msm/dsi: Pass down use case to PHY

For some new types of DSI PHY, more settings depend on
use cases controlled by DSI manager. This change allows
DSI manager to setup PHY with a use case.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Return more timings from PHY to host
Hai Li [Thu, 15 Sep 2016 09:04:49 +0000 (14:34 +0530)]
drm/msm/dsi: Return more timings from PHY to host

The DSI host is required to configure more timings calculated
in PHY. By introducing a shared structure, this change allows
more timing information passed from PHY to host.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Add a PHY op that initializes version specific stuff
Archit Taneja [Wed, 14 Sep 2016 06:53:59 +0000 (12:23 +0530)]
drm/msm/dsi: Add a PHY op that initializes version specific stuff

Create an init() op for dsi_phy which sets up things specific to
a given DSI PHY.

The dsi_phy driver probe expects every DSI version to get a
"dsi_phy_regulator" mmio base. This isn't the case for 8x96.
Creating an init() op will allow us to accommodate such
differences.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Add 8x96 info in dsi_cfg
Archit Taneja [Wed, 14 Sep 2016 06:53:07 +0000 (12:23 +0530)]
drm/msm/dsi: Add 8x96 info in dsi_cfg

Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver
enables core_mmss_clk. We're seeing some branch clock warnings on
8x96 when enabling this. There doesn't seem to be any negative effect
with not enabling this clock, so use it once we figure out why we
get the warnings.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Don't error if a DSI host doesn't have a device connected
Archit Taneja [Wed, 4 Jan 2017 08:44:58 +0000 (14:14 +0530)]
drm/msm/dsi: Don't error if a DSI host doesn't have a device connected

The driver returns an error if a DSI DT node is populated, but no device
is connected to it or if the data-lane map isn't present. Ideally, such
a DSI node shouldn't be probed at all (i.e, its status should be set to
"disabled in DT"), but there isn't any harm in registering the DSI device
even if it doesn't have a bridge/panel connected to it.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Add support for legacy cursor updates
Archit Taneja [Fri, 16 Dec 2016 06:29:57 +0000 (11:59 +0530)]
drm/msm/mdp5: Add support for legacy cursor updates

This code has been more or less picked up from the vc4 and intel
implementations of update_plane() funcs for cursor planes.

The update_plane() func is usually the drm_atomic_helper_update_plane
func that will issue an atomic commit with the plane updates. Such
commits are not intended to be done faster than the vsync rate.

The legacy cursor userspace API, on the other hand, expects the kernel
to handle cursor updates immediately.

Create a fast path in update_plane, which updates the cursor registers
and flushes the configuration. The fast path is taken when there is only
a change in the cursor's position in the crtc, or a change in the
cursor's crop co-ordinates. For anything else, we go via the slow path.

We take the slow path even when the fb changes, and when there is
currently no fb tied to the plane. This should hopefully ensure that we
always take a slow path for every new fb. This in turn should ensure that
the fb is pinned/prepared.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Refactor mdp5_plane_atomic_check
Archit Taneja [Mon, 16 Jan 2017 06:46:34 +0000 (12:16 +0530)]
drm/msm/mdp5: Refactor mdp5_plane_atomic_check

In mdp5_plane_atomic_check, we get crtc_state from drm_plane_state.

Later, for cursor planes, we'll populate the update_plane() func that
takes a fast asynchronous path to implement cursor movements. There, we
would need to call a similar atomic_check func to validate the plane
state, but crtc_state would need to be derived differently.

Refactor mdp5_plane_atomic_check to mdp5_plane_atomic_check_with_state
such that the latter takes crtc_state as an argument.

This is similar to what the intel driver has done for async cursor
updates.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Add cursor planes
Archit Taneja [Fri, 16 Dec 2016 06:30:30 +0000 (12:00 +0530)]
drm/msm/mdp5: Add cursor planes

Register cursor drm_planes. The loop in modeset_init that inits the
planes and crtcs has to be refactored a bit. We first iterate all the
hwpipes to find the cursor planes. Then, we loop again to create
crtcs.

In msm_atomic_wait_for_commit_done, remove the check which bypasses
waiting for vsyncs if state->legacy_cursor_updates is true.

We will later create a fast path for cursor position changes in the
cursor plane's update_plane func that doesn't go via the regular
atomic commit path. For rest of cursor related updates, we will have
to wait for vsyncs, so ignore the legacy_cursor_updates flag.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Misc cursor plane bits
Archit Taneja [Mon, 16 Jan 2017 06:27:04 +0000 (11:57 +0530)]
drm/msm/mdp5: Misc cursor plane bits

These are various changes added in preparation for cursor planes:

- Add a pipe_cursor block for 8x96 in mdp5_cfg.
- Add a new pipe CAP called MDP_PIPE_CAP_CURSOR. Use this to ensure we
  assign a cursor SSPP for a drm_plane with type DRM_PLANE_TYPE_CURSOR.
- Update mdp5_ctl_blend_mask/ext_blend_mask funcs to incorporate cursor
  SSPPs.
- In mdp5_ctl_blend, iterate through MAX_STAGES instead of stage_cnt,
  we need to do this because we can now have empty stages in between.
- In mdp5_crtc_atomic_check, make sure that the cursor plane has the
  highest zorder, and stage the cursor plane to the maximum stage #
  present on the HW.
- Create drm_crtc_funcs that doesn't try to implement cursors using the
  older LM cursor HW.
- Pass drm_plane_type in mdp5_plane_init instead of a bool telling
  whether plane is primary or not.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Configure COLOR3_OUT propagation
Archit Taneja [Mon, 19 Dec 2016 08:04:11 +0000 (13:34 +0530)]
drm/msm/mdp5: Configure COLOR3_OUT propagation

In MDP5 Layer Mixer HW, the blender output is only the blended color
components (i.e R, G and B, or COLOR0/1/2 in MDP5 HW terminology). This
is fed to the BG input of the next blender. We also need to provide an
alpha (COLOR3) value for the BG input at the next stage.

This is configured via using the REG_MDP5_LM_BLEND_COLOR_OUT register.
For each stage, we can propagate either the BG or FG alpha to the next
stage.

The approach taken by the driver is to propagate FG alpha, if the plane
staged on that blender has an alpha. If it doesn't, we try to propagate
the base layer's alpha.

This is borrowed from downstream MDP5 kernel driver. Without this, we
don't see any cursor plane content.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Use plane helpers to configure src/dst rectangles
Archit Taneja [Mon, 16 Jan 2017 06:16:17 +0000 (11:46 +0530)]
drm/msm/mdp5: Use plane helpers to configure src/dst rectangles

The MDP5 plane's atomic_check ops doesn't perform clipping tests.
This didn't hurt us much in the past, but clipping becomes important
with cursor planes.

Use drm_plane_helper_check_state, the way rockchip/intel/mtk drivers
already do. Use these drivers as reference.

Clipping requires knowledge of the crtc width and height. This requires
us to call drm_atomic_helper_check_modeset before
drm_atomic_helper_check_planes in the driver's atomic_check op, because
check_modetest will populate the mode for the crtc, needed to populate
the clip rectangle.

We update the plane_enabled(state) local helper to use state->visible,
since state->visible and 'state->fb && state->crtc' represent the same
thing.

One issue with the existing code is that we don't have a way to disable
the plane when it's completely clipped out. Until there isn't an update
on the crtc (which would de-stage the plane), we would still see the
plane in its last 'visible' configuration.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Prepare CRTC/LM for empty stages
Archit Taneja [Mon, 12 Dec 2016 09:47:56 +0000 (15:17 +0530)]
drm/msm/mdp5: Prepare CRTC/LM for empty stages

Use SSPP_NONE in mdp5_plane_pipe() if there is now hwpipe allocated for
the drm_plane. Returning '0' means we are returning VIG0 pipe.

Also, use the mdp5_pipe enum to pass around the stage array. Initialize
the stage to SSPP_NONE by default.

We do the above because 1) Cursor plane has to be staged at the topmost
blender of the LM, which can result in empty stages in between 2) In
the future, when we support multiple LMs per CRTC. We could have stages
which don't have any pipe assigned to them.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Create only as many CRTCs as we need
Archit Taneja [Tue, 6 Dec 2016 06:45:54 +0000 (12:15 +0530)]
drm/msm/mdp5: Create only as many CRTCs as we need

We currently create CRTCs equaling to the # of Layer Mixer blocks we
have on the MDP5 HW. This number is generally more than the # of encoders
(INTFs) we have in the MDSS HW. The number of encoders connected to
displays on the platform (as described by DT) would be even lesser.

Create only N drm_crtcs, where N is the number of drm_encoders
successfully registered. To do this, we call modeset_init_intf() before
we init the drm_crtcs and drm_planes.

Because of this change, setting encoder->possible_crtcs needs to be moved
from construct_encoder() to a later point when we know how many CRTCs we
have.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: cfg: Change count to unsigned int
Archit Taneja [Tue, 6 Dec 2016 06:42:59 +0000 (12:12 +0530)]
drm/msm/mdp5: cfg: Change count to unsigned int

Count can't be non-zero. Changing to uint will also prevent future
warnings.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Create single encoder per interface (INTF)
Archit Taneja [Mon, 16 Jan 2017 05:55:38 +0000 (11:25 +0530)]
drm/msm/mdp5: Create single encoder per interface (INTF)

For the DSI interfaces, the mdp5_kms core creates 2 encoders for video
and command modes.

Create only a single encoder per interface. When creating the encoder, set
the interface type to MDP5_INTF_MODE_NONE. It's the bridge (DSI/HDMI/eDP)
driver's responsibility to set a different interface type. It can use the
the kms func op set_encoder_mode to change the mode of operation, which
in turn would configure the interface type for the INTF.

In mdp5_cmd_encoder.c, we remove the redundant code, and make the commmand
mode funcs as helpers that are used in mdp5_encoder.c

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Prepare for merging video and command encoders
Archit Taneja [Tue, 6 Dec 2016 03:51:21 +0000 (09:21 +0530)]
drm/msm/mdp5: Prepare for merging video and command encoders

Rename the mdp5_encoder_* ops for active displays to
mdp5_vid_encoder_* ops.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm: Set encoder's mode of operation using a kms func
Archit Taneja [Mon, 5 Dec 2016 09:54:53 +0000 (15:24 +0530)]
drm/msm: Set encoder's mode of operation using a kms func

The mdp5 kms driver currently sets up multiple encoders per interface
(INTF), one for each kind of mode of operation it supports.
We create 2 drm_encoders for DSI, one for Video Mode and the other
for Command Mode operation. The reason behind this approach could have
been that we aren't aware of the DSI device's mode of operation when
we create the encoders.

This makes things a bit complicated, since these encoders have to
be further attached to the same DSI bridge. The easier way out is
to create a single encoder, and make the DSI driver set its mode
of operation when we know what the DSI device's mode flags are.

Start with providing a way to set the mdp5_intf_mode using a kms
func that sets the encoder's mode of operation. When constructing
a DSI encoder, we set the mode of operation to Video Mode as
default. When the DSI device is attached to the host, we probe the
DSI mode flags and set the corresponding mode of operation.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm: Construct only one encoder for DSI
Archit Taneja [Mon, 16 Jan 2017 04:12:03 +0000 (09:42 +0530)]
drm/msm: Construct only one encoder for DSI

We currently create 2 encoders for DSI interfaces, one for command
mode and other for video mode operation. This isn't needed as we
can't really use both the encoders at the same time. It also makes
connecting bridges harder.

Switch to creating a single encoder. For now, we assume that the
encoder is configured only in video mode. Later, the same encoder
would be usable in both modes.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Set msm_dsi->encoders before initializing bridge
Archit Taneja [Wed, 11 Jan 2017 06:29:56 +0000 (11:59 +0530)]
drm/msm/dsi: Set msm_dsi->encoders before initializing bridge

The commit "drm: bridge: Link encoder and bridge in core code" updated
the drm_bridge_attach() API to also include the drm_encoder pointer
the bridge attaches to.

The func msm_dsi_manager_bridge_init() now relies on the drm_encoder
pointer stored in msm_dsi->encoders to pass the encoder to the bridge
API.

msm_dsi->encoders is unfortunately set after this function is called,
resulting in us passing a NULL pointer to drm_brigde_attach. This
results in an error and the DSI driver probe fails.

Move the initialization of msm_dsi->encoders[] a bit up. Also, don't
try to set the encoder's bridge. That's now managed by the bridge
API.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/dsi: Update generated headers
Archit Taneja [Mon, 16 Jan 2017 06:05:36 +0000 (11:35 +0530)]
drm/msm/dsi: Update generated headers

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: Update generated headers
Archit Taneja [Mon, 16 Jan 2017 06:04:19 +0000 (11:34 +0530)]
drm/msm/mdp5: Update generated headers

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm/mdp5: cfg: Add pipe_cursor block
Archit Taneja [Mon, 12 Dec 2016 09:40:21 +0000 (15:10 +0530)]
drm/msm/mdp5: cfg: Add pipe_cursor block

Define the block in advance so that the generated mdp5.xml.h doesn't
break build.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm: let gpu wire up it's own fault handler
Rob Clark [Wed, 7 Dec 2016 16:13:53 +0000 (11:13 -0500)]
drm/msm: let gpu wire up it's own fault handler

Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agodrm/msm: drop _clk suffix from clk names
Rob Clark [Mon, 30 Jan 2017 16:30:58 +0000 (11:30 -0500)]
drm/msm: drop _clk suffix from clk names

Suggested by Rob Herring.  We still support the old names for
compatibility with downstream android dt files.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
7 years agodrm/msm: drop quirks binding
Rob Clark [Mon, 30 Jan 2017 16:15:14 +0000 (11:15 -0500)]
drm/msm: drop quirks binding

This was never documented or used in upstream dtb.  It is used by
downstream bindings from android device kernels.  But the quirks are
a property of the gpu revision, and as such are redundant to be listed
separately in dt.  Instead, move the quirks to the device table.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agodrm/msm: drop qcom,chipid
Rob Clark [Mon, 30 Jan 2017 16:02:27 +0000 (11:02 -0500)]
drm/msm: drop qcom,chipid

The original way we determined the gpu version was based on downstream
bindings from android kernel.  A cleaner way is to get the version from
the compatible string.

Note that no upstream dtb uses these bindings.  But the code still
supports falling back to the legacy bindings (with a warning), so that
we are still compatible with the gpu dt node from android device
kernels.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
7 years agodrm/msm: remove qcom,gpu-pwrlevels bindings
Rob Clark [Mon, 30 Jan 2017 15:46:35 +0000 (10:46 -0500)]
drm/msm: remove qcom,gpu-pwrlevels bindings

The plan is to use the OPP bindings.  For now, remove the documentation
for qcom,gpu-pwrlevels, and make the driver fall back to a safe low
clock if the node is not present.

Note that no upstream dtb use this node.  For now we keep compatibility
with this node to avoid breaking compatibility with downstream android
dt files.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
7 years agodrm/rockchip: cdn-dp: don't configure hardware in mode_set
Chris Zhong [Sun, 5 Feb 2017 07:55:02 +0000 (15:55 +0800)]
drm/rockchip: cdn-dp: don't configure hardware in mode_set

With atomic modesetting the hardware will be powered off when the
mode_set function is called.  We should configure the hardware in the
enable function.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
7 years agodrm/rockchip: cdn-dp: retry to check sink count
Chris Zhong [Sun, 5 Feb 2017 07:55:01 +0000 (15:55 +0800)]
drm/rockchip: cdn-dp: retry to check sink count

Sometimes the Dock is disconnected, but cdn_dp_encoder_disable is not
triggered by DRM. For example, unplug the Dock in console mode, and
re-plug it again, the cdn_dp_event_work will try to get the sink count
of Dock, since the DP is still active. But the Dock has been powered
down, it need re-power on, and wait for a while until it is ready to
DPCD communication.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
7 years agodrm/rockchip: cdn-dp: Move mutex_init to probe
Jeffy Chen [Sun, 5 Feb 2017 07:55:00 +0000 (15:55 +0800)]
drm/rockchip: cdn-dp: Move mutex_init to probe

We're trying to lock mutex when cdn-dp shutdown, so we need to make
sure the mutex is inited in cdn-dp's probe.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
7 years agodrm/rockchip: cdn-dp: do not use drm_helper_hpd_irq_event
Chris Zhong [Sun, 5 Feb 2017 07:54:59 +0000 (15:54 +0800)]
drm/rockchip: cdn-dp: do not use drm_helper_hpd_irq_event

The cdn_dp_pd_event_work is using drm_helper_hpd_irq_event to update the
connector status, this function is used to update all connectors of
drm_device. Therefore, the detect of other connector will be call, when
cdn_dp_pd_event_work is triggered, every time. It is not necessary, and
it may cause system crash. replace drm_helper_hpd_irq_event with
drm_kms_helper_hotplug_event, only update cdn-dp status.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Guenter Roeck <groeck@chromium.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
7 years agodrm/rockchip: cdn-dp: Do not run worker while suspended
Guenter Roeck [Sun, 5 Feb 2017 07:54:58 +0000 (15:54 +0800)]
drm/rockchip: cdn-dp: Do not run worker while suspended

If the driver is in suspended mode, the dp block may be disabled, and
chip registers may not be accessible. Yet, the worker may be triggered
in this situation by an extcon event. If that happens, the following crash
will be seen.

cdn-dp fec00000.dp: [drm:cdn_dp_pd_event_work] *ERROR* Enable dp failed -19
cdn-dp fec00000.dp: [drm:cdn_dp_pd_event_work] Connected, not enabled. Enabling cdn
Bad mode in Error handler detected, code 0xbf000002 -- SError
CPU: 1 PID: 10357 Comm: kworker/1:2 Not tainted 4.4.21-05903-ge0514ea #1
Hardware name: Google Kevin (DT)
Workqueue: events cdn_dp_pd_event_work
task: ffffffc0cda67080 ti: ffffffc0b9b80000 task.ti: ffffffc0b9b80000
PC is at cdn_dp_clock_reset+0x30/0xa8
LR is at cdn_dp_enable+0x1e0/0x69c
...
Call trace:
[<ffffffc0005a7e24>] cdn_dp_pd_event_work+0x58/0x3f4
[<ffffffc0002397f0>] process_one_work+0x240/0x424
[<ffffffc00023a28c>] worker_thread+0x2fc/0x424
[<ffffffc00023f5fc>] kthread+0x10c/0x114
[<ffffffc000203dd0>] ret_from_fork+0x10/0x40

Problem is two-fold: The worker should not run while suspended, and the
suspend function should not call cdn_dp_disable() while the worker is
running.

Signed-off-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
7 years agodrm/rockchip: cdn-dp: Load firmware if no monitor connected
Guenter Roeck [Sun, 5 Feb 2017 07:54:57 +0000 (15:54 +0800)]
drm/rockchip: cdn-dp: Load firmware if no monitor connected

If no monitor is connected, suspend/resume cycles result in firmware
load errors because the driver attempts to load the firmware while
the system is in suspend state. This results in a kernel warning and
traceback.

Loading the firmware during boot fixes the problem. Note that we can not
just call schedule_work conditionally in cdn_dp_pd_event() if the insertion
status changed. The problem would still be seen if a monitor is connected
for the first time during suspend.

Signed-off-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
7 years agodrm/rockchip: cdn-dp: add cdn DP support for rk3399
Chris Zhong [Sun, 5 Feb 2017 07:54:56 +0000 (15:54 +0800)]
drm/rockchip: cdn-dp: add cdn DP support for rk3399

Add support for cdn DP controller which is embedded in the rk3399
SoCs. The DP is compliant with DisplayPort Specification,
Version 1.3, This IP is compatible with the rockchip type-c PHY IP.
There is a uCPU in DP controller, it need a firmware to work,
please put the firmware file to /lib/firmware/rockchip/dptx.bin. The
uCPU in charge of aux communication and link training, the host use
mailbox to communicate with the ucpu.
The dclk pin_pol of vop must not be invert for DP.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
[seanpaul fixed up some races between the worker and modeset]
[seanpaul squashed ~15 commits from chromium.org gerrit]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[groeck fixed compilation errors when building as module]
Signed-off-by: Guenter Roeck <groeck@chromium.org>
7 years agodrm/rockchip: return ERR_PTR instead of NULL
Julia Lawall [Thu, 10 Nov 2016 21:10:56 +0000 (22:10 +0100)]
drm/rockchip: return ERR_PTR instead of NULL

rockchip_drm_framebuffer_init is only used in one case, in
rockchip_drm_fbdev.c, where its return value is tested using IS_ERR.  To
enable propagating the reason for the error, change the definition so that
it returns an ERR_PTR value.

Problem found with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
7 years agodrm/rockchip: vop: make vop register setting take effect
Chris Zhong [Sat, 27 Aug 2016 03:39:38 +0000 (20:39 -0700)]
drm/rockchip: vop: make vop register setting take effect

The setting of vop registers need a reg_done writing to take effect.
In vop_enable the vop return to work by by restoring registers, but the
registers do not take effect immediately, it should a vop_cfg_done
after it. The same thing is needed by windows_disabled in
vop_crtc_disable.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
7 years agodrm: kselftest for drm_mm and bottom-up allocation
Chris Wilson [Thu, 2 Feb 2017 11:44:34 +0000 (11:44 +0000)]
drm: kselftest for drm_mm and bottom-up allocation

Check that if we request bottom-up allocation from drm_mm_insert_node()
we receive the next available hole from the bottom.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170202114434.3060-2-chris@chris-wilson.co.uk
7 years agodrm: Improve drm_mm search (and fix topdown allocation) with rbtrees
Chris Wilson [Thu, 2 Feb 2017 21:04:38 +0000 (21:04 +0000)]
drm: Improve drm_mm search (and fix topdown allocation) with rbtrees

The drm_mm range manager claimed to support top-down insertion, but it
was neither searching for the top-most hole that could fit the
allocation request nor fitting the request to the hole correctly.

In order to search the range efficiently, we create a secondary index
for the holes using either their size or their address. This index
allows us to find the smallest hole or the hole at the bottom or top of
the range efficiently, whilst keeping the hole stack to rapidly service
evictions.

v2: Search for holes both high and low. Rename flags to mode.
v3: Discover rb_entry_safe() and use it!
v4: Kerneldoc for enum drm_mm_insert_mode.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Sinclair Yeh <syeh@vmware.com>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com> # vmwgfx
Reviewed-by: Lucas Stach <l.stach@pengutronix.de> #etnaviv
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170202210438.28702-1-chris@chris-wilson.co.uk
7 years agoMerge remote-tracking branch 'airlied/drm-next' into drm-misc-next
Daniel Vetter [Fri, 3 Feb 2017 10:09:25 +0000 (11:09 +0100)]
Merge remote-tracking branch 'airlied/drm-next' into drm-misc-next

Yet another backmerge to get at latest etnaviv code, which is need for
Chris' drm_mm patch.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
7 years agoMerge branch 'drm-etnaviv-next' of https://git.pengutronix.de/git/lst/linux into...
Dave Airlie [Thu, 2 Feb 2017 19:41:58 +0000 (05:41 +1000)]
Merge branch 'drm-etnaviv-next' of https://git.pengutronix.de/git/lst/linux into drm-next

It includes code cleanups from Bhumika and Liviu, a significant shader
performance fix and additions to the cmdstream validator from Wladimir
and the addition of a cmdbuf suballocator by myself.
The suballocator improves performance on all chips by reducing the CPU
overhead of the kernel driver and side steps the GC3000 FE MMU flush
erratum, now making the workarounds in IOVA allocation we had before
unnecessary, which results in a nice cleanup of the code in that area.

* 'drm-etnaviv-next' of https://git.pengutronix.de/git/lst/linux:
  drm/etnaviv: Remove duplicate header file include
  Revert "drm/etnaviv: trick drm_mm into giving out a low IOVA"
  drm/etnaviv: add cmdbuf suballocator
  drm/etnaviv: get cmdbuf physical address through the cmdbuf abstraction
  drm/etnaviv: wire up iova handling in new cmdbuf abstraction
  drm/etnaviv: move cmdbuf de-/allocation into own file
  drm/etnaviv: always flush MMU TLBs on map/unmap
  drm/etnaviv: constify etnaviv_iommu_ops structures
  drm/etnaviv: set up initial PULSE_EATER register
  drm/etnaviv: add new GC3000 sensitive states

7 years agodrm: Fix build when FBDEV_EMULATION is disabled
Gabriel Krisman Bertazi [Thu, 2 Feb 2017 19:39:00 +0000 (17:39 -0200)]
drm: Fix build when FBDEV_EMULATION is disabled

Commit be7f735cd5ea ("drm: Rely on mode_config data for fb_helper
initialization") broke the build when CONFIG_DRM_FBDEV_EMULATION is
disabled because it didn't update the prototype for drm_fb_helper_init
in that case.

Fixes: be7f735cd5ea ("drm: Rely on mode_config data for fb_helper
 initialization")
Signed-off-by: Gabriel Krisman Bertazi <krisman@collabora.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170202193900.22075-1-krisman@collabora.co.uk
7 years agodrm/amdgpu: stop reserving a shared fence for VA updates
Christian König [Mon, 30 Jan 2017 09:24:13 +0000 (10:24 +0100)]
drm/amdgpu: stop reserving a shared fence for VA updates

We don't add any fences do the buffer, but just use it's address.

Additional to that we don't need a duplicates list here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix race in GEM VA map IOCTL v2
Christian König [Fri, 27 Jan 2017 14:58:43 +0000 (15:58 +0100)]
drm/amdgpu: fix race in GEM VA map IOCTL v2

Somebody could try to free the bo_va between mapping and updating it.

v2: fix typos in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>