Olof Johansson [Thu, 11 Apr 2013 11:04:38 +0000 (04:04 -0700)]
Merge tag 'omap-for-v3.10/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt2
From Tony Lindgren:
Device tree updates for omaps via Benoit Cousson <b-cousson@ti.com>.
Note that the branch has dependencies to two other branches:
- omap-devel-b-for-3.10 from Paul to get the AM33xx missing
hwmod and thus avoid a regression with Santosh's hwmod
cleanup including in this DT series [1]. It avoids breaking
bisect if this series is merged before Paul's fixes.
- omap-for-v3.10/usb branch to avoid nasty merge conflict in
omap3.dtsi and omap4.dtsi due to the DTS patches contained
in the USB branch because of a screw up by the unnamed person
typing this signed tag based on Benoit's comments.
* tag 'omap-for-v3.10/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (69 commits)
ARM/dts: OMAP3: fix pinctrl-single configuration
ARM: dts: Add OMAP3430 SDP NOR flash memory binding
ARM: dts: Add NOR flash bindings for OMAP2420 H4
ARM: dts: Update OMAP3430 SDP NAND and ONENAND properties
ARM: dts: OMAP2+: Identify GPIO banks that are always powered
ARM: OMAP2+: Populate DMTIMER errata when using device-tree
ARM: dts: OMAP2+: Update DMTIMER compatibility property
ARM: OMAP: Add function to request timer by node
ARM: OMAP: Force dmtimer restore if context loss is not detectable
ARM: OMAP: Simplify dmtimer context-loss handling
ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node
ARM: dts: OMAP4460: Add CPU OPP table
ARM: dts: omap4-panda: move generic sections to panda-common
ARM: dts: OMAP443x: Add CPU OPP table
ARM: dts: OMAP3: use twl4030 vdd1 regulator for CPU
ARM: dts: OMAP36xx: Add CPU OPP table
ARM: dts: OMAP34xx/35xx: Add CPU OPP table
Documentation: dt: gpio-omap: Move interrupt-controller from #interrupt-cells description
ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc
ARM: OMAP2+: hwmod: extract module address space from DT blob
...
Olof Johansson [Thu, 11 Apr 2013 11:02:34 +0000 (04:02 -0700)]
Merge branch 'omap/fixes-non-critical' into next/dt2
Merging in dependencies for the omap/dt branch.
* omap/fixes-non-critical:
ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
ARM: OMAP: fix typo "CONFIG_SMC91x_MODULE"
ARM: OMAP5: clock: No Freqsel on OMAP5 devices too
ARM: OMAP5: Make errata i688 workaround available
ARM: OMAP5: Update SAR memory layout for WakeupGen
ARM: OMAP5: Update SAR RAM base address
ARM: OMAP5: Reuse prm read_inst/write_inst
ARM: OMAP5: prm: Allow prm init to succeed
ARM: OMAP5: timer: Update the clocksource name as per clock data
ARM: OMAP5: Update SOC id detection code for ES2
Merge tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt2
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: device tree changes
This branch contains the majority of the device tree changes for Tegra.
Highlights include:
* Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
* Adding or enabling suspend wakeup sources on many boards, and adding
suspend timing parameters, to support the system suspend patches.
* Adding clocks to the audio-related nodes, so that in 3.11, the audio
driver can pull these clocks from device tree rather than hard-coding
clock names.
* Some small DT fixes/cleanup.
This branch is based on the previous clk pull request.
* tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits)
clk: tegra: Fix cdev1 and cdev2 IDs
ARM: dts: tegra: add the PM configurations of PMC
ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
ARM: tegra: whistler: add wakeup source for KBC
ARM: tegra: add power gpio keys to DT
ARM: tegra: keep power on to SD slot on Dalmore
ARM: tegra: add clocks property to AC'97 sound nodes
ARM: tegra: add clocks property to sound nodes
ARM: tegra: dalmore: add fixed regulator node
ARM: tegra: dalmore: add TPS65090 node
ARM: tegra: dalmore: add cpu regulator node
ARM: tegra: Add sbs-battery node to Dalmore
ARM: tegra: add DT binding for i2c-tegra
ARM: tegra: add SPI nodes to Tegra114 DT
ARM: tegra: add KBC nodes to Tegra114 DT
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
ARM: tegra: add I2C nodes to Tegra114 DT
ARM: tegra: add APB DMA nodes to Tegra114 DT
ARM: tegra: add PWM nodes to Tegra114 DT
ARM: tegra: fix the status of PWM DT nodes
...
Merge tag 'mxs-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt2
From Shawn Guo <shawn.guo@linaro.org>:
The mxs device tree changes for 3.10:
* Move enet_out clk into device tree and have fec driver handle it.
* Convert mxsfb driver to generic display timings bindings, and remove
the mxsfb auxdata from platform code.
* Add generic DMA device tree binding for mxs-dma, and convert the most
of client device drivers to it.
* Change mxsfb driver to use regulator for controlling power of panel.
* A few device tree source updates
* tag 'mxs-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (23 commits)
video: mxsfb: Introduce regulator support
ARM: dts: cfa10036: Add touchscreen support to the CFA-10049
ARM: dts: imx23-olinuxino: mark sdcard cd as broken
serial: mxs-auart: move to use generic DMA helper
mtd: gpmi: move to use generic DMA helper
i2c: i2c-mxs: move to use generic DMA helper
spi: mxs-spi: move to use generic DMA helper
mmc: mxs-mmc: move to use generic DMA helper
dma: mxs-dma: move to generic device tree binding
dma: mxs-dma: use devm_* managed functions
ARM: dts: add generic DMA device tree binding for mxs-dma
pinctrl: pinctrl-mxs: document the missing pull-ups
ARM: cfa10036: add one wire bitbanging to the cfa10049
video: mxsfb: remove mxsfb_platform_data
ARM: mxs: move display timing configurations into device tree
video: mxsfb: get display timings from device tree
video: mxsfb: remove dotclk_delay from platform_data
video: mxsfb: remove fb_phys/fb_size from platform_data
video: mxsfb: use devm_* managed functions
ARM: mxs: remove unneeded enet_out clk initialization
...
Jon Hunter [Mon, 8 Apr 2013 01:17:06 +0000 (20:17 -0500)]
ARM: dts: Update OMAP3430 SDP NAND and ONENAND properties
The GPMC timing properties for device-tree have been updated by adding
a "-ns" or "-ps" suffix to indicate the units of time the property
represents (as suggested by Rob Herring). Therefore, update the timing
property names for the OMAP3430 SDP NAND and ONENAND devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Tue, 19 Mar 2013 17:38:19 +0000 (12:38 -0500)]
ARM: OMAP2+: Populate DMTIMER errata when using device-tree
Currently the DMTIMER errata flags are not being populated when using
device-tree. Add static platform data to populate errata flags when
using device-tree.
Please note that DMTIMER erratum i767 is applicable to OMAP3-5 devices
as well as AM335x devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Update the DMTIMER compatibility property to reflect the register level
compatibilty between devices and update the various OMAP/AM timer
bindings with the appropriate compatibility string.
By doing this we can add platform specific data applicable to specific
timer versions to the driver. For example, errata flags can be populated
for the timer versions that are impacted.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Tue, 19 Mar 2013 17:38:17 +0000 (12:38 -0500)]
ARM: OMAP: Add function to request timer by node
Add a function so that OMAP dmtimers can be requested by device-tree
node. This allows for devices, such as the internal DSP, or drivers,
such as PWM, to reference a specific dmtimer node via the device-tree.
Given that there are several APIs available for requesting dmtimers
(by ID, by capability or by node) consolidate the code for all these
functions into a single helper function that can be used by these
request functions.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Tue, 19 Mar 2013 17:38:16 +0000 (12:38 -0500)]
ARM: OMAP: Force dmtimer restore if context loss is not detectable
When booting with device-tree the function pointer for detecting context
loss is not populated. Ideally, the pm_runtime framework should be
enhanced to allow a means for reporting context/state loss and we could
avoid populating such function pointers altogether. In the interim until
a generic non-device specific solution is in place, force a restore of
the dmtimer when enabling the timer.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
NeilBrown [Tue, 19 Mar 2013 17:38:15 +0000 (12:38 -0500)]
ARM: OMAP: Simplify dmtimer context-loss handling
The context loss handling in dmtimer appears to assume that
omap_dm_timer_set_load_start() or omap_dm_timer_start() and
omap_dm_timer_stop() bracket all interactions. Only the first two
restore the context and the last updates the context loss counter.
However omap_dm_timer_set_load() or omap_dm_timer_set_match() can
reasonably be called outside this bracketing, and the fact that they
call omap_dm_timer_enable() / omap_dm_timer_disable() suggest that
is expected.
So if, after a transition into and out of off-mode which would cause
the dm timer to loose all state, omap_dm_timer_set_match() is called
before omap_dm_timer_start(), the value read from OMAP_TIMER_CTRL_REG
will be 'wrong' and this wrong value will be stored context.tclr so
a subsequent omap_dm_timer_start() can fail (As the control register
is wrong).
Simplify this be doing the restore-from-context in
omap_dm_timer_enable() so that whenever the timer is enabled, the
context is correct. Also update the ctx_loss_count at the same time as
we notice it is wrong - these is no value in delaying this until the
omap_dm_timer_disable() as it cannot change while the timer is enabled.
Signed-off-by: NeilBrown <neilb@suse.de>
[jon-hunter@ti.com: minor update to subject and changed variable name] Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Philip Avinash [Fri, 1 Feb 2013 05:37:27 +0000 (11:07 +0530)]
ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node
DT field of "interrupts" was mentioned wrongly as "interrupt" in SPI
node. This went unnoticed as spi-omap2 driver not making use of
interrupt. Fixes the typo.
Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Nishanth Menon [Tue, 19 Mar 2013 17:53:08 +0000 (12:53 -0500)]
ARM: dts: OMAP4460: Add CPU OPP table
Add DT OPP table for OMAP4460 family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp4xxx_data.c
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp4xxx_data.c.
Nishanth Menon [Tue, 19 Mar 2013 17:53:07 +0000 (12:53 -0500)]
ARM: dts: omap4-panda: move generic sections to panda-common
PandaBoard, PandaBoard-A4 revisions use OMAP4430.
PandaBoard-ES version of the board uses OMAP4460.
Move the original panda dts file into a common dtsi used by all panda
variants. This allows us to introduce SoC variation for PandaBoard ES
without impacting other PandaBoard versions that are supported.
As part of this change, since OMAP4460 adds on to OMAP4430, add
omap4.dtsi to omap4460.dtsi.
Nishanth Menon [Tue, 19 Mar 2013 17:53:06 +0000 (12:53 -0500)]
ARM: dts: OMAP443x: Add CPU OPP table
Add DT OPP table for OMAP443x family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp4xxx_data.c
Since the omap4460 OPP tables would be different from OMAP443x,
introduce an new omap443x.dtsi for 443x specific entries and use
existing omap4.dtsi as the common dtsi file for all OMAP4 platforms.
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp4xxx_data.c.
Nishanth Menon [Tue, 19 Mar 2013 17:53:05 +0000 (12:53 -0500)]
ARM: dts: OMAP3: use twl4030 vdd1 regulator for CPU
Define VDD1 regulator in twl4030 DT and mark it as the supply for the
various OMAP34xx/35xx/36xx/37xx platforms (all use TWL4030 variants with
VDD1 supplying the CPU).
NOTE: This currently will use I2C1 bus communication path to set the
voltage in device tree boot. In the legacy non device tree boot, we
continue to use twl-common.c which bypasses I2C1 bus communication path
and uses I2C4 bus path using OMAP voltage libraries. We should
eventually be able to use I2C4 path once we have voltage regulator for
OMAP which is capable of using the voltage controller/voltage processor
IP blocks.
Nishanth Menon [Tue, 19 Mar 2013 17:53:04 +0000 (12:53 -0500)]
ARM: dts: OMAP36xx: Add CPU OPP table
Add DT OPP table for OMAP36xx/37xx family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp3xxx_data.c
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp3xxx_data.c.
Nishanth Menon [Tue, 19 Mar 2013 17:53:03 +0000 (12:53 -0500)]
ARM: dts: OMAP34xx/35xx: Add CPU OPP table
Add DT OPP table for OMAP34xx/35xx family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp3xxx_data.c
Since the omap36xx OPP tables would be different from OMAP34xx/35xx,
introduce an new omap34xx.dtsi for 34xx/35xx specific entries and use
existing omap3.dtsi as the common dtsi file for all OMAP3 platforms.
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp3xxx_data.c.
Documentation: dt: gpio-omap: Move interrupt-controller from #interrupt-cells description
The binding documentation for the OMAP GPIO controller has the
"#interrupt-cells" property listed before "#interrupt-controller"
property but its description after.
This is confusing so we move "#interrupt-cells" after the
"interrupt-controller" property so is followed by its description.
While being there, change the properties order to be consistent with
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
and Documentation/devicetree/bindings/gpio/gpio.txt.
According with these docs, the order of the properties for a gpio-omap
device node should be:
ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc
OMAP hwmod layer does the reset of the IPs in early code so that
we have SOC in sane state. To do the soft-reset, it needs to ioremap()
the IP address space to be able to write to sysconfig registers.
But there are few hwmod which doesn't have sysconfig registers and hence
no need to ioremap() them in early init code.
Prevent calling the _init_mpu_rt_base() conditional based on sysc
availability.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt
number for the L3 interrupts to account for per processor interrupts (PPI)
and software generated interrupts (SGI) which typically are mapped to the
first 32 interrupts in the ARM GIC. This is not necessary because the first
parameter of the ARM GIC interrupt property specifies the GIC interrupt
type (ie. SGI, PPI, etc). Hence, fix the interrupt number for the L3
interrupts by substracting 32] Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
ARM: dts: omap5-evm: Update available memory to 2032 MB
On OMAP5 to detect invalid/bad memory accesses, 16MB of DDR is used as a trap.
Hence available memory for linux OS is 2032 MB on boards popullated with 2 GB
memory.
Anil Kumar [Sat, 16 Mar 2013 09:59:21 +0000 (15:29 +0530)]
ARM: dts: Add minimal DT support for DevKit8000
DevKit8000 is a beagle board clone from Timll, sold by
armkits.com. The DevKit8000 has RS232 serial port, LCD, DVI-D,
S-Video, Ethernet, SD/MMC, keyboard, camera, SPI, I2C, USB and
JTAG interface.
Add the basic DT support for devkit8000. It includes:
- twl4030 (PMIC)
- MMC1
- I2C1
- leds
Jon Hunter [Fri, 11 Jan 2013 16:39:22 +0000 (16:39 +0000)]
ARM: dts: OMAP3: Add support for OMAP3430 SDP board
Adds basic device-tree support for OMAP3430 SDP board which has 256MB
of RAM, 128MB ONENAND flash, 256MB NAND flash and uses the TWL4030
power management IC.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The OMAP gpio binding documention [1] states that the #interrupts-cells
property for gpio controllers should be 2. Currently, for OMAP3+ devices
the #interrupt-cells is set to 1. By setting this property to 2, it
allows clients to pass a 2nd parameter indicating the sensitivity (level
or edge) and polarity (high or low) of the interrupt. The OMAP gpio
controllers support these options and so update the #interrupt-cells
property for OMAP3+ devices to 2.
Jon Hunter [Thu, 26 Apr 2012 18:47:59 +0000 (13:47 -0500)]
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes
Add SDMA controller binding for OMAP2+ devices and populate DMA client
information for SPI and MMC peripheral on OMAP3+ devices. Please note
that OMAP24xx devices do not have SPI and MMC bindings available yet and
so DMA client information is not populated.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Thu, 18 Oct 2012 14:28:52 +0000 (09:28 -0500)]
ARM: dts: OMAP2+: Add PMU nodes
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
OMAP4430. The node for OMAP4430 is not included because PMU is not
currently supported on OMAP4430 due to the absence of a cross-trigger
interface driver.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Fri, 19 Oct 2012 19:27:34 +0000 (14:27 -0500)]
ARM: OMAP2+: Prepare for device-tree PMU support
If device-tree is present, then do not create the PMU device from within
the OMAP specific PMU code. This is required to allow device-tree to
create the PMU device from the PMU device-tree node.
PMU is not currently supported for OMAP4430 (due to a dependency on
having a cross-trigger interface driver) and so ensure that this
indicated on boot with or without device-tree.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Add dwc3 omap glue data to the omap5 dt data file.
The information about the dt node added here is available @
Documentation/devicetree/bindings/usb/omap-usb.txt.
Also added dwc3 core dt data as a subnode to dwc3 omap glue
data in omap5 dt data file.
The information for the entered data node is available @
Documentation/devicetree/bindings/usb/dwc3.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards
Add usb otg data node in omap4/omap3 device tree file. Also update
the node with board specific setting in omapx-<board>.dts file.
The dt data specifies among others the interface type (ULPI or UTMI),
mode which is mostly OTG, power that specifies the amount of power
this can supply when in host mode.
The information about usb otg node is available @
Documentation/devicetree/bindings/usb/omap-usb.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Add omap-usb2 data node in omap4 device tree file. Since omap-usb2
is connected to ocp2scp, omap-usb2 dt data is added as a child node
of ocp2scp. The information about this data node is availabe @
Documentation/devicetree/bindings/usb/usb-phy.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Add omap control usb data in omap4 device tree file. This will have the
register address of registers to power on the PHY and to write to
mailbox. The information about this data node is available @
Documentation/devicetree/bindings/usb/omap-usb.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
ARM: dts: OMAP3: reduce GPMC mapped registers address space
Currently the OMAP General-Purpose Memory Controller (GPMC) device
node maps 16 MB of address space for its hardware registers.
This is because the OMAP Technical Reference Manual says that the
GPMC module register address space size is 16 MB. But in practice
the maximum address offset used by a GPMC register is 0x02d0.
So, there is no need to map such a big address space for GPMC regs.
Sourav Poddar [Wed, 13 Feb 2013 09:28:30 +0000 (14:58 +0530)]
ARM: dts: omap4-panda: Add I2c pinctrl data
Booting 3.8-rc6 on omap4 panda results in the following error
[ 0.444427] omap_i2c 48070000.i2c: did not get pins for i2c error: -19
[ 0.445770] omap_i2c 48070000.i2c: bus 0 rev0.11 at 400 kHz
[ 0.473937] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
[ 0.474670] omap_i2c 48072000.i2c: bus 1 rev0.11 at 400 kHz
[ 0.474822] omap_i2c 48060000.i2c: did not get pins for i2c error: -19
[ 0.476379] omap_i2c 48060000.i2c: bus 2 rev0.11 at 100 kHz
[ 0.477294] omap_i2c 48350000.i2c: did not get pins for i2c error: -19
[ 0.477996] omap_i2c 48350000.i2c: bus 3 rev0.11 at 400 kHz
[ 0.483398] Switching to clocksource 32k_counter
This happens because omap4 panda dts file is not adapted to use i2c through
pinctrl framework. Populating i2c pinctrl data to get rid of the error.
Sourav Poddar [Wed, 13 Feb 2013 09:28:22 +0000 (14:58 +0530)]
ARM: dts: omap5-evm: Add I2c pinctrl data
Booting 3.8-rc6 on omap 5430evm results in the following error
omap_i2c 48070000.i2c: did not get pins for i2c error: -19
[ 1.024261] omap_i2c 48070000.i2c: bus 0 rev0.12 at 100 kHz
[ 1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
[ 1.037384] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz
[ 1.043762] omap_i2c 48060000.i2c: did not get pins for i2c error: -19
[ 1.050964] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz
[ 1.056823] omap_i2c 4807a000.i2c: did not get pins for i2c error: -19
[ 1.064025] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz
This happens because omap5 dts file is not adapted to use i2c through pinctrl
framework. Populating i2c pinctrl data to get rid of the error.
Sourav Poddar [Wed, 13 Feb 2013 09:28:12 +0000 (14:58 +0530)]
ARM: dts: omap4-sdp: Add I2c pinctrl data
Booting 3.8-rc6 on omap 4430sdp results in the following error
omap_i2c 48070000.i2c: did not get pins for i2c error: -19
[ 1.024261] omap_i2c 48070000.i2c: bus 0 rev0.12 at 100 kHz
[ 1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
[ 1.037384] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz
[ 1.043762] omap_i2c 48060000.i2c: did not get pins for i2c error: -19
[ 1.050964] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz
[ 1.056823] omap_i2c 4807a000.i2c: did not get pins for i2c error: -19
[ 1.064025] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz
This happens because omap4 dts file is not adapted to use i2c through pinctrl
framework. Populating i2c pinctrl data to get rid of the error.
AnilKumar Ch [Wed, 14 Nov 2012 18:08:25 +0000 (23:38 +0530)]
ARM: dts: AM33XX: Add memory resource to d_can node
Add a new address space/memory resource to d_can device tree node. D_CAN
RAM initialization is achieved through RAMINIT register which is part of
AM33XX control module address space. D_CAN RAM init or de-init should be
done by writing instance corresponding value to control module register.
Till we have a separate control module driver to write to control module,
d_can driver will handle the register writes to control module by itself.
So a new address space to represent this control module register is added
to d_can driver.
AnilKumar Ch [Wed, 14 Nov 2012 18:08:24 +0000 (23:38 +0530)]
ARM: dts: AM33XX: Add d_can instances to aliases
Add d_can instances to aliases node to get the D_CAN instance number
from the driver. To initialize D_CAN message RAM, corresponding instance
number is required.
To initialize instance 0 message RAM then 0x1 should be written and for
instance 1 message RAM, 0x2 should be written to control module register.
With device-tree framework ip instance number is "-1" by default for all
instances. To get device id/instance number then modules should be added
to DT "aliases" node. of_alias_get_id() gives the device id number based
on number of alias nodes present in "aliases node".
Instead of using a custom binding for retrieving the GPIO that activates the
LCD from devicetree, use a standard regulator.
This approach has the advantage to be more generic.
For example: in the case of a board that has a PMIC supplying the LCD voltage,
the current approach would not work, as it only searches for a GPIO pin.
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Wed, 3 Apr 2013 11:31:48 +0000 (19:31 +0800)]
ARM: tegra: add power gpio keys to DT
This adds the power gpio key to DT and enable the wakeup of the gpio key
for the device. The Seaboard and paz00 already had the power gpio key
binding and the power key of Whistler was on KBC. So these boards' device
tree didn't include in this patch.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 28 Mar 2013 19:22:30 +0000 (13:22 -0600)]
ARM: tegra: keep power on to SD slot on Dalmore
Set "regulator-always-on" for the SD slot on Dalmore, so that SD cards
work. This used to work, since this regulator is on by default, but was
broken by commit "ARM: tegra: dalmore: add TPS65090 node", since that
didn't specify always-on for this regulator.
In the long run, the regulators should all be hooked up to the SDHCI
device nodes. However, we haven't done that for any of the Tegra boards
yet, so to be consistent, this patch simply forces the regulator on,
rather than hooking it up and making it work differently to other boards.
Reported-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 28 Mar 2013 18:11:30 +0000 (12:11 -0600)]
ARM: tegra: add clocks property to AC'97 sound nodes
Audio-related clocks need to be represented in the device tree. Update
bindings to describe which clocks are needed, and DT files to include
those clocks.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 26 Mar 2013 22:45:52 +0000 (16:45 -0600)]
ARM: tegra: add clocks property to sound nodes
Audio-related clocks need to be represented in the device tree. Update
bindings to describe which clocks are needed, and DT files to include
those clocks.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Thu, 21 Mar 2013 13:47:41 +0000 (19:17 +0530)]
ARM: tegra: dalmore: add TPS65090 node
NVIDIA's Tegra114 reference platform, Dalmore, uses the TPS65090 as
secondary PMICs which is mainly act as voltage switch regulator
controlled by i2c communication.
Add DT node for TPS65090.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: remove unit-address from node name since it's unique already] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Rhyland Klein [Wed, 20 Mar 2013 15:31:32 +0000 (11:31 -0400)]
ARM: tegra: Add sbs-battery node to Dalmore
This patch adds the node for the bq20z45 I2C gas gauge which is
compatible with the sbs-battery power supply driver.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
[swarren: remove unit-address from node name since it's unique already] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 13 Mar 2013 19:49:52 +0000 (01:19 +0530)]
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
Add APB DMA requestor and serial aliases for serial controller.
There are two serial drivers i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.
The simple serial driver is selected by compatible value
"nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based
driver is selected by compatible value "nvidia,tegra114-hsuart",
"nvidia,tegra30-hsuart".
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 13 Mar 2013 19:49:51 +0000 (01:19 +0530)]
ARM: tegra: add I2C nodes to Tegra114 DT
NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the
following changes which makes incompatible with previous hardware:
- Single clock source to I2C controller.
- Interrupt support for per packet transfer.
Add DT entry for I2C controllers and make it compatible with
"nvidia,tegra114-i2c".
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 13 Mar 2013 19:49:50 +0000 (01:19 +0530)]
ARM: tegra: add APB DMA nodes to Tegra114 DT
NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".
Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in Tegra114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.