Paul Walmsley [Wed, 19 May 2010 02:24:06 +0000 (20:24 -0600)]
OMAP2 clock: fix recursive spinlock attempt when CONFIG_CPU_FREQ=y
The OMAP2 MPU virtual clock node code attempted to call clk_get_rate()
while the clockfw_lock spinlock was held. Fix by reading the sys_ck
rate directly.
Rajendra Nayak [Wed, 19 May 2010 02:24:03 +0000 (20:24 -0600)]
OMAP4 powerdomain: Support LOWPOWERSTATECHANGE for powerdomains
Some powerdomains in OMAP4 support a direct transition from one sleep
state to another deeper sleep state without having to wakeup the
powerdomain. This patch adds an api in the powerdomain framework to
set the LOWPOWERSTATECHANGE bit in PWRSTCTRL register.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak [Wed, 19 May 2010 02:24:01 +0000 (20:24 -0600)]
OMAP4 powerdomain: Fix pwrsts flags for ALWAYS ON domains
The pwrsts flag for ALWAYS ON domains like always_on_core_pwrdm
and wkup_pwrdm is wrongly populated with the define for a
powerdomain power state, instead of the allowable state
bitfields.
This causes a few api's to fail sensing invalid pwrst
requested.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak [Wed, 19 May 2010 02:24:00 +0000 (20:24 -0600)]
OMAP: timers: Fix clock source names for OMAP4
The clock sources for timers on OMAP4 (system clock and 32k
clock) have their names wronly populated.
This patch fixes them so the omap_dm_timer_set_source
does not fail anymore.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak [Thu, 20 May 2010 18:31:12 +0000 (12:31 -0600)]
OMAP4: PRCM: Add offset defines for all CM registers
The cm44xx.h files only had absolute register address
defines for all CM registers.
This patch adds additional register offset defines for all the
registers, so they can be used with apis like cm_read_mod_*
Rajendra Nayak [Thu, 20 May 2010 18:31:12 +0000 (12:31 -0600)]
OMAP4: PRCM: Add offset defines for all PRM registers
The prm44xx.h files only had absolute register address
defines for all PRM registers.
This patch adds additional register offset defines for all the
registers, so they can be used with apis like prm_read_mod_*
Benoit Cousson [Thu, 20 May 2010 18:31:11 +0000 (12:31 -0600)]
OMAP4: PRM: Remove MPU internal code name and apply PRCM naming convention
The MPU subsystem was named based on internal code name (CHIRON).
This patch will remove all the occurences of the chiron name
are replace it with PRCM_MPU in order to differentiate
the MPU local PRCM to the global one.
Remove PDA_ from PRCM_MPU registers names to stick to the global
PRM naming convention.
Benoit Cousson [Thu, 20 May 2010 18:31:11 +0000 (12:31 -0600)]
OMAP4: CM: Remove non-functional registers in ES1.0
The automatic HW restore from OFF mode is not functional at all in
OMAP4430 ES1.0.
Because of that, it will be extensively changed in the next Si revision,
and the compatibilty will not be maintained with ES1.0.
Remove the current XXX_RESTORE registers definition to avoid future
conflicts with the next Si revision.
Benoit Cousson [Thu, 20 May 2010 18:31:10 +0000 (12:31 -0600)]
OMAP: hwmod: Replace WARN by pr_warning for clockdomain check
Most of the clock nodes belong to a clock domain, but it is perfectly valid
to have clock without clock domain.
Root clocks for example does not belong to any clock domain.
Keep the warning but reduce the verbosity.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:10 +0000 (12:31 -0600)]
OMAP: hwmod: Do not exit the iteration if one clock init failed
During the _init_clocks phase, the iteration is stopped but the
status is still change from _HWMOD_STATE_REGISTERED to
_HWMOD_STATE_CLKS_INITED.
Since the _setup phase will be done nevertheless, it might be
better to keep initializing the others clocks nodes and just
keep the warning.
It is much easier to debug when a important number of clocks
name are wrong during the early debug phase of a new platform.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:09 +0000 (12:31 -0600)]
OMAP: hwmod: Remove IS_ERR check with omap_clk_get_by_name return value
The previous clock API was returning a standard linux error code in
case of failure. This is not the case anymore with the new
omap_clk_get_by_name API. A NULL value means that the clock node
does not exist.
Replace all the IS_ERR check by a !clk check.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:09 +0000 (12:31 -0600)]
OMAP: hwmod: Fix wrong pointer iteration in oh->slaves
The iteration is currently done on the omap_hwmod_ocp_if pointer
and not on the table pointer that reference them.
It worked most of the time because the structure are contiguous in
memory.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:09 +0000 (12:31 -0600)]
OMAP4: hwmod: Replace OCPIF_HAS_IDLEST by HWMOD_NO_IDLEST
Some initiator modules in OMAP2 & 3 does not have IDLEST bit,
in that case we cannot detect the module readiness by
polling that bit and must exist the function immediately
assuming that the module is ready.
The previous flag was affected to the OCP interface. While it is
technically true that the idlest is related to the L4 slave
interface of the module, the PRCM status belong to the module.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:08 +0000 (12:31 -0600)]
OMAP4: hwmod & CM: Implement the omap4_cm_wait_module_ready function
The return of the omap4_cm_wait_module_ready function is checked
in order to avoid accessing the sysconfig register if the module is
not in the correct state.
In that case the _setup will exit without trying to reset
using sysconfig.
For the moment a warning is printed. A proper management of fclk
and module reset will have to be done in order to init correctly
the problematic IPs listed below.
<4>omap_hwmod: ivahd: cannot be enabled (3)
<4>omap_hwmod: iss: cannot be enabled (3)
<4>omap_hwmod: tesla: cannot be enabled (3)
<4>omap_hwmod: sdma: cannot be enabled (3)
<4>omap_hwmod: sl2: cannot be enabled (3)
<4>omap_hwmod: sad2d: cannot be enabled (3)
<4>omap_hwmod: ducati: cannot be enabled (3)
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:08 +0000 (12:31 -0600)]
OMAP: CM: Move MAX_MODULE_READY_TIME to cm.h
The maximum timeout to wait for the PRCM to request that a module
exit idle or reach functionnal state is common to OMAP2/3/4 SoCs,
so, move it to the chip family-common cm.h include file.
Reduce the timeout from 20 ms to 2 ms.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Accessing the clkctrl register using offset of module & device is hard
to do in OMAP4 due to the way the CM1, CM2, PRM and PRCM_MPU are located
in the address space. There is no common base address anymore for all the
CM registers.
The easiest way to handle that on OMAP4 is to provide the absolute address
of the XXX_CLKCTRL register per hwmod.
Paul Walmsley [Wed, 19 May 2010 00:40:26 +0000 (18:40 -0600)]
OMAP3 clock: remove unnecessary duplicate of dpll4_m2_ck, added for 36xx
Commit 678bc9a2eabb7f444ef8ad1cfc5ef394e2bd8bf2 split dpll4_m2_ck,
creating a 34xx and a 36xx variant, to handle the additional 16
divider steps provided on the 36xx. This in turn required dynamic
rewriting of the clock tree during initialization, which is
undesirable. All this seems to be unnecessary, though, since the
additional 16 divider steps can simply be marked with RATE_IN_36XX.
This patch does so and re-merges the affected structures.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
Paul Walmsley [Wed, 19 May 2010 00:40:25 +0000 (18:40 -0600)]
OMAP3 clock: rename RATE_IN_343X, RATE_IN_3430ES2 to match reality
Rename the RATE_IN_343X clksel_rate.rate flag to be RATE_IN_3XXX, to reflect
that these rates are valid on all OMAP3 platforms, not just 343X.
Also rename the RATE_IN_OMAP3430ES2 clksel_rate.rate flag to be
RATE_IN_OMAP3430ES2PLUS, to reflect that these flags are valid on all
OMAP3 platforms after 3430ES2.
This patch should not result in any functional changes.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com>
Paul Walmsley [Wed, 19 May 2010 00:40:24 +0000 (18:40 -0600)]
OMAP2+ clock: remove DEFAULT_RATE clksel_rate flag
The DEFAULT_RATE clksel_rate flag is essentially useless. It was set
on some of the lowest divisors, which, when switching to a much
higher-rate parent, could have potentially resulted in rates that
exceeded the hardware specifications for downstream clocks in the
window between the clk_set_parent(), and a subsequent clk_set_rate().
It seems much safer to just remove the flag and always use the highest
available divisor (resulting in the lowest possible rate) after the
switch, and this patch does so.
Ideally, it would be best to first attempt to switch to a divisor that
matches the clock's rate with the previous parent, if at all possible.
But that is a project for some other day or some other person. The
parent changing code is rarely used.
Paul Walmsley [Wed, 19 May 2010 00:40:23 +0000 (18:40 -0600)]
OMAP3: PM: PM_MPUGRPSEL writes should use GRPSEL macros, not EN macros
Writes to the PM_*GRPSEL registers should use _GRPSEL_ macros, not _EN_ macros,
to match the TRM and guard against inadvertent error. This patch should
not cause any functional change.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
Paul Walmsley [Wed, 19 May 2010 00:40:23 +0000 (18:40 -0600)]
OMAP2+ PRCM: convert remaining PRCM macros to the _SHIFT/_MASK suffixes
Fix all of the remaining PRCM register shift/bitmask macros that did not
use the _SHIFT/_MASK suffixes to use them. This makes the use of these
macros consistent. It is intended to reduce error, as code can be inspected
visually by reviewers to ensure that bitshifts and bitmasks are used in
the appropriate places.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Paul Walmsley [Wed, 19 May 2010 00:47:24 +0000 (18:47 -0600)]
OMAP3 PRCM: convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes
Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that
did not use the _SHIFT/_MASK suffixes to use them. This makes the use
of these macros consistent. It is intended to reduce error, as code
can be inspected visually by reviewers to ensure that bitshifts and
bitmasks are used in the appropriate places.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Paul Walmsley [Thu, 20 May 2010 18:31:04 +0000 (12:31 -0600)]
OMAP2 PRCM: convert OMAP2 PRCM macros to the _SHIFT/_MASK suffixes
Fix all of the remaining OMAP2 PRCM register shift/bitmask macros that
did not use the _SHIFT/_MASK suffixes to use them. This makes the use
of these macros consistent. It is intended to reduce error, as code
can be inspected visually by reviewers to ensure that bitshifts and
bitmasks are used in the appropriate places.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Anand Gadiyar [Thu, 13 May 2010 05:32:27 +0000 (05:32 +0000)]
omap3: update omap3_defconfig
- Update the omap3_defconfig to sync up with the generated .config
- Increase CONFIG_LOG_BUF_SHIFT to 16 to allow the entire
boot log to be captured
(useful when using boot time tracer, for example)
Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
kishore kadiyala [Sat, 15 May 2010 18:21:25 +0000 (18:21 +0000)]
omap4: Adding PBIAS Configuration for MMC1 Controller
In OMAP4, MMC1 PBIAS and its associated IO is software-controlled
by CONTROL_PBIAS and CONTROL_MMC1 registers. This patch adds PBIAS
configuration for MMC1 Controller during power-ON and power-OFF
of regulator.
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Balaji T K [Wed, 12 May 2010 08:27:31 +0000 (08:27 +0000)]
omap4: Enable RTC and regulator support
This patch enables RTC and regulator support on omap4430 sdp
platform. Also sync up the defconfig with latest kernel
Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
omap4: Add i2c board support on omap4430 sdp platform
This patch adds the i2c board support for OMAP4430 SDP platform.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
stanley.miao [Thu, 13 May 2010 12:39:29 +0000 (12:39 +0000)]
AM3517: rename the i2c boardinfo to make it more readable
There are three i2c buses on am3517, and each i2c bus has several devices
on it, so we can't name the i2c boardinfo structures with one of these
devices. In order to make it more readable, now rename these three boardinfo
structures based on i2c indexes.
This patch moves OMAP4 soc specific code from 4430sdp board file.
The change is necessary so that newer board support can be added
with minimal changes. This will be also problematic for
multi-board, multi-omap builds.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
stanley.miao [Thu, 13 May 2010 12:39:30 +0000 (12:39 +0000)]
omap: init the gpio pinmux for mmc
There is two gpio for mmc use, one is for card detecting, another is
used for checking write protect. Intialize its pinmux in case the bootloader
doesn't set it.
Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Mika Westerberg [Fri, 14 May 2010 19:05:25 +0000 (12:05 -0700)]
OMAP2/3/4: DMA: disable channel interrupts in omap_init_dma()
If we are softbooting another kernel using kexec, DMA controller state is not
known when we are performing omap_init_dma(). It is possible that some DMA
channels are already active. For example after kexec we get:
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
To prevent any weird things happening, we disable all channel interrupts during
init.
Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Jarkko Nikula [Mon, 10 May 2010 21:29:19 +0000 (14:29 -0700)]
omap: rx51: Add supplies for the tlv320aic3x codec driver
Upcoming change to tlv320aic3x codec driver require four supplies.
Implement this by connecting analogic supplies to TWL4030 VMMC2 and digital
supplies to TWL4030 VIO.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Cc: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Jarkko Nikula [Mon, 10 May 2010 21:29:18 +0000 (14:29 -0700)]
omap: rx51: Change the TWL4030 VMMC2 voltage constraints andsupply name
I believe the VMMC2 constraints must be the same than with VAUX3. Older
boards are using TWL4030 VMMC2 supply for internal MMC whereas newer are
using VAUX3 that has more limited constraints defined in this same file.
More over, the VMMC2 supply is used also for analog audio domain and the
miminum analog voltage of the TLV320AIC34 codec is 2.7 V.
To combine these two facts, the patch changes supply name to V28_A as the
newer boards register VMMC2_30 for VAUX3 and uses the same constraints than
VAUX3 since those constraints are ok for the TLV320AIC34.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Cc: Adrian Hunter <adrian.hunter@nokia.com> Cc: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Sriram [Mon, 10 May 2010 21:29:17 +0000 (14:29 -0700)]
OMAP3: clock data: Update name string for EMAC clocks
The emac driver currently uses Davinci clock names for the module and phy
clocks. Updated the omap3xxx_clks table to match the names
used by the Davinci emac driver.
Note that eventually the EMAC clocks should be renamed to be generic.
Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated patch description to match the patch] Signed-off-by: Tony Lindgren <tony@atomide.com>
The patch provides the following ams_delta_defconfig updates:
- explicitly select preemptable RCU,
- replace outdated CONFIG_LBD and CONFIG_LSF options with CONFIG_LBDAF,
- activate support for LCD contrast setting (new in 2.6.34),
- turn off verbose bug reporting for smaller kernel.
Created and tested against linux-2.6.34-rc3.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
Hiroshi DOYU [Thu, 6 May 2010 15:24:04 +0000 (18:24 +0300)]
omap iommu: Reject unaligned addresses at setting page table entry
This rejects unaligned device virtual address('da') and physical
address('pa') and informs error to caller when a page table entry is
set. Otherwise, a wrong address can be used by IO device.
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: Hari Kanigeri <h-kanigeri2@ti.com>
Hiroshi DOYU [Thu, 6 May 2010 13:10:18 +0000 (16:10 +0300)]
omap iommu: Insert a gap page between IOVMAs against override
Inserting a gap page between IOVMAs could detect an override on other
IOVMA with iommu fault. This was originally suggested by Sakari Ailus
and based on the work and comment by David Cohen.
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: David Cohen <david.cohen@nokia.com> Cc: Sakari Ailus <Sakari.Ailus@nokia.com>
Kevin Hilman [Tue, 27 Jan 2009 19:09:24 +0000 (11:09 -0800)]
OMAP2/3: GPIO: generalize prepare for idle
Currently, the GPIO 'prepare' hook is only called when going to
off-mode, while the function is called 'prepare_for_retention.' This
patch renames the function to 'prepare_for_idle' and calls it for any
powersate != PWRDM_POWER_ON passing in the powerstate.
The hook itself is then responsible for doing various preparation
based on the powerstate.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Tero Kristo [Mon, 22 Dec 2008 12:27:12 +0000 (14:27 +0200)]
OMAP3: GPIO fixes for off-mode
Off mode is now using the omap2 retention fix code for scanning GPIOs
during off-mode transitions. All the *non_wakeup_gpios variables
are now used for off-mode transition tracking on OMAP3. This patch fixes
cases where GPIO state changes are missed during off-mode.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Mike Chan [Mon, 3 May 2010 23:04:07 +0000 (16:04 -0700)]
OMAP3: PM: Remove PER wakeup dependency on CORE.
We can remove this wakeup dependency since now, when
GPIO2-6 are enabled for IO-pad wakeup, PER domain is gauranteed
to be awake or be woken up to service.
The previous dependency did not handle all corner cases. Since there
was no sleep dependency between CORE and PER domains, if PER enters
RET and CORE is ON, PER will not be active for GPIO handling.
Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Mike Chan [Mon, 3 May 2010 23:04:06 +0000 (16:04 -0700)]
OMAP3: PM: Enable IO / IO-CHAIN wakeups for PER
IO events can also come from GPIO modules, which reside in the PER domain.
It is possible for the PER to enter RET while CORE is still in ON.
If GPIO 2-6 are enabled for IO-pad wakeups, the PER domain will not
wakeup in this case, unless we enable it.
Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch enables the wakeup capabilities of ads7846 touchscreen driver.
ads7846 driver can now wakeup the system from suspend on OMAP3430 EVM
and SDP boards.
The earlier approach of enabling wakeup on the touchscreen GPIO pin during
board level mux init is removed. Instead the wakeup flag in
ads7846_platform_data is enabled. Based on the flag, the ads7846 driver
will do an enable_irq_wake which will eventually call into the OMAP GPIO
layer and will enable the wakeup capability on the GPIO pin.
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
OMAP3EVM: Update pad configuration for wakeup enabled pads
OMAP3530 TRM section 7.4.4.4.2 requires OFFOUTENABLE to be set (active low)
if wakeup capabilities are enabled on a pad. During OFF mode testing
on OMAP3530 EVM, it was observed that the device was not residing in
the OFF state. The device enters into the OFF state and immediately exits
from that state as if an IO wakeup event has occured. The issue was traced
down to the pad configuration of wkaeup enabled pad's.
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Ari Kauppi [Tue, 23 Mar 2010 07:04:59 +0000 (09:04 +0200)]
OMAP3: PM: Add milliseconds interface to suspend wakeup timer
Millisecond resolution is possible and there are use cases for it
(automatic testing).
Seconds-based interface is preserved for compatibility.
Signed-off-by: Ari Kauppi <Ext-Ari.Kauppi@nokia.com> Reviewed-by: Phil Carmody <ext-phil.2.carmody@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Kevin Hilman [Mon, 26 Apr 2010 21:59:09 +0000 (14:59 -0700)]
OMAP3: PRCM interrupt: only check and clear enabled PRCM IRQs
While handling PRCM IRQs, mask out interrupts that are not enabled in
PRM_IRQENABLE_MPU. If these are not masked out, non-enabled
interrupts are caught, a WARN() is printed due to no 'handler' and the
events are cleared. In addition to being noisy, this can also
interfere with independent polling of this register by SR/VP code.
This was noticed using SmartReflex transitions which cause the VPx_*
interrupts to be handled since they are set in PRM_IRQSTATUS_MPU even
but not enabled in PRM_IRQENABLE_MPU.
Acked-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
projects / linux-beck.git / log