Chunming Zhou [Thu, 23 Mar 2017 09:38:34 +0000 (17:38 +0800)]
drm/amdgpu: set page table depth by num_level
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 27 Mar 2017 03:36:57 +0000 (11:36 +0800)]
drm/amdgpu: abstract block size to one function
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 27 Oct 2016 18:04:38 +0000 (20:04 +0200)]
drm/amdgpu: add alloc/free for multi level PDs V2
Allocate and free page directories on demand.
V2:
a. clear entries allocation
b. fix entries index calculation
c. need alloc sub level even parent bo was allocated
Signed-off-by: Christian König <christian.koenig@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> (v2) Acked-by: Alex Deucher <alexander.deucher@amd.com> (v2) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 25 Oct 2016 13:52:28 +0000 (15:52 +0200)]
drm/amdgpu: handle multi level PD during PT updates
Not the best solution, but good enough for now.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 12 Oct 2016 13:13:52 +0000 (15:13 +0200)]
drm/amdgpu: handle multi level PD updates V2
Update all levels of the page directory.
V2:
a. sub level pdes always are written to incorrect place.
b. sub levels need to update regardless of parent updates.
Signed-off-by: Christian König <christian.koenig@amd.com> (V1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (V1) Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> (V2) Acked-by: Alex Deucher <alexander.deucher@amd.com> (V2) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 13 Oct 2016 08:20:53 +0000 (10:20 +0200)]
drm/amdgpu: handle multi level PD in the LRU
Move all levels to the end after command submission.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 12 Oct 2016 13:36:57 +0000 (15:36 +0200)]
drm/amdgpu: handle multi level PD during validation
All page directory levels should be in place after this.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 19 Oct 2016 09:03:57 +0000 (11:03 +0200)]
drm/amdgpu: handle multi level PD size calculation (v2)
Allows us to get the size for all levels as well.
v2: agd: fix warning
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 12 Oct 2016 12:46:26 +0000 (14:46 +0200)]
drm/amdgpu: generalize page table level
No functional change, but the base for multi level page tables.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 17 Oct 2016 13:08:10 +0000 (15:08 +0200)]
drm/amdgpu: add num_level to the VM manager
Needs to be filled with handling.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 13 Oct 2016 13:09:08 +0000 (15:09 +0200)]
drm/amdgpu: add the VM pointer to the amdgpu_pte_update_params as well
This way we save passing it through the different functions.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 12 Oct 2016 11:20:52 +0000 (13:20 +0200)]
drm/amdgpu: rename page_directory_fence to last_dir_update
Decribes better what this is used for.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Mon, 13 Mar 2017 03:10:12 +0000 (11:10 +0800)]
drm/amdgpu/vce4: impl vce & mmsch sriov start
For MM sriov, need use MMSCH to init engine and the init procedures
are all saved in mm table.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Mon, 13 Mar 2017 03:03:35 +0000 (11:03 +0800)]
drm/amdgpu: add mmsch structures
For MM SRIOV, need to prepare MM table send send it to MMSCH to
initial UVD & VCE engine. Create new header file for the structures.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Wed, 8 Mar 2017 06:35:16 +0000 (14:35 +0800)]
drm/amdgpu/vce4: Ignore vce ring/ib test temporarily
In order to not break SRIOV gfx development, will revert
this patch after vce proved working.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 7 Mar 2017 08:40:55 +0000 (16:40 +0800)]
drm/amdgpu/vce4: alloc mm table for MM sriov
Allocate MM table for sriov device.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 28 Feb 2017 09:24:52 +0000 (17:24 +0800)]
drm/amdgpu/virt: add structure for MM table
Add new structure for MM table for multi media scheduler of sriov.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Wed, 15 Feb 2017 09:25:43 +0000 (17:25 +0800)]
drm/amdgpu: disable uvd for sriov
disable uvd for sriov temporarily.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 7 Mar 2017 06:52:24 +0000 (14:52 +0800)]
drm/amdgpu/vce4: enable doorbell for SRIOV
VCE SRIOV need use doorbell and only works on VCN0 ring now
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 7 Mar 2017 06:45:25 +0000 (14:45 +0800)]
drm/amdgpu: Don't touch PG&CG for SRIOV MM
For SRIOV, MM don't need to care about PG & CG, skip it.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 30 Dec 2016 08:18:56 +0000 (16:18 +0800)]
drm/amdgpu/vega10:fix DOORBELL64 scheme
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 28 Feb 2017 09:22:03 +0000 (17:22 +0800)]
drm/amdgpu/soc15: enable virtual dce for vf
VF need virtual dce, enable it if device is vf.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Wed, 8 Mar 2017 07:06:47 +0000 (15:06 +0800)]
drm/amdgpu/soc15: init virt ops for vf
If gpu device is vf, set virt ops so that guest can talk with GPU
hypervisor.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Fri, 10 Mar 2017 06:18:17 +0000 (14:18 +0800)]
drm/amdgpu/virt: impl mailbox for ai
Implement mailbox protocol for AI so that guest vf can communicate
with GPU hypervisor.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 14 Feb 2017 08:08:18 +0000 (16:08 +0800)]
drm/amdgpu/dce_virtual: bypass DPM for vf
If enable DPM for VF, always get lot of warn_slow_patch_null in
dmesg and vf doesn't support DPM.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 28 Feb 2017 09:06:36 +0000 (17:06 +0800)]
drm/amdgpu/gmc9: no need use kiq in vega10 tlb flush
two reasons:
1. there is a spinlock around;
2. vm register is pf/vf copy, vf can access via mmio safely.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 28 Feb 2017 08:59:28 +0000 (16:59 +0800)]
drm/amdgpu/soc15: bypass PSP for VF
Bypass PSP block for VF device.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 15 Dec 2016 05:56:53 +0000 (13:56 +0800)]
drm/amdgpu/sdma4:re-org SDMA initial steps for sriov
Rework sdma init to support SR-IOV.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 12 Dec 2016 09:18:37 +0000 (17:18 +0800)]
drm/amdgpu:bypass RLC init for SRIOV
one issue unresolved for RLC:
rlc will go wrong completely if there is a soft_reset
before RLC ucode loading.
to workaround above issue, we can totally ignore RLC
in guest driver side due to there was already full
initialization on RLC side by GIM
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 7 Mar 2017 05:56:03 +0000 (13:56 +0800)]
drm/amdgpu/gfx9: impl gfx9 meta data emit
Insert ce meta prior to cntx_cntl and de follow it.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 18 Nov 2016 09:16:36 +0000 (17:16 +0800)]
drm/amdgpu:impl gfx9 cond_exec (v2)
it is needed for virtualization
v2: squash in wptr value fix
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 28 Feb 2017 08:48:47 +0000 (16:48 +0800)]
drm/amdgpu: init kiq and kcq for vega10
Init kiq via cpu mmio and init kcq through kiq.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Mon, 13 Feb 2017 08:49:34 +0000 (16:49 +0800)]
drm/amdgpu/gfx9: fullfill kiq irq funcs (v2)
Fullfill KIQ irq funcs to support kiq interrupt.
v2: squash in adding interrupt src
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Mon, 13 Feb 2017 08:36:17 +0000 (16:36 +0800)]
drm/amdgpu/gfx9: fullfill kiq funcs (v2)
Fullfill kiq funcs to support kiq ring.
v2: squash in 64bit ptr fix
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Mon, 13 Feb 2017 08:13:46 +0000 (16:13 +0800)]
drm/amdgpu: add kiq ring for gfx9
Allocate KIQ ring in sw_init for gfx9.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Wed, 8 Mar 2017 07:00:48 +0000 (15:00 +0800)]
drm/amdgpu: impl sriov detection for vega10
Read vega10 hw register to detect if sriov is enabled, and call
it before IP blocks setting.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Mon, 6 Mar 2017 19:53:16 +0000 (14:53 -0500)]
drm/amdgpu: Set the IP blocks for vega10
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Mon, 6 Mar 2017 19:49:53 +0000 (14:49 -0500)]
drm/amdgpu: soc15 enable (v3)
Add soc15 support and enable all the IPs for vega10.
v2: squash in xclk fix
v3: disable HDP MGCG
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 6 Mar 2017 19:03:02 +0000 (14:03 -0500)]
drm/amd/powerplay: add Vega10 powerplay support (v5)
Adds power management support for vega10.
v2: squash in fan control and led config fixes from Rex
v3: squash in dead code removal and socvid fixes from Rex
v4: squash in dpm force level fix from Rex
v5: squash in latest headless, gpu load fixes from Rex
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 6 Mar 2017 18:13:48 +0000 (13:13 -0500)]
drm/amd/powerplay: add some display/powerplay interfaces
New interfaces needed to handle the new clock trees and
bandwidth requirements on vega10.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 6 Mar 2017 18:01:48 +0000 (13:01 -0500)]
drm/amd: add structures for display/powerplay interface
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 6 Mar 2017 17:34:32 +0000 (12:34 -0500)]
drm/amd/powerplay: add some new structures for Vega10
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 20 Feb 2017 09:07:36 +0000 (17:07 +0800)]
drm/amd/powerplay: add global PowerPlay mutex.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Sat, 4 Mar 2017 00:20:47 +0000 (19:20 -0500)]
drm/amdgpu: add new atomfirmware based helpers for powerplay
New helpers for fetching info out of atomfirmware.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Ken Wang <Ken.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 3 Mar 2017 23:50:50 +0000 (18:50 -0500)]
drm/amd/powerplay: add new Vega10's ppsmc header file
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 3 Mar 2017 23:49:56 +0000 (18:49 -0500)]
drm/amd/powerplay: add smu9 header files for Vega10
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 16 Feb 2017 03:53:38 +0000 (11:53 +0800)]
drm/amdgpu: add SMC firmware into global ucode list for psp loading
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sat, 4 Mar 2017 00:15:26 +0000 (19:15 -0500)]
drm/amdgpu: add psp firmware info into info query and debugfs
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 3 Mar 2017 23:37:23 +0000 (18:37 -0500)]
drm/amdgpu: add PSP driver for vega10 (v2)
PSP is responsible for firmware loading on SOC-15 asics.
v2: fix memory leak (Ken)
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Fri, 3 Mar 2017 23:27:49 +0000 (18:27 -0500)]
drm/amdgpu: add initial vce 4.0 support for vega10
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Fri, 3 Mar 2017 23:13:26 +0000 (18:13 -0500)]
drm/amdgpu: add initial uvd 7.0 support for vega10
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Fri, 3 Mar 2017 23:06:01 +0000 (18:06 -0500)]
drm/amdgpu: add vega10 interrupt handler
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Fri, 3 Mar 2017 22:59:39 +0000 (17:59 -0500)]
drm/amdgpu: implement GFX 9.0 support (v2)
Add support for gfx v9.0.
v2: update golden settings from Ken
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Fri, 3 Mar 2017 22:31:51 +0000 (17:31 -0500)]
drm/amdgpu: add SDMA v4.0 implementation (v2)
v2: fix Makefile
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Thu, 9 Mar 2017 16:36:26 +0000 (11:36 -0500)]
drm/amdgpu: Add GMC 9.0 support (v2)
On SOC-15 parts, the GMC (Graphics Memory Controller) consists
of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce).
v2: drop sdma from Makefile, fix duplicate return statement.
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Junwei Zhang [Fri, 3 Mar 2017 22:46:40 +0000 (17:46 -0500)]
drm/amdgpu: add NBIO 6.1 driver
This handles nbio 6.1 specific implementations which
are used by various other IPs.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Fri, 3 Mar 2017 21:49:39 +0000 (16:49 -0500)]
drm/amdgpu: handle PTE MTYPE in amdgpu_vm_bo_split_mapping
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Fri, 3 Mar 2017 21:47:11 +0000 (16:47 -0500)]
drm/amdgpu: handle PTE EXEC in amdgpu_vm_bo_split_mapping
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 3 Mar 2017 21:42:27 +0000 (16:42 -0500)]
drm/amdgpu: gart fixes for vega10
Flags need to be 0 to be considered invalid.
Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 3 Mar 2017 21:25:23 +0000 (16:25 -0500)]
drm/amdgpu: add psp firmware header info
Defines the header info for the psp firmware.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 3 Mar 2017 21:20:35 +0000 (16:20 -0500)]
drm/amdgpu: rework common ucode handling for vega10
Handle ucode differences in vega10.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 3 Mar 2017 21:03:15 +0000 (16:03 -0500)]
drm/amdgpu: don't validate TILE_SPLIT on GFX9
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 6 Dec 2016 08:41:55 +0000 (03:41 -0500)]
drm/amdgpu: add IV trace point
This allows us to grab IVs without spamming the log.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Tue, 14 Feb 2017 17:04:52 +0000 (12:04 -0500)]
drm/amdgpu: Add MTYPE flags to GPU VM IOCTL interface
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Fri, 18 Mar 2016 07:41:42 +0000 (15:41 +0800)]
drm/amdgpu: add 64bit doorbell assignments
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 1 Nov 2016 07:35:38 +0000 (15:35 +0800)]
drm/amdgpu: use new flag to handle different firmware loading method
This patch introduces a new flag named "amdgpu_firmware_load_type" to
handle different firmware loading method. Since Vega10, there are
three ways to load firmware. It would be better to use a flag and a
fw_load_type kernel parameter to configure it.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
ken [Thu, 9 Mar 2017 16:34:42 +0000 (11:34 -0500)]
drm/amdgpu: add clinetid definition for vega10
Signed-off-by: ken <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Wed, 9 Mar 2016 01:28:32 +0000 (09:28 +0800)]
drm/amdgpu: add vega10 chip name
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Mon, 6 Mar 2017 17:41:22 +0000 (12:41 -0500)]
drm/amdgpu: add common soc15 headers
These are used by various IP modules.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Thu, 2 Mar 2017 21:57:08 +0000 (16:57 -0500)]
drm/amd: Add MQD structs for GFX V9
This header defines the gfx v9 MEC structures.
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / karo-tx-linux.git / log