]> git.karo-electronics.de Git - karo-tx-uboot.git/log
karo-tx-uboot.git
9 years agoMIPS: refactor L1 cache config reads to a macro
Paul Burton [Thu, 29 Jan 2015 01:27:59 +0000 (01:27 +0000)]
MIPS: refactor L1 cache config reads to a macro

Reduce duplication between reading the configuration of the L1 dcache &
icache by performing both using a macro which calculates the appropriate
line & cache sizes from the coprocessor 0 Config1 register.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: unify cache initialization code
Paul Burton [Thu, 29 Jan 2015 01:27:58 +0000 (01:27 +0000)]
MIPS: unify cache initialization code

The mips32 & mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 & mips64 builds. The RA
register is defined differently to suit mips32 & mips64, but will be
removed by a later commit in the series after further cleanup.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: unify cache maintenance functions
Paul Burton [Thu, 29 Jan 2015 01:27:57 +0000 (01:27 +0000)]
MIPS: unify cache maintenance functions

Move the more developed mips32 version of the cache maintenance
functions to a common arch/mips/lib/cache.c, in order to reduce
duplication between mips32 & mips64.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: avoid .set ISA for cache operations
Paul Burton [Thu, 29 Jan 2015 01:27:56 +0000 (01:27 +0000)]
MIPS: avoid .set ISA for cache operations

As a step towards unifying the cache maintenance code for mips32 &
mips64 CPUs, stop using ".set <ISA>" directives in the more developed
mips32 version of the code. Instead, when present make use of the GCC
builtin for emitting a cache instruction. When not present, simply don't
bother with the .set directives since U-boot always builds with
-march=mips32 or higher anyway.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Mon, 26 Jan 2015 22:44:49 +0000 (17:44 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Mon, 26 Jan 2015 11:42:40 +0000 (06:42 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

9 years agoMerge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Mon, 26 Jan 2015 11:42:15 +0000 (06:42 -0500)]
Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze

9 years agoserial: Extend structure comments with register offset
Michal Simek [Wed, 7 Jan 2015 14:00:47 +0000 (15:00 +0100)]
serial: Extend structure comments with register offset

This information help with debugging issues with uart.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoserial: zynq: Use global baudrate instead of hardcoded one
Michal Simek [Tue, 2 Dec 2014 12:52:00 +0000 (13:52 +0100)]
serial: zynq: Use global baudrate instead of hardcoded one

This change enables to change baudrate on command line.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Add USB lthor download protocol support
Siva Durga Prasad Paladugu [Mon, 8 Sep 2014 16:39:37 +0000 (22:09 +0530)]
ARM: zynq: Add USB lthor download protocol support

updated the zynq config to support the lthor
download protocol.
This lthor functionality helps us to load linux
images on to DDR/MMC and can boot linux using bootm.
In order to load images the user should run lthor
command run "thor_ram" from u-boot prompt and
then send the images from host using lthor utility.

Define g_dnl_bind_fixup for zynq so that correct vendor
and product ids assigned incase of DFU and lthor.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Enable DFU functionality in zynq
Siva Durga Prasad Paladugu [Mon, 25 Aug 2014 05:28:33 +0000 (10:58 +0530)]
ARM: zynq: Enable DFU functionality in zynq

Enable DFU functionality in zynq.
This DFU functionality helps us to load linux
images on to DDR and can boot linux using bootm.
In order to load images the user should run dfu
command "dfu 0 ram 0" from u-boot prompt and then
send the images from host.

The malloc size has been increased to match the DFU
buffer requirements.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: provide config option to select emio
Siva Durga Prasad Paladugu [Tue, 28 Oct 2014 11:29:32 +0000 (16:59 +0530)]
ARM: zynq: provide config option to select emio

Dont send always emio value as zero for zynq_gem_initialize
send it based on config.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Group ethernet configuration options together
Michal Simek [Tue, 13 Jan 2015 15:27:14 +0000 (16:27 +0100)]
ARM: zynq: Group ethernet configuration options together

No functional chagnes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Use CMD_FS_GENERIC
Michal Simek [Wed, 24 Sep 2014 12:55:03 +0000 (14:55 +0200)]
ARM: zynq: Use CMD_FS_GENERIC

Based on:
"am335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env"
(sha1: 73a27a84e58cb99b4e64ed6a35eab5bc61f44f29)

Fix filesystem specific commands for loading.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Show board information by default
Michal Simek [Thu, 28 Aug 2014 11:31:02 +0000 (13:31 +0200)]
ARM: zynq: Show board information by default

Show board information in bootlog and enable it by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: List qspi, smc and nand baseaddresses
Michal Simek [Tue, 13 Jan 2015 15:05:19 +0000 (16:05 +0100)]
ARM: zynq: List qspi, smc and nand baseaddresses

Add missing addresses to the list.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: List nand, qspi and jtag boot modes
Michal Simek [Tue, 13 Jan 2015 15:04:10 +0000 (16:04 +0100)]
ARM: zynq: List nand, qspi and jtag boot modes

Use full boot mode list in SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: slcr: Dont modify the reserved bits
Siva Durga Prasad Paladugu [Tue, 28 Oct 2014 05:52:19 +0000 (11:22 +0530)]
ARM: zynq: slcr: Dont modify the reserved bits

Set only the 0-3 bits of the FPGA_RST_CTRL register
as other bits should not be set to 1.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: ddrc: Setup half of memory only for ECC case
Michal Simek [Thu, 5 Sep 2013 06:41:19 +0000 (08:41 +0200)]
ARM: zynq: ddrc: Setup half of memory only for ECC case

Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Remove empty line
Michal Simek [Tue, 13 Jan 2015 14:54:04 +0000 (15:54 +0100)]
ARM: zynq: Remove empty line

Trivial patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: Enable the Neon instructions
Michal Simek [Fri, 23 Jan 2015 08:45:12 +0000 (09:45 +0100)]
ARM: zynq: Enable the Neon instructions

Added the lowlevel_init to enable the Neon instructions.

Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.

Also enable neon instructions for non-xilinx toolchain.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-marvell
Tom Rini [Mon, 26 Jan 2015 00:05:40 +0000 (19:05 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-marvell

9 years agomarvell: kirkwood: guruplug refresh for newer kernel
Gerald Kerma [Fri, 19 Dec 2014 07:13:09 +0000 (08:13 +0100)]
marvell: kirkwood: guruplug refresh for newer kernel

Refresh for newer kernel.
Prepare ENV settings for sheevaplugs to be OpenWRT ready.

    +----------+
    | UBOOT    | >> 896 Kb (7x128)  = uboot
    +----------+
    | ENV      | >> 128 Kb          = uboot_env
    +----------+
    | ROOT(FS) | >> 511 Mb @ 1 Mb   = root -> rootfs (ubifs)
    +----------+

With (CC) TRUNK OpenWRT build (QUICK HOWTO) :

    <INTERRUPT>
    Marvell>> nand erase.part root
    Marvell>> ubi part root
    Marvell>> ubi remove rootfs
    Marvell>> ubi create rootfs
    Marvell>> usb reset
    Marvell>> fatload usb 2:1 0x800000 guruplug/openwrt/openwrt-kirkwood-guruplug-rootfs.ubifs
    Marvell>> ubi write 0x800000 rootfs ${filesize}
    Marvell>> reset

Changes in v1:
- ADD generic board define
- ADD FDT support
- ADD HUSH interpreter
- Define new NAND partition mapping

Signed-off-by: Gerald Kerma <dreagle@doukki.net>
9 years agokirkwood: sheevaplug: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:41:49 +0000 (02:41 +0100)]
kirkwood: sheevaplug: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: pogo_e02: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:41:19 +0000 (02:41 +0100)]
kirkwood: pogo_e02: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: iconnect: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:41:04 +0000 (02:41 +0100)]
kirkwood: iconnect: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: goflexhome: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:40:51 +0000 (02:40 +0100)]
kirkwood: goflexhome: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: dockstar: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Sun, 30 Nov 2014 01:40:37 +0000 (02:40 +0100)]
kirkwood: dockstar: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agokirkwood: ib62x0: add CONFIG_SYS_GENERIC_BOARD define
Luka Perkov [Tue, 1 Jul 2014 23:47:23 +0000 (01:47 +0200)]
kirkwood: ib62x0: add CONFIG_SYS_GENERIC_BOARD define

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
9 years agoARM: kirkwood: fix cpu info for 6282 device id
Luka Perkov [Mon, 23 Dec 2013 00:23:07 +0000 (01:23 +0100)]
ARM: kirkwood: fix cpu info for 6282 device id

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Stefan Roese <sr@denx.de>
9 years agokirkwood: define empty CONFIG_MVGBE_PORTS by default
Luka Perkov [Mon, 11 Nov 2013 06:27:53 +0000 (07:27 +0100)]
kirkwood: define empty CONFIG_MVGBE_PORTS by default

Each board with defines it's own set of values. If we do not define
CONFIG_MVGBE_PORTS we will hit following error:

mvgbe.c: In function 'mvgbe_initialize':
mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this function)
  u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS;

This patch fixes above described problem.

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
9 years agocosmetic: kirkwood: style fixes in kwbimage.cfg files
Luka Perkov [Mon, 11 Nov 2013 05:45:44 +0000 (06:45 +0100)]
cosmetic: kirkwood: style fixes in kwbimage.cfg files

When diffing through the changes only the relevant changes
should be displayed.

Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
9 years agofsl/ls1021qds: Add deep sleep support
tang yuantian [Wed, 17 Dec 2014 04:58:05 +0000 (12:58 +0800)]
fsl/ls1021qds: Add deep sleep support

Add deep sleep support on Freescale LS1021QDS platform.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
[York Sun: Fix conflict in fdt.c]
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agox86: config: chromebook_link: Enable environment
Simon Glass [Tue, 20 Jan 2015 05:16:17 +0000 (22:16 -0700)]
x86: config: chromebook_link: Enable environment

Enable an environment area.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: ivybridge: Drop the Kconfig MRC cache information
Simon Glass [Tue, 20 Jan 2015 05:16:16 +0000 (22:16 -0700)]
x86: ivybridge: Drop the Kconfig MRC cache information

This is now stored in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: config: Enable hook for saving MRC configuration
Simon Glass [Tue, 20 Jan 2015 05:16:15 +0000 (22:16 -0700)]
x86: config: Enable hook for saving MRC configuration

Add a hook to ensure that this information is saved.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Implement a cache for Memory Reference Code parameters
Simon Glass [Tue, 20 Jan 2015 05:16:14 +0000 (22:16 -0700)]
x86: Implement a cache for Memory Reference Code parameters

The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.

Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: dts: Add SPI flash MRC details for chromebook_link
Simon Glass [Tue, 20 Jan 2015 05:16:13 +0000 (22:16 -0700)]
x86: dts: Add SPI flash MRC details for chromebook_link

Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoAllow architecture-specific memory reservation
Simon Glass [Tue, 20 Jan 2015 05:16:12 +0000 (22:16 -0700)]
Allow architecture-specific memory reservation

All memory to be reserved for use after relocation by adding a new call
to perform this reservation.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: spi: Add device tree support
Simon Glass [Tue, 20 Jan 2015 05:16:11 +0000 (22:16 -0700)]
x86: spi: Add device tree support

As a temporary measure before the ICH driver moves over to driver model,
add device tree support to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: rtc: mc146818: Add helpers to read/write CMOS RAM
Simon Glass [Tue, 20 Jan 2015 05:16:10 +0000 (22:16 -0700)]
x86: rtc: mc146818: Add helpers to read/write CMOS RAM

On x86 we use CMOS RAM to read and write some settings. Add basic support
for this, including access to registers 128-255.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: Use ipchecksum from net/
Simon Glass [Tue, 20 Jan 2015 05:16:09 +0000 (22:16 -0700)]
x86: Use ipchecksum from net/

The existing IP checksum function is only accessible to the 'coreboot' cpu.
Drop it in favour of the new code in the network subsystem.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agonet: Add a separate file for IP checksumming
Simon Glass [Tue, 20 Jan 2015 05:16:07 +0000 (22:16 -0700)]
net: Add a separate file for IP checksumming

Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: dts: Add compatible string for Intel ICH9 SPI controller
Simon Glass [Tue, 20 Jan 2015 05:16:06 +0000 (22:16 -0700)]
x86: dts: Add compatible string for Intel ICH9 SPI controller

Add this to the enum so that we can use the various fdtdec functions. A
later commit will move this driver to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoarm: ls102xa: Add LPUART support for LS1021ATWR board
Alison Wang [Sun, 4 Jan 2015 07:30:59 +0000 (15:30 +0800)]
arm: ls102xa: Add LPUART support for LS1021ATWR board

This patch adds LPUART support for LS1021ATWR board.
For ls1021atwr_nor_lpuart_defconfig, LPUART is used as the console.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add LPUART support for LS1021AQDS board
Alison Wang [Sun, 4 Jan 2015 07:30:58 +0000 (15:30 +0800)]
arm: ls102xa: Add LPUART support for LS1021AQDS board

This patch adds LPUART support for LS1021AQDS board.
For ls1021aqds_nor_lpuart_defconfig, LPUART is used as the console.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot
Alison Wang [Fri, 26 Dec 2014 05:14:01 +0000 (13:14 +0800)]
ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot

As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are
only enabled in QSPI boot, and disabled in other boot modes.
IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot.
This patch will add fdt support for the above rules.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Update snoop settings for CCI-400
Alison Wang [Thu, 15 Jan 2015 09:29:29 +0000 (17:29 +0800)]
arm: ls102xa: Update snoop settings for CCI-400

CAAM is connected to CCI-400 S0 slave interface. Disable snooping for
S0 will cause CAAM self test failure. This patch is to enable snooping
for S0 slave interface. These CCI-400 operations are moved to
board_early_init_f() to be initialized earlier. For S4 slave interface,
issuing of snoop requests and DVM message requests are enabled.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoARM: HYP/non-sec: Make variable gic_dist_addr as a local one
tang yuantian [Wed, 17 Dec 2014 04:58:04 +0000 (12:58 +0800)]
ARM: HYP/non-sec: Make variable gic_dist_addr as a local one

Defining variable gic_dist_addr as a globe one prevents some
functions, which use it, from being used before relocation
which is the case in the deep sleep resume process on Freescale
SoC platforms.
Besides, we can always get the GIC base address by calling
get_gicd_base_address() without referring gic_dist_addr.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols102xa: dcu: Add platform support for DCU on LS1021AQDS board
Xiubo Li [Tue, 16 Dec 2014 06:50:33 +0000 (14:50 +0800)]
ls102xa: dcu: Add platform support for DCU on LS1021AQDS board

This patch adds the CH7301 HDMI options and the common configuration
for DCU on LS1021AQDS board.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Cc: Jason Jin <Jason.Jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agocrypto/fsl: Add fixup for crypto node
Ruchika Gupta [Mon, 15 Dec 2014 06:00:36 +0000 (11:30 +0530)]
crypto/fsl: Add fixup for crypto node

Era property is added in the crypto node in device tree.
Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to
drivers/sec/sec.c so that it can be used across arm and
powerpc platforms having crypto node.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Fix commit message indentation]
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add dummy gpio.h to enable CONFIG_OF_CONTROL
Ruchika Gupta [Wed, 10 Dec 2014 06:17:03 +0000 (11:47 +0530)]
arm: ls102xa: Add dummy gpio.h to enable CONFIG_OF_CONTROL

If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>.  As a result, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they
do not support GPIO.

The right fix would be to split the lib/fdtdec.c to remove
dependency on GPIO.This commit adds a dummy <asm/arch/gpio.h>
to support OF_CONTROL for LS102x platform. This dummy header
will be removed after FDT-GPIO stuff is fixed correctly.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as default
Alison Wang [Tue, 9 Dec 2014 09:38:23 +0000 (17:38 +0800)]
ls102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as default

This patch reverts to use ge0_clk125 for eTSEC clock muxing. For SAI and
CAN which are pin multiplexed with RGMII1 in EC1 of RCW, ge2_clk125 will
be used via hwconfig.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm/ls1021a: Add workaround for DDR erratum A008378
York Sun [Mon, 8 Dec 2014 23:30:55 +0000 (15:30 -0800)]
arm/ls1021a: Add workaround for DDR erratum A008378

Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agopci: tegra: Fix port information parsing
Sjoerd Simons [Tue, 20 Jan 2015 17:06:53 +0000 (18:06 +0100)]
pci: tegra: Fix port information parsing

commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
new fdtdec pci helpers. To get the device index of the root port, the
"reg" property should be parsed from the dtb (as was previously the
case).

With this patch i can successfully network boot my jetson tk1

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
9 years agox86: Fix various code format issues in start16.S
Bin Meng [Tue, 20 Jan 2015 03:25:44 +0000 (11:25 +0800)]
x86: Fix various code format issues in start16.S

Various minor code format issues are fixed in start16.S:
- U-boot -> U-Boot
- 32bit -> 32-bit
- Use TAB instead of SPACE to indent
- Move the indention location of the GDT comment block

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Test mtrr support flag before accessing mtrr msr
Bin Meng [Thu, 22 Jan 2015 03:29:41 +0000 (11:29 +0800)]
x86: Test mtrr support flag before accessing mtrr msr

On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Save mtrr support flag in global data
Bin Meng [Thu, 22 Jan 2015 03:29:40 +0000 (11:29 +0800)]
x86: Save mtrr support flag in global data

CPUID (EAX 01H) returns MTRR support flag in EDX bit 12. Probe this
flag in x86_cpu_init_f() and save it in global data.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Add missing DECLARE_GLOBAL_DATA_PTR for mtrr.c
Bin Meng [Thu, 22 Jan 2015 03:29:39 +0000 (11:29 +0800)]
x86: Add missing DECLARE_GLOBAL_DATA_PTR for mtrr.c

arch/x86/cpu/mtrr.c has access to the U-Boot global data thus
DECLARE_GLOBAL_DATA_PTR is needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: config: Always scroll the display by 5 lines, for speed
Simon Glass [Thu, 1 Jan 2015 23:17:58 +0000 (16:17 -0700)]
x86: config: Always scroll the display by 5 lines, for speed

Scrolling a line at a time is very slow for reasons that I don't understand.
It seems to take about 100ms to copy 4MB of RAM in the frame buffer. To cope
with this, scroll 5 lines each time.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: video: Add support for CONFIG_CONSOLE_SCROLL_LINES
Simon Glass [Thu, 1 Jan 2015 23:17:57 +0000 (16:17 -0700)]
x86: video: Add support for CONFIG_CONSOLE_SCROLL_LINES

Some machines are very slow to scroll their displays. To cope with this,
support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows
the display to operate at an acceptable speed by scrolling 5 lines at
a time.

This same option is available for LCDs so when these systems are unified
this code can be unified also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
9 years agox86: Access the VGA ROM when needed
Simon Glass [Thu, 15 Jan 2015 04:37:04 +0000 (21:37 -0700)]
x86: Access the VGA ROM when needed

Add code to the generic pci_rom file to access the VGA ROM in PCI space
when needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: Fix out of bounds irq handlers access
Sebastien Ronsse [Mon, 12 Jan 2015 17:17:25 +0000 (17:17 +0000)]
x86: Fix out of bounds irq handlers access

Using coreboot-x86_defconfig, the following error occurred prior to this modification:
CC arch/x86/lib/interrupts
arch/x86/lib/interrupts.c: In function ‘do_irqinfo’:
arch/x86/lib/interrupts.c:134:24: error: iteration 16u invokes undefined behavior [-Werror=aggressive-loop-optimizations]
   if (irq_handlers[irq].handler != NULL) {
                        ^
arch/x86/lib/interrupts.c:133:2: note: containing loop
  for (irq = 0; irq <= CONFIG_SYS_NUM_IRQS; irq++) {
  ^
cc1: all warnings being treated as errors
scripts/Makefile.build:275: recipe for target 'arch/x86/lib/interrupts.o' failed
make[1]: *** [arch/x86/lib/interrupts.o] Error 1
Makefile:1093: recipe for target 'arch/x86/lib' failed
make: *** [arch/x86/lib] Error 2

Change-Id: I3572a822081b72ab760f1eb99442e1161d3d167e
Signed-off-by: Sebastien Ronsse <sronsse@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: ahci: Make sure interface is not busy after enabling the port
Bin Meng [Wed, 31 Dec 2014 09:18:39 +0000 (17:18 +0800)]
x86: ahci: Make sure interface is not busy after enabling the port

Each time U-Boot boots on Intel Crown Bay board, the displayed hard
drive information is wrong. It could be either wrong capacity or just
a 'Capacity: not available' message. After enabling the debug switch,
we can see the scsi inquiry command did not execute successfully.
However, doing a 'scsi scan' in the U-Boot shell does not expose
this issue.

SCSI:  Target spinup took 0 ms.
SATA link 1 timeout.
AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
flags: ncq stag pm led clo only pmp pio slum part ccc apst
scanning bus for devices...
ahci_device_data_io: 0 byte transferred.   <--- scsi inquiry fails
ahci_device_data_io: 512 byte transferred.
ahci_device_data_io: 512 byte transferred.
ahci_device_data_io: 512 byte transferred.
  Device 0: (0:0) Vendor: ATA Prod.:  Rev: ?8
              Type: Hard Disk
                  Capacity: 912968.3 MB = 891.5 GB (1869759264 x 512)
  Found 1 device(s).

So uninitialized contents on the stack were passed to dev_print() to
display those wrong information.

The symptom were observed on two hard drives (one is Seagate, the
other one is Western Digital). The fix is to make sure the AHCI
interface is not busy by checking the error and status information
from task file register after enabling the port in ahci_port_start()
before proceeding other operations like scsi_scan().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agox86: Drop the x86_fb driver
Simon Glass [Tue, 30 Dec 2014 02:32:29 +0000 (19:32 -0700)]
x86: Drop the x86_fb driver

Now that we have a full VESA driver we may as well use that. We need to
support the VESA layer being set up by early start-up code or by
running a VGA ROM.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: Add a VESA video driver
Simon Glass [Tue, 30 Dec 2014 02:32:28 +0000 (19:32 -0700)]
x86: Add a VESA video driver

Add a driver intended to cope with any VESA-compatible x86 graphics
adapter. It will not support ROMs which use OpenFirmware (Forth) since
there is no support for that in U-Boot. This means that MAC OS cards
will not work.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: pci: Don't stop when we get a vendor/device mismatch
Simon Glass [Tue, 30 Dec 2014 02:32:27 +0000 (19:32 -0700)]
x86: pci: Don't stop when we get a vendor/device mismatch

These are quite common and we may as well press on and not be so picky.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agobios_emulator: Add some VESA interface debugging
Simon Glass [Tue, 30 Dec 2014 02:32:26 +0000 (19:32 -0700)]
bios_emulator: Add some VESA interface debugging

Allow the supported modes to be listed when in debug mode.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agobios_emulator: Don't display error when emulator terminates
Simon Glass [Tue, 30 Dec 2014 02:32:25 +0000 (19:32 -0700)]
bios_emulator: Don't display error when emulator terminates

As it turns out this is a normal condition, so suppress the error.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: Support ROMs on other archs
Simon Glass [Tue, 30 Dec 2014 02:32:24 +0000 (19:32 -0700)]
x86: Support ROMs on other archs

We shouldn't assume that the VGA ROM can always be loaded at c0000. This
is only true on x86 machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Correct endianness isues in pci_rom
Simon Glass [Tue, 30 Dec 2014 02:32:23 +0000 (19:32 -0700)]
x86: Correct endianness isues in pci_rom

This code is too x86-dependent at present. Correct it so that it can run on
big-endian machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agobios_emulator: Fix an #ifdef typo in the header file
Simon Glass [Tue, 30 Dec 2014 02:32:22 +0000 (19:32 -0700)]
bios_emulator: Fix an #ifdef typo in the header file

This stops the debug mode from working properly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agopowerpc: remove icecube_5200, Lite5200, cpci5200, mecp5200, pf5200
Masahiro Yamada [Thu, 22 Jan 2015 15:24:22 +0000 (00:24 +0900)]
powerpc: remove icecube_5200, Lite5200, cpci5200, mecp5200, pf5200

These boards are still non-generic boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
9 years agopowerpc: mpc5xxx: PM520 board support
Masahiro Yamada [Thu, 22 Jan 2015 15:24:21 +0000 (00:24 +0900)]
powerpc: mpc5xxx: PM520 board support

This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Josef Wagner <Wagner@Microsys.de>
9 years agopowerpc: mpc5xxx: remove Total5200 board support
Masahiro Yamada [Thu, 22 Jan 2015 15:24:20 +0000 (00:24 +0900)]
powerpc: mpc5xxx: remove Total5200 board support

This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agopowerpc: ppc4xx: remove PPChameleonEVB, CATcenter boards
Masahiro Yamada [Thu, 22 Jan 2015 15:24:19 +0000 (00:24 +0900)]
powerpc: ppc4xx: remove PPChameleonEVB, CATcenter boards

These boards are still non-generic boards.

It is a good thing that we can drop board-specific hack code
from drivers/mtd/nand/nand_base.c

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Andrea "llandre" Marson <andrea.marson@dave-tech.it>
9 years agopowerpc: mpc85xx: remove P2020DS board support
Masahiro Yamada [Thu, 22 Jan 2015 15:24:18 +0000 (00:24 +0900)]
powerpc: mpc85xx: remove P2020DS board support

This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agopowerpc: mpc85xx: remove P2020COME board support
Masahiro Yamada [Thu, 22 Jan 2015 15:24:17 +0000 (00:24 +0900)]
powerpc: mpc85xx: remove P2020COME board support

This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Ira W. Snyder <iws@ovro.caltech.edu>
9 years agopowerpc: mpc85xx: remove P1_P2_RDB boards
Masahiro Yamada [Thu, 22 Jan 2015 15:24:16 +0000 (00:24 +0900)]
powerpc: mpc85xx: remove P1_P2_RDB boards

These boards are still non-generic boards:
P1011RDB, P1022RDB, P2010RDB, P2020RDB

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
9 years agopowerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS support
Masahiro Yamada [Thu, 22 Jan 2015 15:24:15 +0000 (00:24 +0900)]
powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS support

These boards are still non-generic boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
9 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Fri, 23 Jan 2015 15:22:29 +0000 (10:22 -0500)]
Merge branch 'master' of http://git.denx.de/u-boot-sunxi

9 years agosunxi: Use a common CONFIG_SYS_PROMPT
Ian Campbell [Fri, 23 Jan 2015 10:17:35 +0000 (10:17 +0000)]
sunxi: Use a common CONFIG_SYS_PROMPT

The CPU info is already logged during boot e.g.
   CPU:    Allwinner A20 (SUN7I)
so the prompt is just one more thing to change for each new SoC, just makes it
"sunxi#" instead.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: Add Hyundai A7HD support
Hans de Goede [Thu, 22 Jan 2015 20:16:36 +0000 (21:16 +0100)]
sunxi: Add Hyundai A7HD support

The Hyundai A7HD is a 7" 16:9 A10 powered tablet featuring 1G RAM, 8G
nand, 1024x600 IPS screen, a mini hdmi port, mini usb receptacle and a
headphones port for details see: http://linux-sunxi.org/Hyundai_A7HD

Cc: Mark Janssen <maniac@maniac.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: video: Make pwm polarity configurable
Hans de Goede [Thu, 22 Jan 2015 20:02:42 +0000 (21:02 +0100)]
sunxi: video: Make pwm polarity configurable

It turns out that there are some panels where the pwm input is not active low,
so make it configurable.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add support for Mele M5.
Ian Campbell [Thu, 22 Jan 2015 11:56:50 +0000 (11:56 +0000)]
sunxi: Add support for Mele M5.

HDMI, SATA, USB and Ethernet appear functional, I've not done extensive tests
of all peripherals though.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: Convert sun7i boards to use auto dram configuration
Hans de Goede [Wed, 21 Jan 2015 19:26:03 +0000 (20:26 +0100)]
sunxi: Convert sun7i boards to use auto dram configuration

Currently we've separate detailed dram settings for all sun7i boards, this
moves them over to using auto dram configuration so that we can get rid of
all the per board dram_foo.c files.

This has been tested on a A20-Olinuxino-Lime, A20-Olinuxino_MICRO, Bananapi,
Bananapro, Cubieboard2, Cubietruck, Mele_M3 and a Linksprite_pcDuino3.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Drop qt840a_defconfig
Hans de Goede [Wed, 21 Jan 2015 15:14:00 +0000 (16:14 +0100)]
sunxi: Drop qt840a_defconfig

The qt840a is one of the many tv-boxes using the "i12" A20 pcb, but it
populates only one of the 2 places for a 16 bit dram ic, thus reducing
the buswidth to 16 bits, and the amount of ram to 512M, which is why we
had a separate config for it.

This commit switches the generic i12-tvbox_defconfig over to DRAM
autoconfiguration, so that it will work with the qt840a too, and drops the
qt840a specific config, like we've done with other memory-amount specific
configs before.

Tested on a generic i12-tvbox with 32 bit bus-width / 1G RAM, and on a
qt840a with 16 bit bus-width / 512M RAM.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add new Chuwi V7 CW0825 board / defconfig
Hans de Goede [Thu, 1 Jan 2015 08:12:42 +0000 (09:12 +0100)]
sunxi: Add new Chuwi V7 CW0825 board / defconfig

The Chuwi V7 is an A10 (sun4i) based tablet with 1G of RAM, 16G of nand flash,
microsd slot, 7" 1024x768 lvds ips panel, mini hdmi out, headphones out,
stereo speakers, front & back camera and usb wifi.

It is clearly marked "CHUWI", "V7" and "Model: CW0825" on the back of the
tablet.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: video: Add support for Hitachi tx18d42vm LVDS LCD panels
Hans de Goede [Tue, 20 Jan 2015 08:23:36 +0000 (09:23 +0100)]
sunxi: video: Add support for Hitachi tx18d42vm LVDS LCD panels

Add support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
lcd controller which needs to be initialized over SPI, once that is
done they work like a regular LVDS panel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Fri, 23 Jan 2015 01:04:17 +0000 (20:04 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Thu, 22 Jan 2015 16:24:11 +0000 (11:24 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Thu, 22 Jan 2015 14:52:19 +0000 (09:52 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

9 years agovideo: Add support for Hitachi tx18d42vm LVDS LCD panels
Hans de Goede [Tue, 20 Jan 2015 08:22:26 +0000 (09:22 +0100)]
video: Add support for Hitachi tx18d42vm LVDS LCD panels

Add support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
lcd controller which needs to be initialized over SPI, once that is
done they work like a regular LVDS panel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
9 years agoARM: UniPhier: add SG_MEMCONF macros for DDR channel 2
Masahiro Yamada [Wed, 21 Jan 2015 06:27:48 +0000 (15:27 +0900)]
ARM: UniPhier: add SG_MEMCONF macros for DDR channel 2

PH1-sLD3, PH1-LD6b have DDR channel 2.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: rename SG_MEMCONF_* macros for readability
Masahiro Yamada [Wed, 21 Jan 2015 06:27:47 +0000 (15:27 +0900)]
ARM: UniPhier: rename SG_MEMCONF_* macros for readability

Match the suffixes of SG_MEMCONF_* macros with SZ_* macros defined
by <linux/sizes.h> for readability.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: use <linux/sizes.h> for readability
Masahiro Yamada [Wed, 21 Jan 2015 06:27:46 +0000 (15:27 +0900)]
ARM: UniPhier: use <linux/sizes.h> for readability

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: remove non-sense inline directives
Masahiro Yamada [Wed, 21 Jan 2015 06:06:46 +0000 (15:06 +0900)]
ARM: UniPhier: remove non-sense inline directives

The inlining is done by GCC when needed, there is no need to do it
explicitly. Furthermore, the inline keyword does not force-inline
the code, but is only a hint for the compiler.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: add static to local functions
Masahiro Yamada [Wed, 21 Jan 2015 06:06:06 +0000 (15:06 +0900)]
ARM: UniPhier: add static to local functions

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: fix IECTRL set code for PH1-Pro4
Masahiro Yamada [Mon, 19 Jan 2015 13:31:10 +0000 (22:31 +0900)]
ARM: UniPhier: fix IECTRL set code for PH1-Pro4

For PH1-Pro4, the bit 6 of the IECTRL must be set.  It is the only
available bit in this register.  There is no effect of the write
access to the other bits.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: describe init_page_table shorter
Masahiro Yamada [Mon, 19 Jan 2015 13:30:23 +0000 (22:30 +0900)]
ARM: UniPhier: describe init_page_table shorter

The assembly directive ".rept ... .endr" allows us to write the
init_page_table much shorter.  To make things further simpler,
set the text and stack area as Normal Memory, and the other sections
as Device attribute.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>