ENGR00258733 WEIM-NOR: mtd: cfi_cmdset_0002: Do not release the mutex lock
The NOR(M29W256GL7AN6E) may suffers a write-buffer timeout during
the bonnie++/ubifs stress test. Micron has confirmed that it is
a silicon bug in the Nor.
This patch is just a workaround to fix this issue for this NOR.
With this patch, the read/write/erase will do in the synchronous way.
ENGR00257947 mtd: use memcpy to replace the memcpy_fromio
During the read of NOR, the kernel actually calls the inline_map_copy_from()
to read the data out. And inline_map_copy_from() will use the memcpy_fromio()
to do the real job.
The memcpy_fromio macro maps _memcpy_fromio() in the current code.
But the _memcpy_fromio() will use readb() to do the copy work one byte
by one byte. This makes the read performance of NOR very slow(about 2~3MB/s).
A similiar discussion could be found in:
http://lists.infradead.org/pipermail/linux-arm-kernel/2009-November/003860.html
This patch replace the memcpy_fromio with memcpy which is optimized by the
kernel.
The following is the result from mtd_speedtest with M29W256GL7AN6E:
=================================================
mtd_speedtest: MTD device: 2
mtd_speedtest: not NAND flash, assume page size is 512 bytes.
mtd_speedtest: MTD device size 4194304, eraseblock size 131072, page size 512,
count of eraseblocks 32, pages per eraseblock 256, OOB size 0
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 845 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 19504 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 845 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 19140 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 846 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 19320 KiB/s
mtd_speedtest: Testing erase speed
mtd_speedtest: erase speed is 233 KiB/s
mtd_speedtest: Testing 2x multi-block erase speed
mtd_speedtest: 2x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 4x multi-block erase speed
mtd_speedtest: 4x multi-block erase speed is 224 KiB/s
mtd_speedtest: Testing 8x multi-block erase speed
mtd_speedtest: 8x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 16x multi-block erase speed
mtd_speedtest: 16x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 32x multi-block erase speed
mtd_speedtest: 32x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 64x multi-block erase speed
mtd_speedtest: 64x multi-block erase speed is 224 KiB/s
mtd_speedtest: finished
=================================================
Peter Chen [Mon, 19 Aug 2013 04:42:00 +0000 (12:42 +0800)]
ENGR00275634: ARM: imx_v6_v7_defconfig: Add some USB configurations
- Enable USB gadget function
- Enable USB Audio and Camera functions
- Disable CONFIG_USB_EHCI_MXC to avoid confusion due to we
only use chipidea driver as USB driver for this BSP
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Liu Ying [Thu, 15 Aug 2013 10:18:33 +0000 (18:18 +0800)]
ENGR00275419-3 mxc fb: ldb: defer some init operations
This patch defers some ldb initialization operations
in the post init interface so that the drive won't
overwrite or damage a registered display device's setup
with the same dev_id and disp_id. The deferred operations
are the parent setting for ipu_dix_clk and the fb notifier
client register.
Liu Ying [Thu, 15 Aug 2013 10:14:16 +0000 (18:14 +0800)]
ENGR00275419-2 mxc ipuv3 fb: call necessary post init interface
This patch adds the post init mxc display driver function call
in the .probe() function to give a chance to display encoders
to defer necessary opertions after their dev_ids and disp_ids
pass usage check.
Liu Ying [Thu, 15 Aug 2013 10:01:40 +0000 (18:01 +0800)]
ENGR00275419-1 mxc dispdrv: introduce post init interface
This patch adds a new post init interface in the mxc display
driver. It may do necessary deferred operations after a
display device's dev_id and disp_id pass usage check. This
is a feasible way to avoid any setup being overwitten or
damaged by a late coming display device which uses the same
dev_id and disp_id with a display already registered.
Sascha Hauer [Mon, 12 Aug 2013 10:29:42 +0000 (12:29 +0200)]
USB: chipidea: i.MX: simplify usbmisc
The chipidea i.MX driver is split into two drivers. The ci_hdrc_imx driver
handles the chipidea cores and the usbmisc_imx driver handles the noncore
registers common to all chipidea cores (but SoC specific). Current flow is:
- usbmisc sets an ops pointer in the ci_hdrc_imx driver during probe
- ci_hdrc_imx checks if the pointer is valid during probe, if yes calls
the functions in the ops pointer.
- usbmisc_imx calls back into the ci_hdrc_imx driver to get additional
data
This is overly complicated and has problems if the drivers are compiled
as modules. In this case the usbmisc_imx driver can be unloaded even if
the ci_hdrc_imx driver still needs usbmisc functionality.
This patch changes this by letting the ci_hdrc_imx driver calling functions
from the usbmisc_imx driver. This way the symbol resolving during module
load makes sure the ci_hdrc_imx driver depends on the usbmisc_imx driver.
Also instead of letting the usbmisc_imx driver call back into the ci_hdrc_imx
driver, pass the needed data in the first place.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:59 +0000 (09:22 +0800)]
usb: chipidea: udc: .pullup is valid only when vbus is there
For chipidea, the IP must know vbus before the controller
begins to run. So the .pullup should only be called when
the vbus is there.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:58 +0000 (09:22 +0800)]
usb: chipidea: retire flag CI_HDRC_PULLUP_ON_VBUS
Currently, the controller only runs when the ci->vbus_active is true.
So the flag CI_HDRC_PULLUP_ON_VBUS is useless no longer.
If the user doesn't have otgsc, he/she needs to change ci_handle_vbus_change
to update ci->vbus_active.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:57 +0000 (09:22 +0800)]
usb: chipidea: udc: fix misuse of REGS_SHARED and PULLUP_ON_VBUS flags
CI_HDRC_REGS_SHARED stands for the controller registers is shared
with other USB drivers, if all USB drivers are at chipidea/, it doesn't
needed to be set.
CI_HDRC_PULLUP_ON_VBUS stands for pullup dp when the vbus is on. This
flag doesn't need to be set if the vbus is always on for gadget
since dp has always pulled up after the gadget has initialized.
So, the current code seems to misuse this two flags.
- When the gadget initializes, the controller doesn't need to run if
it depends on vbus (CI_HDRC_PULLUP_ON_VBUS), it does not relate to
shared register.
- When the gadget starts (load one gadget module), the controller
can run if vbus is on (CI_HDRC_PULLUP_ON_VBUS), it also does not
relate to shared register.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:56 +0000 (09:22 +0800)]
usb: chipidea: add wait vbus lower than OTGSC_BSV before role starts
When the gadget role starts, we need to make sure the vbus is lower
than OTGSC_BSV, or there will be an vbus interrupt since we use
B_SESSION_VALID as vbus interrupt to indicate connect and disconnect.
When the host role starts, it may not be useful to wait vbus to lower
than OTGSC_BSV, but it can indicate some hardware problems like the
vbus is still higher than OTGSC_BSV after we disconnect to host some
time later (5000 milliseconds currently), which is obvious not correct.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:55 +0000 (09:22 +0800)]
usb: chipidea: add vbus interrupt handler
We add vbus interrupt handler at ci_otg_work, it uses OTGSC_BSV(at otgsc)
to know it is connect or disconnet event.
Meanwhile, we introduce two flags id_event and b_sess_valid_event to
indicate it is an id interrupt or a vbus interrupt.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:54 +0000 (09:22 +0800)]
usb: chipidea: move otg related things to otg file
Move otg related things to otg file.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:53 +0000 (09:22 +0800)]
usb: chipidea: disable all interrupts and clear all interrupts status
During the initialization, it needs to disable all interrupts
enable bit as well as clear all interrupts status bits to avoid
exceptional interrupt.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:52 +0000 (09:22 +0800)]
usb: chipidea: add flag CI_HDRC_DUAL_ROLE_NOT_OTG
Since we need otgsc to know vbus's status at some chipidea
controllers even it is peripheral-only mode. Besides, some
SoCs (eg, AR9331 SoC) don't have otgsc register even
the DCCPARAMS_DC and DCCPARAMS_HC are both 1 at CAP_DCCPARAMS.
We inroduce flag CI_HDRC_DUAL_ROLE_NOT_OTG to indicate if the
controller is dual role, but not supports OTG. If this flag is
not set, we follow the rule that if DCCPARAMS_DC and DCCPARAMS_HC
are both 1 at CAP_DCCPARAMS, then this controller is otg capable.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:51 +0000 (09:22 +0800)]
usb: chipidea: add role init and destroy APIs
- The role's init will be called at probe procedure.
- The role's destroy will be called at fail patch
at probe and driver's removal.
- The role's start/stop will be called when specific
role has started.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:50 +0000 (09:22 +0800)]
usb: chipidea: otg: add otg file used to access otgsc
This file is mainly used to access otgsc currently, it may
add otg related things in the future.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:49 +0000 (09:22 +0800)]
usb: chipidea: udc: otg_set_peripheral is useless for some chipidea users
It is useless at below cases:
- If we implement both usb host and device at chipidea driver.
- If we don't need phy->otg.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:48 +0000 (09:22 +0800)]
usb: chipidea: host: add vbus regulator control
For boards which have board level vbus control (eg, through gpio), we
need to vbus operation according to below rules:
- For host, we need open vbus before start hcd, and close it
after remove hcd.
- For otg, the vbus needs to be on/off when usb role switches.
When the host roles begins, it opens vbus; when the host role
finishes, it closes vbus.
We put vbus operation to host as host is the only vbus user,
When we are at host mode, the vbus is on, when we are not at
host mode, vbus should be off.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Peter Chen [Mon, 12 Aug 2013 01:22:47 +0000 (09:22 +0800)]
usb: chipidea: move vbus regulator operation to core
The vbus regulator is a common element for USB vbus operation,
So, move it from glue layer to core.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
usb: chipidea: prevent endless loop registering platform_devices when probe fails
Commit 40dcd0e ("usb: chipidea: add PTW, PTS and STS handling") introduced
the following code to the ci_hdrc_probe() function:
+ if (!dev->of_node && dev->parent)
+ dev->of_node = dev->parent->of_node;
This inadvertently associates the ci_hdrc device with the ci_hdrc_imx
driver (which created the ci_hdrc device in the first place).
This results in ci_hdrc_imx_probe() being run for the ci_hdrc device
if ci_hdrc_probe() fails for some reason.
ci_hdrc_imx_probe() will happily create a new ci_hdrc platform_device
whose probing will likewise fail and trigger a new invocation of
ci_hdrc_imx_probe() ... ad nauseam.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Reviewed-and-tested-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
This patch provides a cleaner solution to the problem described in
commit 20a677fd ("usb: chipidea: improve kconfig").
The goal to be achieved is to force USB_CHIPIDEA=m if either
USB_EHCI_HCD=m or USB_GADGET=m.
If both are 'y' USB_CHIPIDEA may be selected to be 'm' or 'y'.
The old patch had the drawback, that USB_CHIPIDEA could be chosen as
'y' though USB_EHCI_HCD or USB_GADGET (or both) were 'm' leading to a
situation where USB_CHIPIDEA_HOST or USB_CHIPIDEA_UDC vanished from
the config options producing a compilable but dysfunctional driver.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Reviewed-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
usb: chipidea: move hw_phymode_configure() into probe
Currently hw_phymode_configure() is located inside hw_device_reset(), which is
only called by chipidea udc driver.
When operating in host mode, we also need to call hw_phymode_configure() in
order to properly configure the PHY mode, so move this function into probe.
After this change, USB Host1 port on mx53qsb board is functional.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Arnaud Patard <arnaud.patard@rtp-net.org> Reviewed-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Fugang Duan [Mon, 19 Aug 2013 02:58:24 +0000 (10:58 +0800)]
ENGR00275619 net: fec: set reset phy gpio to high in .probe().
In .probe() call fec_of_init() to parse phy reset gpio, and
request the gpio for later use. For the init, we must set the
gpio to high to let phy power on.
Robin Gong [Tue, 13 Aug 2013 08:58:26 +0000 (16:58 +0800)]
ENGR00275004-1 input: touchscreen: max11801_ts: Add DCM mode for max11801 ADC
We need add DCM mode/AUX mode for ADC converter function of max11801, so that
it can be used to read voltage of battery. Meanwhile, let the driver based on
device tree. The patchset is based on below patch (V3.5.7):
1. Add support for VDDSOC/VDDPU operating points that track
the VDDARM_CAP within 50mV to the device tree.
2. Add CPU freq and VDDSOC/VDDPU operating points to MX6DL and MX6SL.
Anson Huang [Thu, 15 Aug 2013 20:18:22 +0000 (16:18 -0400)]
ENGR00275403 ARM: imx: Support CPU hotplug
When doing secondary cores enable/disable, the enable bit
and reset bit in SRC should be written together. Without
this, CPU hotplug can NOT pass stress test, and with this,
it can passed over 500k iterations CPU hotplug test with
many threads running in background, at least three boards
are tested.
When trying hotplug a secondary core, it should stay
in idle forever before it is disabled from SRC.
Fugang Duan [Fri, 16 Aug 2013 01:16:21 +0000 (09:16 +0800)]
ENGR00275469 net:fec: move devm_* and of_* apis to probe function
fec_reset_phy() function is called in fec_enet_open(). And
fec_reset_phy() call of_get_named_gpio() and devm_gpio_request_one()
apis, which makes no sense since the two apis do something that
should only be done at .probe() time.
So move two functions into fec_probe() and only leave gpio_set_value()
and msleep() calls in fec_reset_phy(). And remove fec_free_reset_gpio()
function.
Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:
Item#1: If add performance stress test while runing IEEE1588, the link
down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
no such issue found.
The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.
Anson Huang [Wed, 14 Aug 2013 19:51:41 +0000 (15:51 -0400)]
ENGR00275023-5 ARM: imx: Support standby mode for suspend
Support standby mode for suspend, standby mode will only
make CCM enter STOP mode with OSC on and no PMIC_STBY_REQ
asserted, standby mode focus more on resume latency than
power number.
Anson Huang [Wed, 14 Aug 2013 19:47:18 +0000 (15:47 -0400)]
ENGR00275023-4 ARM: imx: Setting CPU isolation according to dts
Different boards may use different PMICs, and the PMICs' power
rail ramp up time can impact the DSM mode a lot, so we need to
adjust the CPU isolation timing setting according to board dts
setting, if there is no such setting defined in dts, use default
value.
Sandor Yu [Wed, 14 Aug 2013 05:32:42 +0000 (13:32 +0800)]
ENGR00275070 arm: dts: add hdmi properties to i.mx6 sabreauto dts
- Add hdmi properties to dts for sabreauto board.
- Remove lcd properties from sabreauto dts, because no parallel lcd
panel for sabresdauto board.
- Change the primary lvds channel from 1 to 0 for the sabreauto board.
- Set hdmi as default secondly display for all i.mx6 board.
Current driver only do phy reset in probe function, which is
not right. Since some phy clock is disabled after module probe,
the phy enter abnormal status, which needs do reset to recovery
the phy. And do ifconfig ethx up/down test, the phy also enter
abnormal status.
The log as:
libphy: 2188000.ethernet:04 - Link is Up - 10/Full
libphy: 2188000.ethernet:04 - Link is Up - 100/Full
libphy: 2188000.ethernet:04 - Link is Down
libphy: 2188000.ethernet:04 - Link is Up - 10/Half
libphy: 2188000.ethernet:04 - Link is Up - 10/Full
libphy: 2188000.ethernet:04 - Link is Up - 100/Full
...
So, do phy reset if ethx up/down or do clock enable/disable
operation.
Fugang Duan [Wed, 14 Aug 2013 08:26:19 +0000 (16:26 +0800)]
ENGR00275246-03: ARM: imx6sl: config iomux-gpr1 to select clock for fec
Config iomux-gpr1 to select clock source for fec system clock.
Clear gpr1[14], gpr1[18-17] bit to select the fec clock source
from internal anatop PLL.
Fugang Duan [Wed, 14 Aug 2013 08:17:15 +0000 (16:17 +0800)]
ENGR00275246-02: ARM: imx6sl: add imx6sl iomux-gpr field define
Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
add fec related macro define.
Add fec phy reset for imx6sl evk board.
Add iomux gpr device node, which used for fec to clear gpr1[14],
gpr1[18-17] bit to select the fec clock sourcr from internal anatop PLL.
Shengjiu Wang [Fri, 9 Aug 2013 06:45:51 +0000 (14:45 +0800)]
ENGR00274585-9 ASoC: change error message to debug message
This error message is not actual error, which is a warning. When using
FE/BE, if there is widget which is used by playback and capture route, then
this message will be printed.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Shengjiu Wang [Fri, 9 Aug 2013 06:41:11 +0000 (14:41 +0800)]
ENGR00274585-1 dma: imx-sdma: update sdma to support p2p
For the sake of support asrc p2p, the sdma driver need to be updated.
1. Add another dma_request, p2p need two dma_request.
2. There are some cases which need to change the config after the
dma_request_channel. add dma_request config in dmaengine_slave_config().
3. add dma_request0 and dma_request1 in dma_slave_config for runtime config
in dmaengine_slave_config.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Robby Cai [Thu, 8 Aug 2013 03:23:54 +0000 (11:23 +0800)]
ENGR00274412-1 dma: pxp: Port ePxP driver to 3.10
It's ported from v3.5.7, which contains ePxP DMAENGINE driver and
a client driver named pxp_device. This patch also includes the changes:
- use uapi header file
- remove VM_RESERVED since it's deprecated, and drop redundant VM_IO flag
since it's automatically set in remap_pfn_range()
- use <linux/platform_data/dma-imx.h> instead of <mach/dma.h>
- use devm_kzalloc() instead in pxp_probe()
- use macro __KERNEL__ in pxp_dma uapi header to avoid definition conflict
Sandor Yu [Tue, 13 Aug 2013 08:55:20 +0000 (16:55 +0800)]
ENGR00274059-02 ARM: Add new dts for imx6q/imx6dl SabreSD hdcp
hdcp ddc pins conflict with i2c2,
add new dts file for imx6q and imx6dl SabreSD board,
enable hdcp and disable i2c2 in these dts files.
Remove hdmi pins property from mx6qdl-sabresd.dtsi.
Anson Huang [Thu, 8 Aug 2013 21:05:38 +0000 (17:05 -0400)]
ENGR00274473-1 regulator: add more notifier events
Some hardware modules need strict flows according
to regulator's enable/disable, such as for i.MX6
SOC's PU regulator, there is another power gate
in GPC module, it needs to disable PU modules' clock
before PU regulator is disabled and need to enable
clock right after PU regulator is enabled, then it
can do GPC's power gate operation.
So we need to add REGULATOR_EVENT_PRE_DISABLE and
REGULATOR_EVENT_ENABLE for regulator's notifier events.
Shawn Guo [Thu, 1 Aug 2013 04:22:04 +0000 (12:22 +0800)]
ARM: dts: imx6q: add quirky select input for USB_OTG_ID
For some reason, the select input of pin function USB_OTG_ID is not
implemented via a regular select input register but using the bit
USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4).
As per the workaround for such quirk implemented in pinctrl driver,
we need to compose the input_val cell as below.
31 23 15 7 0
| 0xff | shift | width | select |
Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and
0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell.
Shawn Guo [Sun, 4 Aug 2013 13:39:23 +0000 (21:39 +0800)]
pinctrl: imx: work around select input quirk
The select input for some pin may not be implemented using the regular
select input register but the general purpose register. A real example
is that imx6q designers found the select input for USB OTG ID pin is
missing at the very late stage, and can not add a new select input
register but have to use a general purpose register bit to implement it.
The patch adds a workaround for such select input quirk by interpreting
the input_val cell of pin function ID in a different way, so that all
the info that needed for setting up select input bits in general purpose
register could be decoded from there.
Shawn Guo [Tue, 13 Aug 2013 08:59:28 +0000 (16:59 +0800)]
ENGR00269945: ARM: imx6: report soc info via soc device
The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl. With the support, user space can get soc related
info by looking at sysfs like below.
Shawn Guo [Tue, 13 Aug 2013 06:59:43 +0000 (14:59 +0800)]
ENGR00269945: ARM: imx6qdl: add a common function to initialize revision from anatop
The patch creates a common function imx_init_revision_from_anatop() by
merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any
SoC that encodes revision info in anatop can use it to initialize
revision.
Shawn Guo [Tue, 13 Aug 2013 06:10:29 +0000 (14:10 +0800)]
ENGR00269945: ARM: imx6qdl: use common soc revision helpers
It calls imx_set_soc_revision() to set up soc revision in
imx6q_init_revision(), and replaces all the occurrences imx6q_revision()
and imx6dl_revision() with common helper imx_get_soc_revision().
Similar to what we do for cpu type, the patch adds helper functions
imx_set_soc_revision() and imx_get_soc_revision() to maintain
imx_soc_revision in cpu.c.
Nicolin Chen [Tue, 13 Aug 2013 03:37:54 +0000 (11:37 +0800)]
ENGR00274386-2 ASoC: imx-wm8962: Set MCLK source clock to 0Hz in hw_free()
When DAPM closed WM8962 after playback, its driver would prompt
'wm8962 0-001a: Unsupported sysclk ratio 500' due to the invalid
divisor calculated by WM8962 codec driver.
To fix it, we can work around by setting its MCLK source to 0Hz,
so the codec driver would never get an invalid divisor any more.
Since hw_params() would re-set the MCLK source, no need to worry
about any side-effect.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
We are using auto sample rate feature of WM8962, whereas it doesn't
support those sample rates bigger than 96KHz, 192Khz for example,
so 384 * samplerate would be too big for it to handle. When playing
192KHz 24bit wav file, the playback would be slower than normal.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
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