Hans de Goede [Sat, 22 Feb 2014 15:53:37 +0000 (16:53 +0100)]
ahci-imx: Port to library-ised ahci_platform
This avoids the ugliness of creating a nested platform device from probe.
While moving it around anyways, move the mk6q phy init code from probe
to imx_sata_enable, as the phy needs to be re-initialized on resume too,
otherwise the drive won't be recognized after resume.
Tested on a wandboard i.mx6 quad.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 90870d79d4f28711610dd2e72d8fa616c922d110)
Olliver Schinagl [Sat, 22 Feb 2014 15:53:36 +0000 (16:53 +0100)]
ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform
This patch adds support for the ahci sata controler found on Allwinner A10
and A20 SoCs to the ahci_platform driver.
Orignally written by Olliver Schinagl using the approach of having a platform
device which probe method creates a new child platform device which gets
driven by ahci_platform.c, as done by ahci_imx.c .
Refactored by Hans de Goede to add most of the non sunxi specific functionality
to ahci_platform.c and use a platform_data pointer from of_device_id for the
sunxi specific bits.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit c5754b5220f01e8722799d35c04a76e82c62d7d8)
Split suspend / resume code into host suspend / resume functionality and
resource enable / disabling phases, and export the new suspend_ / resume_host
functions.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 648cb6fd83b97f0f772db783a280af300fa9f2bc)
ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence
This commit refactors step 1 and 3 into separate functions, so the platform
drivers for AHCI implementations which need a specific order in step 2,
and / or need to do some custom register poking at some time, can re-use
ahci-platform.c code without needing to copy and paste it.
Note that ahci_platform_init_host's prototype takes the 3 non function
members of ahci_platform_data as arguments, the idea is that drivers using
the new exported utility functions will not use ahci_platform_data at all,
and hopefully in the future ahci_platform_data can go away entirely.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 23b07d4cb3c0c850055cf968af44019b8da185fb)
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 96a01ba52c60fdd74dd6e8cf06645d06515b1396)
Hans de Goede [Sat, 22 Feb 2014 15:53:32 +0000 (16:53 +0100)]
ahci-platform: Add support for an optional regulator for sata-target power
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 4b3e603a298db26c6c37e8b08adcce24d014df13)
Hans de Goede [Sat, 22 Feb 2014 15:53:31 +0000 (16:53 +0100)]
ahci-platform: Add support for devices with more then 1 clock
The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the
imx AHCI controller needs 3 clocks to be enabled.
tj: Minor comment formatting updates.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 156c5887948cd191417f18026aab9ce26e5a95da)
Hans de Goede [Sat, 22 Feb 2014 15:53:30 +0000 (16:53 +0100)]
libahci: Allow drivers to override start_engine
Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a
special register to be poked before starting the DMA engine.
This register gets reset on an ahci_stop_engine call, so there is no other
place then ahci_start_engine where this poking can be done.
This commit allows drivers to override ahci_start_engine behavior for use by
the Allwinner AHCI driver (and potentially other drivers in the future).
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 039ece38da45f5e6a94be3aa7611cf3634bc2461)
ARM: imx: fix register offset of pll7_usb_host gate clock
There is a copy&paste error on register offset of pll7_usb_host gate
clock introduced by i.MX6 PLL bypass support patches. The error breaks
the ENET function, because it overwrites the pll6_enet gate bit.
Axel Lin [Wed, 5 Mar 2014 10:02:43 +0000 (18:02 +0800)]
regulator: pfuze100: Add PFUZE200 support to Kconfig and module description
Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 2cee2121db44cfeee206d0854bedd52344eea444)
Axel Lin [Tue, 4 Mar 2014 10:20:14 +0000 (18:20 +0800)]
regulator: pfuze100: Add terminate entry for [i2c|of]_device_id tables
Also remove PFUZE_NUM to avoid below build warnings:
CC [M] drivers/regulator/pfuze100-regulator.o
drivers/regulator/pfuze100-regulator.c:86:2: warning: excess elements in array initializer [enabled by default]
drivers/regulator/pfuze100-regulator.c:86:2: warning: (near initialization for 'pfuze_device_id') [enabled by default]
drivers/regulator/pfuze100-regulator.c:93:2: warning: excess elements in array initializer [enabled by default]
drivers/regulator/pfuze100-regulator.c:93:2: warning: (near initialization for 'pfuze_dt_ids') [enabled by default]
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit e6c4c3378d82c5eeb136ed06b1a23651bcdaf739)
Robin Gong [Tue, 4 Mar 2014 09:40:36 +0000 (17:40 +0800)]
regulator: pfuze100: add pfuze200 support
support pfuze200 chip which remove SW1C and SW4 based on pfuze100.
Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f2518480c7b744296a5587990a54e3a284d932b8)
Fabio Estevam [Thu, 20 Feb 2014 16:47:02 +0000 (13:47 -0300)]
pfuze100-regulator: Return error on of_node_get() failure
If of_node_get() fails, we should return an error.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 6428789e11f056d58ed59c0c0aa7d381d0bf50f8)
Fabio Estevam [Wed, 19 Feb 2014 02:46:14 +0000 (23:46 -0300)]
pfuze100-regulator: Fix of_node_get() parameter
Since commit d7857c42 (regulator: pfuze100: Use of_get_child_by_name) we get
the following probe failure:
pfuze100-regulator 1-0008: Full layer: 1, Metal layer: 0
pfuze100-regulator 1-0008: FAB: 0, FIN: 0
pfuze100-regulator 1-0008: regulators node not found
pfuze100-regulator: probe of 1-0008 failed with error -22
Now that of_get_child_by_name() is used we should adjust the device_node pointer
'np' to not get the parent node anymore.
Suggested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 3e01c75a45740ef4a0ec657d7ca25ad0aa2f50e0)
Sachin Kamat [Fri, 14 Feb 2014 11:50:00 +0000 (17:20 +0530)]
regulator: pfuze100: Use of_get_child_by_name
of_find_node_by_name walks the allnodes list, and can thus walk
outside of the parent node. Use of_get_child_by_name instead.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit d7857c429475677a6a42d0dce7f870d6241edd41)
Thiago Farina [Sun, 26 Jan 2014 23:57:12 +0000 (21:57 -0200)]
regulator: Make use of rdev_get_id() function where possible.
Signed-off-by: Thiago Farina <tfarina@chromium.org> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit d55efa4d9bff20c98ca05e0bf458691e6869b5a1)
Shawn Guo [Tue, 26 Aug 2014 15:06:33 +0000 (23:06 +0800)]
ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver
Since ENABLE and BYPASS bits of PLLs are now implemented as separate
gate and mux clocks by clock drivers, the code handling these two bits
can be removed from clk-pllv3 driver.
This is the same change for imx6sx clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sx.
This is the same change for imx6sl clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sl.
The imx6q clock driver currently hard-codes all PLL clocks to source
from OSC24M without BYPASS support. The patch adds the missing lvds_in
clock which is mutually exclusive with lvds_gate, and implements BYPASS
and BYPASS_CLK_SRC selection for PLL clocks as per Figure 10-3. Primary
Clock Generation in IMX6DQRM, i.e. both BYPASS_CLK_SRC and BYPASS bits
are implemented as mux clocks, and ENABLE bit of PLL clocks is
implemented as a gate clock after BYPASS mux.
Shawn Guo [Tue, 26 Aug 2014 07:06:33 +0000 (15:06 +0800)]
ARM: imx: add an exclusive gate clock type
There are a couple of gate clocks are mutually exclusive on i.MX6, i.e.
LVDSCLK1_IBEN and LVDSCLK1_OBEN. They cannot be enabled simultaneously.
This patches adds an exclusive gate clock type specifically for such
case. The clock driver will need to call imx_clk_gate_exclusive() to
register a gate clock with parameter exclusive_mask indicating the mask
of gate bits which are mutually exclusive to this gate clock.
Right now, it only handles the exclusive gate clocks which are defined
in a single hardware register, which is the case we're running into
today. But it can be extended to handle exclusive gate clocks defined
in different registers later if needed.
Shengjiu Wang [Fri, 8 Aug 2014 07:02:47 +0000 (15:02 +0800)]
ARM: clk-imx6q: refine clock tree for ESAI
There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Rename
'esai' to 'esai_extal', 'esai_ahb' to 'esai_mem', and add 'esai_ipg'.
Make the clock for ESAI more clear and align them with imx6sx.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
(cherry-picked from commit d140d15ae366a002140dc46b73c7bd22ebe16489)
Some gpio-leds need retain the state even in suspend, such as charger led.
But this property missed in devicetree, add it.
(cooloney@gmail.com: fold DT binding updates into this patch)
Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Bryan Wu <cooloney@gmail.com>
(cherry picked from commit 4270a78d23eece0b25a13bff1e71d114ec547de4)
ENGR00330009-3 ARM: imx: change perclk to be from OSC
Change perclk to be from OSC for GPT on i.MX6SL, as ipg
clk may be scaled when system enters low bus mode, to make
system timer NOT drift, make perclk stay fixed.
ENGR00330009-2 ARM: imx: source gpt per clk from OSC for system timer
On i.MX6Q TO > 1.0, i.MX6DL and i.MX6SX, gpt per clock
can be from OSC instead of ipg_per, as ipg_per's rate
may be scaled when system enter low bus mode, to keep
system timer NOT drift, better to make gpt per clock
at fixed rate, here add support for gpt per clock to
be from OSC which is at fixed rate always.
There are some difference on this implementation of
gpt per clock source, see below for details:
i.MX6Q TO > 1.0: GPT_CR_CLKSRC, 3b'101 selects fix clock
of OSC / 8 for gpt per clk;
i.MX6DL and i.MX6SX: GPT_CR_CLKSRC, 3b'101 selects OSC
for gpt per clk, and we must enable GPT_CR_24MEM to
enable OSC clk source for gpt per, GPT_PR_PRESCALER24M
is for pre-scaling of this OSC clk, here set it to 8
to make gpt per clk is 3MHz;
i.MX6SL: ipg_per can be from OSC directly, so no need to
implement this new clk source for gpt per.
ENGR00330009-1 ARM: imx: add gpt_3m clk for i.mx6qdl and i.mx6sx
Add gpt_3m clock for i.mx6qdl, as gpt can source clock
from OSC, some i.MX6 series SOCs has fixed divider of
8 for gpt clock, so here add a fix clk of gpt_3m, register
this clk for system timer in MSL.
Shengjiu Wang [Tue, 9 Sep 2014 09:21:25 +0000 (17:21 +0800)]
ENGR00330403-4: ASoC: fsl_asrc: Add Memory to Memory support
ASRC M2M function is not able to put upstream due to its self-designed
ioctl protocol. So I just make a single patch for it and make it merge
into P2P driver as simply as possible.
The patch can only be maintained internally unless some one designs a
new protocol or implement the originally protocol by using some common
approach provided by Linux Kernel.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
ARM: dts: imx6sx: fix the pad setting for uart CTS_B
The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B'
IP port. Since uart IP port 'CTS_B' is output, and it don't need to
set 'SELECT_INPUT' bit.
Robin Gong [Fri, 15 Nov 2013 10:29:03 +0000 (18:29 +0800)]
ENGR00288351 sabresd_battery: fix usb charger detect when resume back on mx6sl
Fix below redundant log after first resume back on mx6slevk:
max8903-charger max8903.12: USB Charger Connected
It's caused by not add enough prepare for uok&dok which are connected, such as
i.MX6SL-EVK. In this case the board only support DC charger detect, so we
didn't need judge the uok pin for USB charger detect, although uok share with
dok pin.
Robin Gong [Tue, 13 Aug 2013 08:58:26 +0000 (16:58 +0800)]
ENGR00275004-1 input: touchscreen: max11801_ts: Add DCM mode for max11801 ADC
We need add DCM mode/AUX mode for ADC converter function of max11801, so that
it can be used to read voltage of battery. Meanwhile, let the driver based on
device tree. The patchset is based on below patch (V3.5.7):
ENGR00329844-04 ARM: dts: imx6qdl: add uart3 pad set for sabreauto board
Add imx6qdl-sabreauto board uart3 DTE pad set. To avoid a flood of
dts files, there comment out DTE pinctrl set. If user want to test
DTE mode, it needs to rebuild the DTB file.
ENGR00329844-03 ARM: dts: imx6sl-evk: add uart4 support
Add uart4 DCE and DTE pinctrl set. Since there have pin confliction,
so add new dts file. To avoid a flood of dts files, there comment out
DTE pinctrl set. If user want to test DTE mode, it needs to rebuild
the DTB file.
ENGR00329844-01 ARM: dts: imx6sx: add uart5 dte pad set for imx6sx-sdb board
Add imx6sx-sdb baord uart5 DTE pad set. To avoid a flood of dts files,
there only comment out DTE pinctrl set. If user want to test DTE mode,
it needs to rebuild the DTB file.
For DMA tx path, there have no sync between prepare the tx BD and
dma callback which can ensure tx_wor submit next dma request after
the last finished.
ENGR00321246 tty: serial: imx: fix wakeup fail after suspend for more than 30s
Before DMA finish, we have to disable flow control, otherwise
there have one corner issue like:
Flow control enable, RTS always is high while there have no uart
terminal connect to imx uart, and then user transmit data by the
uart, after some time, TX FIFO is _FULL_, SDMA still don't complete
the current transcation, so hold on. There no SDMA interrupt generate,
the "dma_wait" event cannot be waked up.
Huang Shijie [Wed, 11 Jun 2014 06:55:53 +0000 (14:55 +0800)]
ENGR00330746 serial: imx: change the wait even to interruptiable
The wait_event() makes the application hang for ever in the following case:
[1] the hardware flow control is enabled.
[2] the other end (or the remote end) is terminated, and the TX is still
waiting for the hardware flow control signal to become asserted.
This patch fixes it by changing the wait_event to wait_event_interruptible.
Shengjiu Wang [Fri, 5 Sep 2014 10:51:36 +0000 (18:51 +0800)]
ENGR00329948-3: dma: imx-sdma: Add hdmi audio support in sdma
There's a missing script for hdmi audio support in current sdma driver,
thus add it.
This HDMI script doesn't use bd to copy memory like a normal one does
but only to update the memory address for HDMI internal AHB DMA and
then trigger its procedure automatically.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Thu, 4 Sep 2014 02:52:45 +0000 (10:52 +0800)]
ENGR00329948-2: dma: imx-sdma: Add device to device support
This patch adds DEV_TO_DEV support for i.MX SDMA driver to support data
tranfer between two peripheral FIFOs. The per_2_per script requires two
peripheral addresses and two DMA requests, a bit different from the other
scripts.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
ENGR00330358 ARM: IMX6SL-EVK: PXP-V4L2: add pxp v4l2 support to 3.14 branch
1. Add the 'pxp_v4l2_out' entry to imx6sl-evk.dtb to enable
the pxp v4l2 output driver.
2. Correct the backlight device node position in imx6sl-evk.dtb.
ENGR00330163 ARM: clk-imx6sl: correct the pxp and epdc axi clock selections
The parent clocks of IMX6SL_CLK_PXP_AXI_SEL and IMX6SL_CLK_EPDC_AXI_SEL
clocks are not the same. So split the epdc_pxp_sels into two different
clock selections 'pxp_axi_sels' and 'epdc_axi_sels'.
Dong Aisheng [Wed, 27 Aug 2014 07:55:59 +0000 (15:55 +0800)]
ENGR00329352-1 regmap: regmap-mmio: make clk_id optionally when getting clock
According to clock framework, the clk_id could be NULL when getting clock.
But current code relies on a non null clk_id to get clock.
Changing the code to allow a null clk_id to get clock to make it more
reasonable to use.
And the regmap_mmio_gen_context will try to get clock by default but ignore
error if not finding the clock in case some regmap access not reply on
a specific clock.
Dong Aisheng [Thu, 26 Jun 2014 09:39:15 +0000 (17:39 +0800)]
ENGR00320355 dts: imx6: mmc index fixed by controller order
Make the linux mmc index to be fixed according to controller order.
This can make user easily to identify which mmcX corresponding to which
controller and kernel be able find the rootfs in a card plugged in a
specific slot persistently.
This is a eventually solution for finding mmc block devices correctly
for different cards on multi slots.
Sascha Hauer [Fri, 20 Jun 2014 07:08:16 +0000 (15:08 +0800)]
mmc: Allow setting slot index via devicetree alias
As with gpio, uart and others, allow specifying the name_idx via the
aliases-node in the devicetree.
On embedded devices, there is often a combination of removable (e.g.
SD card) and non-removable mmc devices (e.g. eMMC).
Therefore the name_idx might change depending on
- host of removable device
- removable card present or not
This makes it difficult to hard code the root device, if it is on the
non-removable device. E.g. if SD card is present eMMC will be mmcblk1,
if SD card is not present at boot, eMMC will be mmcblk0.
If the aliases-node is not found, the driver will act as before.
The original patch is from here:
https://www.mail-archive.com/linux-mmc@vger.kernel.org/msg26472.html
The patch requires additional alias_id fix or it won't work.
Because according to function definition the max_idx parameter of idx_alloc
is exclusive, so need add 1 or it will be unable to find the proper idx
within an invalid range.
Sascha Hauer [Thu, 22 May 2014 15:30:22 +0000 (17:30 +0200)]
of: Add helper for getting the maximum alias index for a stem
of_alias_max_index will return the maximum number for which an
alias of a given stem exists. This is useful for frameworks
whishing to reserve a number of device slots from dynamic
allocation.
ENGR00323682 MMC: Fixed boot_config overwritten by switch partition
In MMC driver, two variables: boot_config and part_config are used to
keep eCSD(179) PARTITION_CONFIG. The part_config is not updated when
set new boot_config, which causes the eCSD(179) is overwritten by
any following partition switching, so the new boot_config is lost.
ENGR00329475-5 ARM: imx: make sure OCOTP clk is enabled in MSL
As some modules need to access ocotp in MSL, so we need to
make sure it is enabled during MSL, after kernel boot up,
clk dirver will disable it in late init.
ENGR00329475-4 ARM: imx: support perclk and uart clk parent to OSC on i.mx6sx
change perclk parent to OSC instead of IPG, as IPG clock may
be changed by busfreq.
when kernel command line has "uart_from_osc" defined, uart clk will
select OSC as its parent, this is to make PLL3 be able to be off
for low power purpose, as we need all PLLs off in low power idle
mode.
ENGR00329475-2 ARM: imx: correct gpu2d_axi and gpu3d_axi clock setting
On i.MX6Q, gpu2d_axi and gpu3d_axi are either from AXI or
AHB clock, but on i.MX6DL, gpu2d_axi and gpu3d_axi are
from mmdc_ch0_axi_podf, and they can NOT be gated by mmdc_ch0_axi
's clock gate, the mux option register field(CCM_CBCMR)
is marked as "Reserved" now on i.MX6DL RM, so correct these
two clks setting.
clk: Support for clock parents and rates assigned from device tree
This patch adds helper functions to configure clock parents and rates
as specified through 'assigned-clock-parents', 'assigned-clock-rates'
DT properties for a clock provider or clock consumer device.
The helpers are now being called by the bus code for the platform, I2C
and SPI busses, before the driver probing and also in the clock core
after registration of a clock provider.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
[shawn.guo: cherry-pick commit 86be408bfbd8 from upstream] Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds of_clk_get_by_clkspec() helper function, which does only
a struct clk lookup from the clock providers. It is used in the subsequent
patch where parsing of a clock from device tree and the lookup from
providers needed to be split.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
[shawn.guo: cherry-pick commit 7f05e28f9dd3 from upstream] Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
luweizhou [Tue, 24 Jun 2014 04:15:00 +0000 (12:15 +0800)]
ENGR00314144 mxc: mlb: Rename the mxc_mlb150 to mxc_mlb.
Since i.MX6SX doesn't supports MLB150 , it is not strictly explicit to
name driver module as mxc_mlb150.ko. Rename it to mxc_mlb.ko.It would be
more common.
ENGR00311027 gpu:Limit the memory consumption for webgl
-When system memory is less than 200M, we will block further
memory allocation for webgl.
It's for pass webgl 1.0.2 conformance case conformance/rendering/multisample-cor
ruption.html
It's a temperory patch from vivante, should be removed in 5.0.11p2.
Original patch name:5x_crash_patch.diff
Conflict:
drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c
Revert "ENGR00317981: gpu-viv: use runtime pm for VDDPU management" and
move the same change logic to file gc_hal_kernel_platform_imx6q14.c for
following p1 framework change.
With commit 4ed95424c715 ("ARM: 8122/1: smp_scu: enable SCU standby
support"), the STANDBY bit of SCU is handled by core function
scu_enable(). So imx_scu_standby_enable() can be removed now.
projects / karo-tx-linux.git / log