1.Common code of thermal_sys has some bug,could
not set the mode via sysfs using echo enable/disabled
command;
2.Since the anatop thermal formula still not accurate,
in order to help test and adjust the trip point of
anatop thermal zone, we add the set trip point temp
value into the sysfs interface.
Sometimes when system very busy,hotplug may fail
because CPU0 has no chance to kill secondary CPUs
from hardware,secondary CPUs keep enter/exit wfi
,and we have a printk after wfi,that makes CPU0
has no chance to kill secondary CPUs,we should
remove this printk.
in uSDHC controller, SDCLKFS field in SYS_CTRL register
is defined differently from eSDHC
In Single Data Rate mode(DDR_EN bit of MIXERCTRL is '0')
Only the following settings are allowed:
80h) Base clock divided by 256
40h) Base clock divided by 128
20h) Base clock divided by 64
10h) Base clock divided by 32
08h) Base clock divided by 16
04h) Base clock divided by 8
02h) Base clock divided by 4
01h) Base clock divided by 2
00h) Base clock divided by 1
While in Dual Data Rate mode(DDR_EN bit of MIXERCTRL is '1')
Only the following settings are allowed:
80h) Base clock divided by 512
40h) Base clock divided by 256
20h) Base clock divided by 128
10h) Base clock divided by 64
08h) Base clock divided by 32
04h) Base clock divided by 16
02h) Base clock divided by 8
01h) Base clock divided by 4
00h) Base clock divided by 2
so the clock setting function should be changed to fit the definition
Lionel Xu [Fri, 26 Aug 2011 10:26:45 +0000 (18:26 +0800)]
ENGR00139255-2 MX6Q_BSP ESAI: Add esai recording support
Add ESAI recording to mx6q platform.
Note: since there is pad conflict between esai record and fec, add a boot
argument esai_record to deal with it. This argument is required to enable
the record functionality.
Lionel Xu [Fri, 26 Aug 2011 10:20:14 +0000 (18:20 +0800)]
ENGR00139255-1 MX6Q_BSP ESAI: Add esai recording support
Add ESAI recording to mx6q platform.
Note: since there is pad conflict between esai record and fec, add a boot
argument esai_record to deal with it. This argument is required to enable
the record functionality.
Jason Chen [Mon, 22 Aug 2011 03:21:59 +0000 (11:21 +0800)]
ENGR00155141 ipuv3 split mode: adjust split calculate function
One issue was found in split mode: For input 1024x600, output 1360x768,
after stripe calculation, input width and input column are not right.
This patch fix this issue.
Tony Lin [Wed, 24 Aug 2011 05:00:56 +0000 (13:00 +0800)]
ENGR00153895 [MX6Q]SD: SD3 clock is not off, when no SD card is in use
the patch brings in clock management, not only card removal will gate off
corresponding SD clock, but also a timeout after last request will gate off
the SD clock.
Tony Lin [Wed, 24 Aug 2011 09:10:31 +0000 (17:10 +0800)]
ENGR00155288 [mx6q]sd dat1 glitch causes system panic
some sd cards insertion will cause a glitch on sd dat1
which is also a card interrupt signal. Thus the wrongly
generated card interrupt will make system panic because
there's no registered sdio interrupt handler.
the patch fixes this issue.
Anson Huang [Tue, 23 Aug 2011 02:44:52 +0000 (10:44 +0800)]
ENGR00155219 [MX6]Add protection for dormant mode
1. clean up ddr io code, using macro define;
2. we should consider if the wake up irq comes
during execution of low-power(ms6q_suspend.S)
code but before ARM enter wfi, in this scenario,
system will not enter STOP mode, thus, the resume
code will cause system fail, so we need to consider
if system can not enter STOP mode, should resume
immediately after wfi.
Anson Huang [Wed, 17 Aug 2011 10:49:19 +0000 (18:49 +0800)]
ENGR00154961 [MX6]system hang in suspend with irq
If the wakeup source irq pending during suspend process, system will
hang, we need to abort suspend, and resume immediately to make system
running normally.
- Add VGA support. The command option to use VGA as primary
display: video=mxcfb0:dev=vga,VGA-XGA,if=GBR24 ard-vga
For VGA, Need to disable Ethernet and short PIN 1-2 of J14
and J16.
- Add LVDS support. The default display is LVDS0. LVDS1 needs
further modification on ldb driver
Anson Huang [Wed, 17 Aug 2011 04:34:28 +0000 (12:34 +0800)]
ENGR00154922 [MX6]Disable some clocks during boot
To save power, we should disable as much as possible
when kernel boot up, only leaving the necessary clocks
on, devices should enable their clock in init.This is
necessary for our MX6q, or the chip will be too hot,
may damage.
After doing this change, we can save more than 150mA@5V.
Anson Huang [Tue, 16 Aug 2011 01:23:01 +0000 (09:23 +0800)]
ENGR00154917 [MX6]Enable MMDC low-power mode
1. Set MMDC pad ctrl to low-power mode when dormant;
2. DRAM_RESET can't be changed due to hardware design;
3. GPR_CTLDS should be changed to lower the MMDC IO
power to 0mA, but it needs hardware change, will add it
in next hardware version after we figure out how to
change the hardware.
Current MMDC data in dormant is:
IO: 28mA@1.5V;
DDR: 35mA@1.5V.
Tony Lin [Thu, 11 Aug 2011 09:35:20 +0000 (17:35 +0800)]
ENGR00139261 [MX6Q]support 8 bit MMC and eMMC DDR mode
enable 8 bit MMC mode according to mmc stack.
enable eMMC DDR mode according to mmc stack, but change
sdhci a little, since sdhci does not support DDR mode so
far.
Peter Chen [Thu, 11 Aug 2011 02:51:45 +0000 (10:51 +0800)]
ENGR00154704 usb-gadget: wmb is needed after dtd pointer is updated for armv7
At armv7 SoC, the dma_alloc_coherent returns non-cachable, but
bufferable region, so the driver needs to drain write buffer by
itself, if the controller needs to visit dma buffer immediately
after cpu writes
There is a discussion for this armv7 change:
http://marc.info/?t=127918539100004&r=1&w=2
For this issue, the next dtd pointer is invalid sometimes, the reason
is the region which is used to store dtd is dma buffer, so the data may
not be written to memory when the controller visit this data.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Wed, 10 Aug 2011 11:37:16 +0000 (19:37 +0800)]
ENGR00154703 usb-gadget: fix spin_lock recursion problem at SMP platform
- The spin_lock is at interrupt handler, so all code routines
using at interrupt handler are forbidden to hold spin_lock again
- Move the code which needs to be protected by spin_lock to workqueue,
and it will be called when workqueue is scheduled.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Jason Chen [Thu, 4 Aug 2011 07:29:57 +0000 (15:29 +0800)]
ENGR00154108-3 mxc ldb: make ldb support two ipu in separate mode
make ldb support two ipu in separate mode
cmdline option changed:
"ldb=spl0/1" -- split mode on DI0/1
"ldb=dul0/1" -- dual mode on DI0/1
"ldb=sin0/1" -- single mode on LVDS0/1
"ldb=sep0/1" -- separate mode begin from LVDS0/1
there are two LVDS channels(LVDS0 and LVDS1) which can transfer video
datas, there two channels can be used as split/dual/single/separate mode.
split mode means display data from DI0 or DI1 will send to both channels
LVDS0+LVDS1.
dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
and LVDS1, it said, LVDS0 and LVDS1 has the same content.
single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
at the same time.
while when imx_timeout() may invoked in following stack:
run_timer_softirq():
--> spin_lock_irqsave(timer->base->lock, flags);
imx_timeout();
--> spin_lock_irqsave(&sport->port.lock, flags);
...;
--> spin_unlock_irqrestore(&sport->port.lock, flags);
spin_unlock_irqrestore(timer->base->lock, flags);
the above two cases hold lock with revert order, may
deadlock in SMP platform.
Anish Trivedi [Tue, 2 Aug 2011 21:23:28 +0000 (16:23 -0500)]
ENGR00154209 SNVS RTC: Update comments for errata number
Add TKT052983 errata number to comments field. This errata
requires reading the counter value twice until both
values match to ensure integrity of read value.
Anson Huang [Wed, 3 Aug 2011 01:47:32 +0000 (09:47 +0800)]
ENGR00154211 [MX6]Add workaround for wdog errata
Errata number:TKT039676
WDOG sw reset is generated by writing to its
control register. WDOG's reset is activated by
ipg_clk_s, and is de-activated (later) by a
synchronized CKIL (32KHz clock). On the other
hand SRC samples the WDOG reset with an
unsynchronized CKIL clock. If the write to WDOG
control register happens between the edges of
unsynchronized and synchronized CKIL clocks SRC
will miss the wdog reset pulse.
Anson Huang [Tue, 2 Aug 2011 09:24:15 +0000 (17:24 +0800)]
ENGR00154056-2 [MX6]Enable dormant mode in suspend
1. Enable dormant mode in suspend, which means arm
core will be powered off when enter wfi, the latest
command for stop mode and dormant mode are as below:
echo standby > /sys/power/state
-> stop mode with arm core power on
echo mem > /sys/power/state
-> stop mode with arm core power off
Sammy He [Thu, 28 Jul 2011 11:50:31 +0000 (19:50 +0800)]
ENGR00153830-2 vpu: Add VPU_IOC_REQ_VSHARE_MEM ioctl for shared memory
Add vmalloced memory for multi-instances shared memory, vpu lib
will call mmap for accessing the memory.
VPU_IOC_GET_SHARE_MEM ioctl is still reserved for some time since
vpu lib still uses it for mx5x now. Will remove it after mx5x changes
to this new added memory later.
ENGR00153913: MX6x - Fix bug in set_parent and set_rate functions in clock code
Some set_parent() functions in clock code were using incorrect mask
resulting in wrong parent being set for the clocks.
Fix by using the correct mask.
The pre and post dividers for certain clocks were set incorrectly,
fix this by using the correct number of bits for the dividers.
Fix the set_rate function for ipu1_di1_clk.
Jason Chen [Wed, 27 Jul 2011 08:16:46 +0000 (16:16 +0800)]
ENGR00153785 ipuv3: use ipu internal divider for external di clock
on imx6q, pll5 can only provide rate >=650M, and ipu_di_clk only has max
divider 8, so need use ipu internal clock divider for some low resolution
case. For example 640x480p60 need 25.2MHz pixel clock.
Jason Chen [Wed, 27 Jul 2011 06:13:58 +0000 (14:13 +0800)]
ENGR00153761 imx6q ipuv3: improve display quality
to avoid ipu starvation issue.
1. enable IPU AXI cache in uboot
2. set Qos to 7 for IPU to highest priority in uboot.
3. set AXI id to 0 for high priority IDMA channel in linux.
Jason Chen [Wed, 27 Jul 2011 06:06:18 +0000 (14:06 +0800)]
ENGR00153757 mxc_hdmi: fix build error of mxc_hdmi.c
Fix build error of below:
`mxc_hdmi_remove' referenced in section
`.data' of drivers/built-in.o: defined in discarded section
`.exit.text' of drivers/built-in.o`
Danny Nold [Tue, 26 Jul 2011 03:01:15 +0000 (22:01 -0500)]
ENGR00153670-4 - MXC HDMI: Add support for basic HDMI operation
- Add MXC HDMI to kconfig and makefile
- Add initial mxc_hdmi.c file to provide basic HDMI functionality:
- Basic HDMI output functional
- Support for reading EDID via I2C and registering
video modes with IPU
- Support for output from IPU1 DI0
- These features not yet added:
- Hotplug support
- Dual display with LVDS
- Power management
- Support for FB notifications
- Changes to IPU to allow HDMI to use source clocks that it needs
Signed-off-by: Danny Nold <dannynold@freescale.com>
Danny Nold [Tue, 26 Jul 2011 02:39:50 +0000 (21:39 -0500)]
ENGR00153670-2 - mach-mx6: Add support for MXC HDMI
- Add MXC HDMI initialization structures and calls to SABRE board file.
- Add HDMI clock definitions and functions for PLL5 (main video clock
used by HDMI).
Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00153651-1 ESAI: Prepare MSL support for esai/cs42888 audio codec driver
1) Add machine specific code for esai/cs42888 driver support, including pad
control, clk setting, i2c setting, etc.
2) Enable audio support in default config.
projects / karo-tx-linux.git / log