Keith Packard [Sun, 3 Oct 2010 07:33:06 +0000 (00:33 -0700)]
drm/i915: Use pipe state to tell when pipe is off
Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.
Contrarywise, disabling the plane will not cause the display line
value to stop changing, so instead we wait for the vblank interrupt
bit to get set. And, we only do this when we're not about to wait for
the pipe to turn off.
Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Keith Packard [Sun, 3 Oct 2010 07:33:05 +0000 (00:33 -0700)]
drm/i915: vblank status not valid while training display port
While the display port is in training mode, vblank interrupts don't
occur. Because we have to wait for the display port output to turn on
before starting the training sequence, enable the output in 'normal'
mode so that we can tell when a vblank has occurred, then start the
training sequence.
Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Sat, 2 Oct 2010 14:12:41 +0000 (15:12 +0100)]
drm/i915: Don't mask the return code whilst relocating.
The return from move_to_gtt_domain() may indicate a pending signal which
needs to handled as opposed to an actual error, for instance, so report
the original return value rather than forcing an EINVAL.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Fri, 1 Oct 2010 13:57:56 +0000 (14:57 +0100)]
drm/i915: If the GPU hangs twice within 5 seconds, declare it wedged.
The issue is that we may become stuck executing a long running shader
and continually attempt to reset the GPU. (Or maybe we tickle some bug
and need to break the vicious cycle.) So if we are detect a second hang
within 5 seconds, give up trying to programme the GPU and report it
wedged.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Thu, 30 Sep 2010 14:08:57 +0000 (15:08 +0100)]
drm/i915: Force the domain to CPU on unbinding whilst wedged.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30083 Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Thu, 30 Sep 2010 10:46:12 +0000 (11:46 +0100)]
drm: Move the GTT accounting to i915
Only drm/i915 does the bookkeeping that makes the information useful,
and the information maintained is driver specific, so move it out of the
core and into its single user.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Dave Airlie <airlied@redhat.com>
Simon Que [Thu, 30 Sep 2010 08:36:39 +0000 (09:36 +0100)]
i915: Added function to initialize VBT settings
Added a function that sets the LVDS values to default settings. This
will be called by intel_init_bios before checking for the VBT (video BIOS
table). The default values are thus loaded regardless of whether a VBT
is found.
The default settings in each parse function have been moved to the new
function. This consolidates all the default settings into one place.
The default dither bit value has been changed from 0 to 1. We can
assume that display devices will want dithering enabled.
Signed-off-by: Simon Que <sque@chromium.org> Acked-by: Olof Johansson <olof@lixom.net>
[ickle: fixup for -next] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Wed, 29 Sep 2010 11:26:37 +0000 (12:26 +0100)]
drm/i915: Avoid blocking the kworker thread on a stuck mutex
Just reschedule the retire requests again if the device is currently
busy. The request list will be pruned along other paths so will never
grow unbounded and so we can afford to miss the occasional pruning.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Fri, 24 Sep 2010 11:52:03 +0000 (12:52 +0100)]
drm/i915/sdvo: Fix GMBUSification
Besides a couple of bugs when writing more than a single byte along the
GMBUS, SDVO was completely failing whilst trying to use GMBUS, so use
bit banging instead.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Tue, 28 Sep 2010 09:07:56 +0000 (10:07 +0100)]
Revert "drm/i915: Drop ring->lazy_request"
With multiple rings generating requests independently, the outstanding
requests must also be track independently.
Reported-by: Wang Jinjin <jinjin.wang@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30380 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The IPS driver needs to know the current power consumption of the GMCH
in order to make decisions about when to increase or decrease the CPU
and/or GPU power envelope. So fix up the divisions to save the results
so the numbers are actually correct (contrary to some earlier comments
and code, these functions do not modify the first argument and use it
for the result).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
Chris Wilson [Sun, 26 Sep 2010 10:03:27 +0000 (11:03 +0100)]
drm/i915: Convert the file mutex into a spinlock
Daniel Vetter pointed out that in this case is would be clearer and
cleaner to use a spinlock instead of a mutex to protect the per-file
request list manipulation. Make it so.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Daniel Vetter [Fri, 24 Sep 2010 19:14:22 +0000 (21:14 +0200)]
drm/i915: kill per-ring macros
Two macros that use a base address for HWS_PGA were missing, add them.
Also switch the remaining users of *_ACTHD to the ring-base one.
Kill the other ring-specific macros because they're now unused.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[ickle: And silence checkpatch whilst in the vicinity] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Sat, 25 Sep 2010 09:19:17 +0000 (10:19 +0100)]
drm/i915: Adjust hangcheck EIO semantics
Owain Ainsworth reported an issue between the interaction of the
hangcheck and userspace immediately (and permanently) falling back to
s/w rasterisation. In order to break the mutex and begin resetting the
GPU, we must abort the current operation (usually within the wait) and
climb sufficiently far back up the call chain to drop the mutex. In his
implementation, Owain has a loop within the ioctl handler to detect the
hang and then sleep until the error handler has run. I've chosen to
return to userspace and report an EAGAIN which should trigger the
userspace ioctl handler to repeat the call (simply because it felt less
invasive...). Before hitting a wedged GPU, we then wait upon completion
of the error handler.
Reported-by: Owain G. Ainsworth <zerooa@googlemail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Fri, 24 Sep 2010 15:02:42 +0000 (16:02 +0100)]
drm/i915: Only hold a process-local lock whilst throttling.
Avoid cause latencies in other clients by not taking the global struct
mutex and moving the per-client request manipulation a local per-client
mutex. For example, this allows a compositor to schedule a page-flip
(through X) whilst an OpenGL application is monopolising the GPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Hette Visser [Fri, 24 Sep 2010 09:51:30 +0000 (10:51 +0100)]
drm/i915/dp: Wait for PP_CONTROL to take effect.
This patch fixes the black screen bug on Dell e6510, by
adding two delays to give the eDP panel time to turn on before we
continue with the next write.
300ms is rather arbitray and a rather long sleep, we need to find a way
of refining this value.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29278 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Jan Beulich [Fri, 24 Sep 2010 12:25:30 +0000 (13:25 +0100)]
some clean up to intel-gtt.c
In commit e517a5e97080bbe52857bd0d7df9b66602d53c4d the call to
map_page_into_agp() got removed from intel_i830_setup_flush(), but the
counterpart call from intel_i830_fini_flush() to unmap_page_from_agp()
was left in place.
Additionally, the page allocated here never gets its physical address
used for sending to hardware, so there's no need to allocate it with
GFP_DMA32. Nor is __GFP_ZERO really necessary, as the page is used
only to store data to force flushing of some internal processor state.
Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
In the event that the external chipset doesn't implement the
GET_SUPPORTED_ENHANCEMENTS commands, gracefully treat it as having no
enhancments rather than bailing.
Reported-and-tested-by: Woody Suwalski <terraluna977@gmail.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=18342 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Thu, 23 Sep 2010 15:15:21 +0000 (16:15 +0100)]
drm/i915/sdvo: Cleanup connector on error path
We weren't unlinking the freed connector from the drm lists, and so
hit some use-after-free if we failed to initialise the connector.
Reported-and-tested-by: Woody Suwalski <terraluna977@gmail.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=18342 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
A minor typo caused a single fence register to be incorrectly
programmed, resulting in occassional tiling corruption.
Reported-and-tested-by: Hans de Bruin <bruinjm@xs4all.nl>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=18962 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
Chris Wilson [Wed, 22 Sep 2010 17:17:01 +0000 (18:17 +0100)]
drm/i915/crt: Use a DDC probe on 0xA0 before load-detect
The BIOS writer's guide suggests that a VGA connection will ACK a write
to address 0xA0 and that this should be used before doing legacy
load-detection. Considering the extreme cost of load-detection,
performing an extra DDC seems a risk worth taking.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Wed, 22 Sep 2010 09:54:48 +0000 (10:54 +0100)]
drm/i915: Don't offset the pin used for crt_ddc
Previously when converting the GMBUS pin to the GPIO reg, we would
offset the pin by one and then use the look-up table. Now that we first
try to use the GMBUS pin, we no longer need the offset and can use the
value from the VBIOS directly.
Reported-by: Carlos R. Mafra <crmafra2@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Tue, 21 Sep 2010 13:06:12 +0000 (14:06 +0100)]
drm/i915/lvds: Unlock the PP register when panel-fitting
As we do not wait for the panel to turn off when we need to adjust the
panel-fitting registers we also need to unlock the PLLs as with the
non-pfit update path.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Wed, 8 Sep 2010 15:30:16 +0000 (16:30 +0100)]
drm/i915: Drop crtc->fb pin on disable.
In order to handle disable_functions() where the framebuffer is
decoupled from the crtc we need to unpin the fb in order to prevent a
leak.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29857 Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Wed, 8 Sep 2010 08:45:11 +0000 (09:45 +0100)]
drm/i915: Disable output polling across suspend & resume
Suspending (especially hibernating) may take a finite amount of time,
during which a hotplug event may trigger and we will attempt to handle
it with inconsistent state. Disable hotplug polling around suspend and
resume.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30070 Reported-by: Rui Tiago Matos <tiagomatos@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Daniel Vetter [Sat, 11 Sep 2010 19:31:04 +0000 (21:31 +0200)]
intel-gtt: generic (insert|remove)_entries for i830
Well, not all too generic because it does not yet support dmar.
Add a new function check_flags to ensure that non-gem code does
not try to screw us over.
v2: Beautify i830_check_flags with an idea from Chris Wilson.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Daniel Vetter [Tue, 7 Sep 2010 20:41:04 +0000 (22:41 +0200)]
intel-gtt: introduce pte write function for i8xx/i915/i945
And put it to use in the gtt configuration code that writes
the scratch page addr in all gtt ptes. This makes intel_i830_configure
generic, hence rename it to intel_fake_agp_configure.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Daniel Vetter [Tue, 7 Sep 2010 20:11:15 +0000 (22:11 +0200)]
intel-gtt: initialize our own scratch page
The intel gtt fake agp driver is the only agp driver to use dma
address remapping. So it makes sense to fold this code back into the
only user (and thus reduce the reliance on the agp code).
This patch does the first step by initializing (and remapping) the
scratch page in a new function intel_gtt_setup_scratch_page.
Unfortunately intel_gtt_cleanup had to move to avoid a forward
declaration. The new scratch page is not yet used, though.
v2: Refactor out scratch page teardown. Suggested by Chris Wilson on
irc. This makes it clear what's going on and results in a nice
symmetry between setup and teardown.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Mon, 20 Sep 2010 16:36:15 +0000 (17:36 +0100)]
drm/i915: Track pinned objects
Keep a list of pinned objects and display it via debugfs. Now all
objects that exist in the GTT are always tracked on one of the
active, flushing, inactive or pinned lists.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Mon, 20 Sep 2010 10:40:50 +0000 (11:40 +0100)]
drm/i915: Track gpu fence usage
Track if the gpu requires the fence for the execution of a batch buffer
and so only wait upon the retirement of the object's last rendering
seqno if the fence is in use by the GPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drm/i915: add a new BSD ring buffer for Sandybridge
This ring buffer is used for video decoding/encoding on Sandybridge.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drm/i915: add set_tail hook in struct intel_ring_buffer
This is prepared for video codec ring buffer on Sandybridge. It is
needed to read/write more than one register to move the tail pointer of
the video codec ring on Sandybridge.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
projects / karo-tx-linux.git / log