Olof Johansson [Mon, 26 May 2014 20:00:08 +0000 (13:00 -0700)]
Merge branch 'next/soc' into for-next
* next/soc:
ARM: DRA752: add detection of SoC information
ARM: OMAP2+: Remove suspend_set_ops from common pm late init
ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data
ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them)
Olof Johansson [Mon, 26 May 2014 20:00:04 +0000 (13:00 -0700)]
Merge branch 'next/cleanup' into for-next
* next/cleanup:
ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
ARM: OMAP2+: PRCM: cleanup some header includes
ARM: OMAP4: CM: use cm_base* in register address calculations
ARM: OMAP2/3: CM: remove some external dependencies
ARM: OMAP2+: prcm: add omap_test_timeout to prcm-common.h
ARM: OMAP3: CM: remove a few OMAP34XX_CM_REGADDR defines
ARM: OMAP: debug-leds: raw read and write endian fix
ARM: OMAP: counter-32k: raw read and write endian fix
ARM: OMAP: dmtimer: raw read and write endian fix
ARM: OMAP2+: raw read and write endian fix
Olof Johansson [Mon, 26 May 2014 19:59:00 +0000 (12:59 -0700)]
Merge tag 'omap-for-v3.16/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "ARM: omap prcm changes for v3.16 merge window" from Tony Lindgren:
PRCM changes for omaps. I ended up merging these with the
big endian changes because of the merge conflicts for read
and write operations. Via Paul Walmsley <paul@pwsan.com>:
Some OMAP PRCM cleanup patches. These help prepare to convert the PRCM
code into drivers.
Basic build, boot, and PM test results are available here:
* tag 'omap-for-v3.16/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
ARM: OMAP2+: PRCM: cleanup some header includes
ARM: OMAP4: CM: use cm_base* in register address calculations
ARM: OMAP2/3: CM: remove some external dependencies
ARM: OMAP2+: prcm: add omap_test_timeout to prcm-common.h
ARM: OMAP3: CM: remove a few OMAP34XX_CM_REGADDR defines
ARM: OMAP: debug-leds: raw read and write endian fix
ARM: OMAP: counter-32k: raw read and write endian fix
ARM: OMAP: dmtimer: raw read and write endian fix
ARM: OMAP2+: raw read and write endian fix
Olof Johansson [Mon, 26 May 2014 19:57:33 +0000 (12:57 -0700)]
Merge tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "ARM: omap soc changes for v3.16 merge window" from Tony Lindgren:
SoC related changes for omaps.
* tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA752: add detection of SoC information
ARM: OMAP2+: Remove suspend_set_ops from common pm late init
ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data
ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them)
Arnd Bergmann [Mon, 26 May 2014 15:14:57 +0000 (17:14 +0200)]
ARM: sunxi: allow building without reset controller
The sunxi reset controller code is only used with sun6i (a31).
After the platform has been split up into per-soc options, it's
now possible to build it without the reset controller code, so
the base platform init must not call into the reset driver
if that is turned off at compile time.
Arnd Bergmann [Mon, 26 May 2014 15:25:22 +0000 (17:25 +0200)]
ARM: vexpress: refine dependencies for new code
The versatile express changes for 3.16 introduced a number of
build regressions for randconfig kernels by not tracking dependencies
between the components right.
This patch tries to rectify that:
* the mach-vexpress code cannot link without the syscfg driver,
which in turn needs MFD_VEXPRESS_SYSREG
* various drivers call devm_regmap_init_vexpress_config(), which
has to be exported so it can be used by loadable modules
* the configuration bus uses OF DT helper functions that are not
available to platforms disable CONFIG_OF
* The sysreg driver exports GPIOs through gpiolib, which can
be disabled on some platforms.
* The clocksource code cannot be built on platforms that don't
use modern timekeeping but rely on gettimeoffset.
Heiko Stübner [Fri, 23 May 2014 20:58:53 +0000 (22:58 +0200)]
clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
The originally used PNAME macro from the core samsung clock infrastructure
declares the created array as initdata, creating section mismatch warnings
in the dclk driver.
Thus declare them directly, removing these warning.
Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Olof Johansson <olof@lixom.net>
Heiko Stübner [Thu, 27 Mar 2014 00:06:32 +0000 (01:06 +0100)]
ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE
With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore
to reference the relevant smp_ops in the board file, but instead it can
simply be set by the enable-method property of the cpu nodes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Olof Johansson <olof@lixom.net>
Florian Fainelli [Mon, 19 May 2014 20:05:59 +0000 (13:05 -0700)]
bus: add Broadcom GISB bus arbiter timeout/error handler
This patch adds support for the Broadcom GISB arbiter bus timeout/error
handler. GISB is a proprietary bus used by Broadcom Set Top Box
System-on-a-chip devices (BCM7xxx) which allows multiple masters and
clients to be interfaced with each other.
The bus arbiter offers support for generating two interrupts towards the
host CPU, thus allowing us to "catch" clock gated masters, or masters
being volontarily blocked for powersaving purposes, or do general system
troubleshooting.
We also register a hook with the ARM fault exception handling to allow
printing a more informative message than "imprecise external abort at
0x00000000" for instance.
Arnd Bergmann [Fri, 23 May 2014 22:45:58 +0000 (00:45 +0200)]
Merge tag 'qcom-drivers-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/drivers
Qualcomm ARM Based driver Updates for v3.16
* Introduce drivers/soc directory for misc SoC specific code
* Add driver to configure GSBI device
* tag 'qcom-drivers-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
soc: qcom: Add GSBI driver
soc: Introduce drivers/soc place-holder for SOC specific drivers
Arnd Bergmann [Fri, 23 May 2014 22:28:55 +0000 (00:28 +0200)]
Merge tag 'for-3.16/bcm-cleanup' of git://github.com/broadcom/mach-bcm into next/cleanup
* Clean up mach-bcm config and build targets
* Clean up bcm281xx/21664 SMC code
* Clean up bcm281xx/21664 L2C code
* tag 'for-3.16/bcm-cleanup' of git://github.com/broadcom/mach-bcm:
ARM: bcm: rename "kona.h" and "kona.c"
ARM: bcm: rewrite commentary for bcm_kona_do_smc()
ARM: bcm: use inline assembly for "smc" request
ARM: bcm: tidy up a few includes
ARM: bcm: config option for l2 cache support
ARM: bcm: don't special-case CPU 0 in bcm_kona_smc()
ARM: bcm: have bcm_kona_smc() return request result
ARM: bcm: clean up SMC code
ARM: bcm: err, don't BUG() on SMC init failures
ARM: bcm: use memory accessors for ioremapped area
ARM: bcm: clean up config and build targets
Stefan Agner [Wed, 14 May 2014 21:31:50 +0000 (23:31 +0200)]
ARM: add drivers for Colibri T30 to multi_v7_defconfig
Toradex Colibri Evaluation Board uses the DS1307 RTC and the
MCP251x CAN controller. The NVIDIA Tegra 3 based Colibri T30
module can be used on this carrier board, hence enable those
drivers in tegra_defonfig and multi_v7_defconfig.
Furthermore the NVIDIA Tegra 3 based Apalis T30 module too
contains two MCP251x CAN controller.
Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Thomas Petazzoni [Mon, 14 Apr 2014 14:41:18 +0000 (16:41 +0200)]
ARM: configs: add CONFIG_MMC_SDHCI_PXAV3 to the multi_v7_defconfig
The Marvell Armada 38x platform has a SDHCI interface managed by the
sdhci-pxav3 MMC host driver. It therefore makes sense to enable this
driver in multi_v7_defconfig, which supports the Armada 38x platform.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Gregory CLEMENT [Wed, 7 May 2014 13:52:21 +0000 (15:52 +0200)]
ARM: configs: enable XHCI mvebu support in multi_v7_defconfig
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: arm@kernel.org Cc: Kevin Hilman <khilman@linaro.org> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 23 May 2014 22:07:01 +0000 (00:07 +0200)]
Merge tag 'sunxi-defconfig-for-3.16-2' of https://github.com/mripard/linux into next/defconfig
Merge "Allwinner defconfig changes, take 2" from Maxime Ripard:
Add the A31 reset driver to the sunxi-related defconfigs
* tag 'sunxi-defconfig-for-3.16-2' of https://github.com/mripard/linux:
ARM: multi_v7: Add Allwinner reset drivers to multi_v7_defconfig
ARM: sunxi: Add A31 reset driver to sunxi_defconfig
ARM: sunxi: drop CONFIG_COMMON_CLK_DEBUG
Arnd Bergmann [Fri, 23 May 2014 22:04:19 +0000 (00:04 +0200)]
Merge tag 'mvebu-defconfig-3.16-2' of git://git.infradead.org/linux-mvebu into next/defconfig
Merge "mvebu defconfig changes for v3.16 (incremental #2)" from Jason Cooper:
- mvebu
- enable MSI and XHCI in mvebu_v7_defconfig
* tag 'mvebu-defconfig-3.16-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: enable MSI support in mvebu_v7_defconfig
ARM: configs: enable XHCI mvebu support in mvebu_v7_defconfig
ARM: multi_v5_defconfig: Enable sound modules needed for t5325
ARM: mvebu_v5_defconfig: Enable sound modules needed for t5325
ARM: mvebu: defconfig: add MTD_SPI_NOR (new dependency for M25P80)
ARM: configs: add ahci_mvebu to mvebu_v7_defconfig
ARM: configs: add CONFIG_MMC_SDHCI_PXAV3 to the mvebu_v7_defconfig
ARM: mvebu: enable fhandle in the defconfigs
ARM: mvebu: Enable nfsroot in the defconfig
Arnd Bergmann [Fri, 23 May 2014 21:59:28 +0000 (23:59 +0200)]
Merge tag 'samsung-fixes-2nd-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Samsung-fixes-2 for 3.15
- keep LD04 always on for exynos5250-arndale
- fix spi interrupt numbers for exynos5420
- fix ak8975 compatible for exynos4412-trats2
* tag 'samsung-fixes-2nd-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Keep LDO4 always ON for exynos5250-arndale board
ARM: dts: Fix SPI interrupt numbers for exynos5420
ARM: dts: fix incorrect ak8975 compatible for exynos4412-trats2 board
Arnd Bergmann [Fri, 23 May 2014 20:44:47 +0000 (22:44 +0200)]
Merge tag 'mvebu-dt-3.16-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.16 (incremental #2)" from Jason Cooper:
- kirkwood
- add OpenRD boards
- make keymile boards bootable with latest kernels
- mvebu
- add ehci/xhci to Armada 375/38x boards
* tag 'mvebu-dt-3.16-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: add kirkwood-km_fixedeth DTS file
ARM: dts: kirkwood: add kirkwood-km_common DTSI files
ARM: dts: kirkwood: resynch 98dx4122 dtsi
ARM: mvebu: add Device Tree description for the EHCI controllers on Armada 375
ARM: mvebu: add Device Tree description of the xHCI controller on Armada 375
ARM: mvebu: add Device Tree description of the EHCI controller on Armada 38x
ARM: mvebu: add Device Tree description of xHCI controllers on Armada 38x
ARM: Kirkwood: DT versions of OpenRD boards
Arnd Bergmann [Fri, 23 May 2014 21:46:50 +0000 (23:46 +0200)]
Merge tag 'sunxi-dt-for-3.16-2' of https://github.com/mripard/linux into for-next
Merge "Allwinner DT changes for 3.16, take 2" from Maxime Ripard:
- Introduction of a new board, the i12-tvbox
- Enable the MMC and USB controllers on the Colombus
- Add the enable-method to the A31 cpus
- a few fixes
* tag 'sunxi-dt-for-3.16-2' of https://github.com/mripard/linux:
ARM: dts: sun7i: Add new i12-tvbox board
ARM: dts: sun7i: cubietruck: set mmc3 bus-width property
ARM: sun6i: Add MMC0 controller to the Colombus board
ARM: sun6i: Fix OHCI2 node name
ARM: sun6i: Enable USB Host support on the Colombus board
ARM: sunxi: Add fixed 3V regulator
ARM: sun6i: Define the A31 CPUs enable-method
ARM: sunxi: dt: build DTs according to new MACH_SUNxI Kconfig symbols
Arnd Bergmann [Fri, 23 May 2014 21:33:19 +0000 (23:33 +0200)]
Merge tag 'for-3.16/bcm-dt' of git://github.com/broadcom/mach-bcm into for-next
Merge "mach-bcm dt updates for 3.16" from Matt Porter:
* Add PWM support to bcm281xx and bcm28155 ap board
* Add gpldo and vbus regulators to bcm590xx
* tag 'for-3.16/bcm-dt' of git://github.com/broadcom/mach-bcm:
ARM: dts: bcm590xx: add support for GPLDO and VBUS regulators
ARM: dts: Enable the PWM for bcm28155 AP board
ARM: dts: Declare the PWM for bcm11351 (bcm281xx)
Arnd Bergmann [Fri, 23 May 2014 20:35:56 +0000 (22:35 +0200)]
Merge tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt
Merge "ARM: STi: DT changes for v3.16, v3" from Maxime Coquelin:
Please consider these STi DT updates for v3.16.
This 3rd version takes into account Olof's comments on the v2:
- Fix upper-cases in labels and node names
- Sort compatibles order from specific to generic
- Sort dts entries in Makefile
It also adds support for the B2020 revision E board for STiH416 SoC.
Note that two reset patches are part of this pull request, in order to avoid
compilation breakage.
Adding these two patches in this pull request has been accepted by Philipp Zabel.
* tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti: (23 commits)
ARM: sti: stih41x: Provide a proper header for this DTSI file
ARM: sti: stih416: Enable board LED support for B2020 RevE
ARM: sti: stih416: Add support for B2020 RevE
ARM: STi: DT: STiH41x Add clk_ignore_unused to bootargs
ARM: STi: DT: STiH415: 415 DT Entry for clockgen A9
ARM: STi: DT: STiH415: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
ARM: STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock
ARM: STi: DT: STiH415: 415 DT Entry for clockgen A0/1/10/11/12
ARM: STi: DT: STiH416: 416 DT Entry for clockgen A9/DDR/GPU
ARM: STi: DT: STiH416: 416 DT Entry for clockgen B/C/D/E/F
ARM: STi: DT: STiH416: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
ARM: STi: DT: STiH416: Remove unused CLK_S_ICN_REG_0 fixed clock
ARM: STi: DT: STiH416: 416 DT Entry for clockgen A0/1/10/11/12
ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysin
ARM: STi: DT: add keyscan for stih41x-b2000
ARM: STi: DT: add keyscan for stih416
ARM: STi: DT: add keyscan for stih415
driver: reset: sti: add keyscan for stih416
driver: reset: sti: add keyscan for stih415
ARM: dts: STiH407: Add B2120 board support
...
Arnd Bergmann [Fri, 23 May 2014 16:49:25 +0000 (18:49 +0200)]
Merge tag 'keystone-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
Keystone SOC updates for 3.16
- Drop unused COMMON_CLK_DEBUG option
- Enable MTD_SPI_NOR config needed for M25P80
- Enable coherent higher address memory space
* tag 'keystone-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: Update the dma offset for non-dt platform devices
ARM: keystone: Switch over to coherent memory address space
ARM: configs: keystone: add MTD_SPI_NOR (new dependency for M25P80)
ARM: configs: keystone: drop CONFIG_COMMON_CLK_DEBUG
Arnd Bergmann [Fri, 23 May 2014 19:33:48 +0000 (21:33 +0200)]
Merge tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux into next/soc
Merge "Allwinner Core additions for 3.16, take 2" from Maxime Ripard:
- Convert the A31 SMP operations to the CPU_METHOD_OF_DECLARE mechanism
- Remove the reset code from the machine definition, that removes pretty much
all the code left in mach-sunxi
* tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux:
ARM: sunxi: Remove init_machine callback
ARM: sunxi: Remove reset code from the platform
ARM: sun6i: Retire the smp field in A31 machine
Documentation: dt: bindings: Document Allwinner A31 enable method
ARM: sun6i: Use CPU_METHOD_OF_DECLARE
Documentation: dt: bindings: Document ARM PSCI enable method
Arnd Bergmann [Fri, 23 May 2014 19:32:29 +0000 (21:32 +0200)]
Merge tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc
Merge "Qualcomm ARM Based SoC Updates for v3.16" from Kumar Gala:
* Enabling building pinctrl and AMBA bus support
* Clean up debug UART selection
* tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: qcom: Select PINCTRL by default for ARCH_QCOM
ARM: debug: qcom: make UART address selection configuration option
ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.
Arnd Bergmann [Fri, 23 May 2014 16:50:19 +0000 (18:50 +0200)]
Merge tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu SoC changes for v3.16 (incremental #2)" from Jason Cooper <jason@lakedaemon.net>:
- mvebu
- fix coherency on big-endian in -next
- hardware IO coherency
- L2/PCIe deadlock workaround
- small coherency cleanups
* tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()
ARM: mvebu: improve comments in coherency_ll.S
ARM: mvebu: fix indentation of assembly instructions in coherency_ll.S
ARM: mvebu: fix big endian booting after coherency code rework
ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI
ARM: mvebu: implement L2/PCIe deadlock workaround
ARM: mvebu: use hardware I/O coherency also for PCI devices
Arnd Bergmann [Fri, 23 May 2014 16:19:11 +0000 (18:19 +0200)]
Merge branch 'axxia/soc' into next/soc
Patches from Anders Berg applied individually:
Here is version 4 of platform support for AXM5516 SoC.
The clk driver is now applied to clk-next. The rest should be ready for
arm-soc. Haven't got any response from the power/reset maintainers... I hope
this driver can be taken via arm-soc as well.
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.
This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.
* axxia/soc:
ARM: dts: axxia: Add reset controller
power: reset: Add Axxia system reset driver
ARM: axxia: Adding defconfig for AXM55xx
ARM: dts: Device tree for AXM55xx.
ARM: Add platform support for LSI AXM55xx SoC
ARM: trusted_foundations: fix compile error on non-SMP
The setup_max_cpus variable is only defined if CONFIG_SMP is set. Add
a preprocessor condition to avoid the following compilation error if
CONFIG_SMP is not set:
arch/arm/include/asm/trusted_foundations.h: In function 'register_trusted_foundations':
arch/arm/include/asm/trusted_foundations.h:57:2: error: 'setup_max_cpus' undeclared (first use in this function)
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Andy Gross [Thu, 24 Apr 2014 16:31:21 +0000 (11:31 -0500)]
soc: qcom: Add GSBI driver
The GSBI (General Serial Bus Interface) driver controls the overarching
configuration of the shared serial bus infrastructure on APQ8064, IPQ8064, and
earlier QCOM processors. The GSBI supports UART, I2C, SPI, and UIM
functionality in various combinations.
Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
soc: Introduce drivers/soc place-holder for SOC specific drivers
Based on earlier thread "https://lkml.org/lkml/2013/10/7/662" and
discussion at Kernel Summit'2013, it was agreed to create
'driver/soc' for drivers which are quite SOC specific.
Further discussion on the subject is in response to
the earlier version of the patch is here:
http://lwn.net/Articles/588942/
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sandeep Nair <sandeep_n@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Arnd Bergmann [Fri, 23 May 2014 16:22:21 +0000 (18:22 +0200)]
Merge tag 'dt-dma-properties-for-arm' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into depends/dma-ranges
DT support for 'dma-ranges'and 'dma-coherent' properties with ARM updates
- The 'dma-ranges' helps to take care of few DMAable system memory
restrictions by use of dma_pfn_offset which is maintained per
device. Arch code then uses it for dma address translations for such
cases. We update the dma_pfn_offset accordingly during DT the device
creation process.
- The 'dma-coherent' property is used to setup arch's coherent dma_ops.
* tag 'dt-dma-properties-for-arm' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dma: use phys_addr_t in __dma_page_[cpu_to_dev/dev_to_cpu]
ARM: dma: implement set_arch_dma_coherent_ops()
ARM: dma: Use dma_pfn_offset for dma address translation
of: configure the platform device dma parameters
of: introduce of_dma_is_coherent() helper
of: introduce of_dma_get_range() helper
device: introduce per device dma_pfn_offset
Anders Berg [Fri, 23 May 2014 09:08:35 +0000 (11:08 +0200)]
ARM: Add platform support for LSI AXM55xx SoC
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.
This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.
* tag 'mvebu-fixes-3.15-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: fix definitions of PCIe interfaces on Armada 38x
ARM: mvebu: mvebu-soc-id: keep clock enabled if PCIe unit is enabled
ARM: mvebu: mvebu-soc-id: add missing clk_put() call
Maxime Ripard [Wed, 7 May 2014 02:44:22 +0000 (21:44 -0500)]
ARM: sunxi: Remove init_machine callback
The init_machine hook is now at its default value. We can remove it.
Even though the sun4i and sun7i machines are nothing more than generic machines
now, leave them in so that we won't have to add them back if needed, and so
that the machine is still displayed in /proc/cpuinfo.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Wed, 7 May 2014 02:44:21 +0000 (21:44 -0500)]
ARM: sunxi: Remove reset code from the platform
Now that reset is handled either by the watchdog driver for the sun4i, sun5i
and sun7i, and by a driver of its own for sun6i, we can remove it from the
platform code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Georgi Djakov [Fri, 31 Jan 2014 14:21:56 +0000 (16:21 +0200)]
ARM: dts: msm: Add SDHC controller nodes for MSM8974 and DB8074 board
Add support for the 2 SDHC controllers on the DB8074 board. The first
controller (at 0xf9824900) is connected to an on board soldered eMMC.
The second controller (at 0xf98a4900) is connected to a uSD card slot.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Ivan T. Ivanov [Mon, 14 Apr 2014 13:47:34 +0000 (16:47 +0300)]
ARM: debug: qcom: make UART address selection configuration option
Separate Qualcomm low-level debugging UART to two options.
DEBUG_MSM_UART is used in earlier non-multi platform arches,
like MSM7X00A, QSD8X50 and MSM7X30.
DEBUG_QCOM_UARTDM is used in multi-plafrom arches and have
embedded data mover.
Make DEBUG_UART_PHYS and DEBUG_UART_BASE user adjustable by
Kconfig menu.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.
As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs.
For example SDCC controller is PrimeCell MCI pl180. Adding this option will
give flexibility to reuse the existing drivers as it is without major
modifications.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Use the hexadecimal values for the triggers to match what is done for the device
tree. This also fixes compilation issues as the defines have been moved
elsewhere.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Stephen Boyd [Thu, 27 Feb 2014 02:16:34 +0000 (18:16 -0800)]
ARM: config: Update msm_defconfig
Now that DT based platforms are split out of mach-msm into
mach-qcom, put back a non-DT based SoC into the msm_defconfig and
stop selecting unsupported drivers.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Boris BREZILLON [Mon, 12 May 2014 16:26:30 +0000 (18:26 +0200)]
ARM: at91: move sam9n12 SoC to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting
sam9n12 SoC support. This will automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Define sam9n12ek's main and slow crystal frequencies.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Boris BREZILLON [Mon, 12 May 2014 16:26:28 +0000 (18:26 +0200)]
ARM: at91/dt: define sam9n12 clocks
Define sam9n12 clocks and make use of them in peripheral definitions.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Boris BREZILLON [Mon, 12 May 2014 16:26:27 +0000 (18:26 +0200)]
ARM: at91: prepare common clk transition for sam9n12 SoC
This patch encloses sam9n12 old clk registration in
"#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Boris BREZILLON [Mon, 12 May 2014 16:23:37 +0000 (18:23 +0200)]
ARM: at91: move sam9x5 SoCs to the CCF
This patch removes the selection of AT91_USE_OLD_CLK when selecting
sam9x5 SoCs support. This will automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Thomas Petazzoni [Thu, 22 May 2014 12:48:02 +0000 (14:48 +0200)]
ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()
In the refactoring of the coherency fabric assembly code, a function
called ll_get_cpuid() was created to factorize common logic between
functions adding CPU to the SMP coherency group, enabling and
disabling the coherency.
However, the name of the function is highly misleading: ll_get_cpuid()
makes one think tat it returns the ID of the CPU, i.e 0 for CPU0, 1
for CPU1, etc. In fact, this is not at all what this function returns:
it returns a CPU mask for the current CPU, usable for the coherency
fabric configuration and control registers.
Therefore this commit renames this function to
ll_get_coherency_cpumask(), and adds additional comments on top of the
function to explain in more details what it does, and also how the
endianess issue is handled.
Thomas Petazzoni [Thu, 22 May 2014 12:48:01 +0000 (14:48 +0200)]
ARM: mvebu: improve comments in coherency_ll.S
This commit makes no functional change, it only improves a bit the
various code comments in mach-mvebu/coherency_ll.S, by fixing a few
typos and adding a few more details.
Thomas Petazzoni [Thu, 22 May 2014 12:47:59 +0000 (14:47 +0200)]
ARM: mvebu: fix big endian booting after coherency code rework
As part of the introduction of the cpuidle support for Armada XP, the
coherency code was significantly reworked, especially in the
coherency_ll.S file. However, when the ll_get_cpuid function was
created, the big-endian specific code that switches the endianess of
the register was not updated properly.
This patch fixes this code, and therefore makes big endian systems
bootable again.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-2-git-send-email-thomas.petazzoni@free-electrons.com Fixes: 2e8a5942f875 ("ARM: mvebu: Split low level functions to manipulate HW coherency") Reported-by: Kevin Hilman <khilman@linaro.org> Cc: Kevin Hilman <khilman@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thomas Petazzoni [Tue, 20 May 2014 15:13:03 +0000 (17:13 +0200)]
ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI
Commit b0063aad5dd8 ("ARM: mvebu: use hardware I/O coherency also for
PCI devices") added a reference to the pci_bus_type variable, but this
variable is only available when CONFIG_PCI is enabled. Therefore,
there is now a build failure in !CONFIG_PCI situations.
This commit fixes that by enclosing the entire initcall into a
IS_ENABLED(CONFIG_PCI) condition.
Thomas Petazzoni [Tue, 20 May 2014 14:43:28 +0000 (16:43 +0200)]
ARM: mvebu: fix definitions of PCIe interfaces on Armada 38x
Due a copy/paste error, the 'reg' values for the third PCIe interface
on Armada 380, and the third and fourth PCIe interfaces on Armada 385
are wrong: they are equal to the one of the second PCIe interface.
This patch fixes this by using the appropriate 'reg' values for those
PCIe interfaces.
Without this fix, the third and fourth PCIe interfaces are unusable on
those platforms.
Thomas Petazzoni [Thu, 15 May 2014 14:59:34 +0000 (16:59 +0200)]
ARM: mvebu: implement L2/PCIe deadlock workaround
The Marvell Armada 375 and Armada 38x SOCs, which use the Cortex-A9
CPU core, the PL310 cache and the Marvell PCIe hardware block are
affected a L2/PCIe deadlock caused by a system erratum when hardware
I/O coherency is used.
This deadlock can be avoided by mapping the PCIe memory areas as
strongly-ordered (note: MT_UNCACHED is strongly-ordered), and by
removing the outer cache sync done in software. This is implemented in
this patch by:
* Registering a custom arch_ioremap_caller function that allows to
make sure PCI memory regions are mapped MT_UNCACHED.
* Adding at runtime the 'arm,io-coherent' property to the PL310 cache
controller. This cannot be done permanently in the DT, because the
hardware I/O coherency can only be enabled when CONFIG_SMP is
enabled, in the current kernel situation.
projects / karo-tx-linux.git / log