Merge branch 'tracking-qcomlt-arm64' into integration-linux-qcomlt
* tracking-qcomlt-arm64:
arm64: fixup for mm renames
arm64: dma-mapping: map sg lists into the SMMU as virtually contiguous
arm64: dma-mapping: fix DMA_ATTR_STRONGLY_ORDERED in __get_dma_pgprot
arm64: mm: Fix a bug in iommu dma-mapping
arm64: dma-mapping: add support for IOMMU mapper
arm64: Add support for DMA_ATTR_STRONGLY_ORDERED
arm: Add option to skip buffer zeroing
common: DMA-mapping: Add strongly ordered memory attribute
arm64: defconfig: add qcom specifics
arm64: qcom: add cpu operations
arm64: smp: move the pen to a header file
arm64: introduce CPU_OF_TABLES for cpu ops selection
devicetree: bindings: Document qcom,msm-id and qcom,board-id
arm64: defconfig: qcom: Enable restart driver
ARM: cpuidle: Add cpuidle support for QCOM cpus
Merge branch 'tracking-qcomlt-adm-dma' into integration-linux-qcomlt
* tracking-qcomlt-adm-dma:
dmaengine: adm: Start next DMA even if there is no ongoing transaction
dmaengine: adm: Don't reset controller during probe
dmaengine: adm: Use 'soft' flush when stopping DMA
dmaengine: adm: Fix ADM hardware descriptor creation when flow control is enabled
dmaengine: Add ADM driver
dt/bindings: qcom_adm: Fix channel specifiers
Merge branch 'tracking-qcomlt-iommu' into integration-linux-qcomlt
* tracking-qcomlt-iommu: (25 commits)
iommu: qcom: v1: move iommu-sec pgtable allocation
pci: use new of_dma_configure* apis
iommu/msm: Fix "scheduling while atomic" bug
drm/msm: temp: Add a check to be compatible against both iommuv0/v1
iommu: of: Handle IOMMU lookup failure with deferred probing or error
iommu: of: Document the of_iommu_configure() function
drivers: platform: Configure dma operations at probe time
of: dma: Split of_configure_dma() into mask and ops configuration
of: dma: Make of_dma_deconfigure() public
of: dma: Move range size workaround to of_dma_get_range()
arm: dma-mapping: Don't override dma_ops in arch_setup_dma_ops()
temp: Add dummy msm_iommu_get_ctx and fix broken build
iommu/msm: Set cacheability attributes without tex remap
iommu/msm: Add support for generic master bindings
iommu/msm: Move the contents from msm_iommu_dev.c to msm_iommu.c
iommu/msm: Add DT adaptation
DOWNSTREAM: drm/msm: use downstream iommu
qcom: iommu: Make use of domain_alloc and domain_free
arm64: provide dma cache routines with same API as 32 bit
iommu: msm: Invalidate properly from iommu_unmap
...
Merge branch 'tracking-qcomlt-panelpicker' into integration-linux-qcomlt
* tracking-qcomlt-panelpicker:
drm/msm: mdp4 lvds: Check the panel node in detect_panel()
drm/msm: mdp4 lvds: continue if the panel is not connected
drm/panel: simple-panel: Add panel picker support.
drm/edid: export edid_vendor()
drm/edid: Add support to get edid early
Currently the rates of the xo and sleep clocks are hard-coded in the
GCC driver, but this is a board layout description that actually should
be in the DT. Moving them into DT also allows us to insert the RPM
controlled clocks between the DT and GCC clocks.
move the allocation of iommu-sec page table into msm_iommu_dev
in order to use properly initialised struct device.
The dma_alloc_attrs would fail to allocate memory with the fake
struct device which was the case before this change.
arm64: dma-mapping: map sg lists into the SMMU as virtually contiguous
In arm_iommu_map_sg, currently we map each individual link in the given
scatterlist into the SMMU individually such that they may or may not be
virtually contiguous. However, in most (all?) of our use cases we
actually want the entire sg list mapped into the SMMU as a single
contiguous range. Use iommu_map_range to accomplish this.
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
[Forward Ported this from msm3.14] Signed-off-by: Sricharan R <sricharan@codeaurora.org>
[added iommu_map_range in generic dma code] Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Sricharan R [Tue, 21 Apr 2015 14:30:37 +0000 (20:00 +0530)]
arm64: mm: Fix a bug in iommu dma-mapping
iommu_alloc_attrs and arm_iommu_mmap_attrs calls
dma_pgprot with device type set to always 'coherent'
which is wrong. Should be based on the device type.
Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
On systems with IOMMUs, it's useful to handle IOMMU mappings in the
dma-mapping layer. This is currently supported on arm but not arm64. Add
support in arm64 by gratuitously lifting most of the IOMMU-related stuff
from dma-mapping.c in arm.
The original arm work was done by Marek Szyprowski in [4ce63fcd919c32:
"ARM: dma-mapping: add support for IOMMU mapper"].
Change-Id: I1c3c8fe15049fe456751074398fd179ebd2ec64e Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
[forward ported from 3.14 tree] Signed-off-by: R Sricharan <sricharan@codeaurora.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Laura Abbott [Wed, 6 Aug 2014 02:39:38 +0000 (19:39 -0700)]
arm: Add option to skip buffer zeroing
The DMA framework currently zeros all buffers because it (righfully so)
assumes that drivers will soon need to pass the memory to a device.
Some devices/use case may not require zeroed memory and there can
be an increase in performance if we skip the zeroing. Add a DMA_ATTR
to allow skipping of DMA zeroing.
Note: only the header file was modified to add the enum to allow the code to
compile, however the arm32 implementation was not pulled, and the arm64
implementation is missing as well
Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Abhimanyu Kapur [Tue, 18 Feb 2014 17:36:37 +0000 (09:36 -0800)]
arm64: smp: move the pen to a header file
Move the secondary_pen_release variable and the secondary_holding_pen
entry function to asm/smp_plat.h so that the other cpu ops implementations
can share them.
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Kumar Gala [Tue, 3 Mar 2015 21:39:07 +0000 (15:39 -0600)]
devicetree: bindings: Document qcom,msm-id and qcom,board-id
The top level qcom,msm-id and qcom,board-id are utilized by bootloaders
on Qualcomm MSM platforms to determine which device tree should be
utilized and passed to the kernel.
Cc: <devicetree@vger.kernel.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Ivan T. Ivanov [Thu, 3 Sep 2015 14:59:26 +0000 (17:59 +0300)]
dmaengine: adm: Use 'soft' flush when stopping DMA
'Soft' flush will commit current buffer to memory
beffore stopping the engine. Used with peripheral
devices which did not know a priory DMA transfer
lenght, like size of input data in UART driver.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Andy Gross [Tue, 17 Mar 2015 05:46:12 +0000 (00:46 -0500)]
dmaengine: Add ADM driver
Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
controller found in the MSM8x60 and IPQ/APQ8064 platforms.
The ADM supports both memory to memory transactions and memory
to/from peripheral device transactions. The controller also provides flow
control capabilities for transactions to/from peripheral devices.
The initial release of this driver supports slave transfers to/from peripherals
and also incorporates CRCI (client rate control interface) flow control.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Conflicts:
drivers/dma/Kconfig
drivers/dma/Makefile
Andy Gross [Tue, 17 Mar 2015 05:46:11 +0000 (00:46 -0500)]
dt/bindings: qcom_adm: Fix channel specifiers
This patch removes the crci information from the dma channel property. At least
one client device requires using more than one CRCI value for a channel. This
does not match the current binding and the crci information needs to be removed.
Instead, the client device will provide this information via other means.
Georgi Djakov [Fri, 11 Sep 2015 15:33:57 +0000 (18:33 +0300)]
iommu/msm: Fix "scheduling while atomic" bug
In the msm iommu driver currently we incorrectly use clk_prepare_enable()
and clk_disable_unprepare() functions that are sleeping and should not be
called in atomic context. Fix this by preparing clocks in advance and use
only clk_enable() in atomic context.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Laurent Pinchart [Thu, 14 May 2015 23:00:09 +0000 (02:00 +0300)]
iommu: of: Handle IOMMU lookup failure with deferred probing or error
Failures to look up an IOMMU when parsing the DT iommus property need to
be handled separately from the .of_xlate() failures to support deferred
probing.
The lack of a registered IOMMU can be caused by the lack of a driver for
the IOMMU, the IOMMU device probe not having been performed yet, having
been deferred, or having failed.
The first case occurs when the device tree describes the bus master and
IOMMU topology correctly but no device driver exists for the IOMMU yet
or the device driver has not been compiled in. Return NULL, the caller
will configure the device without an IOMMU.
The second and third cases are handled by deferring the probe of the bus
master device which will eventually get reprobed after the IOMMU.
The last case is currently handled by deferring the probe of the bus
master device as well. A mechanism to either configure the bus master
device without an IOMMU or to fail the bus master device probe depending
on whether the IOMMU is optional or mandatory would be a good
enhancement.
Laurent Pinchart [Thu, 14 May 2015 23:00:06 +0000 (02:00 +0300)]
of: dma: Split of_configure_dma() into mask and ops configuration
The of_configure_dma() function configures both the DMA masks and ops.
Moving DMA ops configuration to probe time would thus also delay
configuration of the DMA masks, which might not be safe. To avoid issues
split the configuration in two to allow keeping masks configuration at
device add time and move ops configuration to device probe time.
Laurent Pinchart [Thu, 14 May 2015 23:00:05 +0000 (02:00 +0300)]
of: dma: Make of_dma_deconfigure() public
As part of moving DMA initializing to probe time the
of_dma_deconfigure() function will need to be called from different
source files. Make it public and move it to drivers/of/device.c where
the of_dma_configure() function is.
Laurent Pinchart [Thu, 14 May 2015 23:00:04 +0000 (02:00 +0300)]
of: dma: Move range size workaround to of_dma_get_range()
Invalid dma-ranges values should be worked around when retrieving the
DMA range in of_dma_get_range(), not by all callers of the function.
This isn't much of a problem now that we have a single caller, but that
situation will change when moving DMA configuration to device probe
time.
Laurent Pinchart [Thu, 14 May 2015 23:00:02 +0000 (02:00 +0300)]
arm: dma-mapping: Don't override dma_ops in arch_setup_dma_ops()
The arch_setup_dma_ops() function is in charge of setting dma_ops with a
call to set_dma_ops(). set_dma_ops() is also called from
- highbank and mvebu bus notifiers
- dmabounce (to be replaced with swiotlb)
- arm_iommu_attach_device
(arm_iommu_attach_device is itself called from IOMMU and bus master
device drivers)
To allow the arch_setup_dma_ops() call to be moved from device add time
to device probe time we must ensure that dma_ops already setup by any of
the above callers will not be overriden.
Aftering replacing dmabounce with swiotlb, converting IOMMU drivers to
of_xlate and taking care of highbank and mvebu, the workaround should be
removed.
Sricharan R [Fri, 7 Aug 2015 12:26:48 +0000 (17:56 +0530)]
iommu/msm: Add DT adaptation
The driver currently works based on platform data. Remove this
and add support for DT. A single master can have multiple ports
connected to more than one iommu.
This association of master and iommus/contexts were previously
represented by platform data parent/child device details. The client
drivers were responsible for programming all of the iommus/contexts
for the device. Now while adapting to generic DT bindings we maintain the
list of iommus, contexts that each master domain is connected to and
program all of them on attach/detach.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Larry Bassel [Fri, 17 Jan 2014 18:33:08 +0000 (10:33 -0800)]
arm64: provide dma cache routines with same API as 32 bit
The APIs __dma_inv_range() and __dma_clean_range() were
not exported by the third party patch. Since the functions
starting with underscores are not to be directly used by drivers,
related functions without the underscores are provided
which have the same name and functionality as the 32 bit APIs.
Change-Id: Ie0e681614307d9d9a19e58cacfb9b5dff4528977 Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
arm64: add defines for dmac_*_range for compatibility with arm32
An earlier patch created defines for dma_*_range APIs to be
compatible with arm 32 bit, however it appears
these API names have not (at least yet) appeared there, so
revise the names to dmac_*_range, which is defined
for arm 32 bit so that there is one name defined
for both architectures.
Change-Id: I6456c02bad73fb54a874dc9925d3d43d9b8be2f2 Signed-off-by: Larry Bassel <lbassel@codeaurora.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Chintan Pandya [Tue, 17 Mar 2015 10:39:19 +0000 (16:09 +0530)]
iommu: msm: Invalidate properly from iommu_unmap
TLB invalidation by VA will work for the given VA and
not the range of VA. So, for a region that spreads
across multiple PTEs, that need to call TLBIVA multiple
times. This is un-optimized.
Anyways, the present implementation also support single
TLBIVA only for the first VA and rest may be kept in
TLB as is. This is a problem. Fix this by upgrading
TLBIVA with TLBIASID which will do invalidation for
all the VAs for matching ASID.
We may still skip fixing this in iommu_map as iommu_map
is still indeed mapping one VA at a time.
Changes made:
- drop usage of gen_pool_alloc_aligned
- rename clk and pclk to iface and core
- delete unused clks and regulators
- handle EPROBE_DEFER when requesting interrupts
Georgi Djakov [Tue, 24 Nov 2015 13:24:38 +0000 (15:24 +0200)]
arm64: dts: Align msm8916 cpu thermal trip point ranges
Use the same temperature ranges for both CPU thermal sensors
(tsen3 and tsen4). Start cpufreq cooling at 75 degrees and
initiate linux shutdown at 100 degrees.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Archit Taneja [Thu, 10 Dec 2015 10:58:02 +0000 (16:28 +0530)]
arm64: msm8916-mdss.dtsi: Add bus scaling properties for mdp
Add bus scaling properties in the mdp DT node so that the mdp client is
registered by the msm bus scaling driver. Pick up the bus scaling vector
properties from the downstream kernel.
Archit Taneja [Thu, 10 Dec 2015 06:09:55 +0000 (11:39 +0530)]
arm64: apq8016-sbc.dtsi: Add regulators needed by adv7533
The adv7533 requires two supplies AVDD and V3P3 fed to it. These
are provided by L6 and L17 voltage regulators. Assing these to
the adv7533 node in DT.
projects / karo-tx-linux.git / log