Danny Nold [Thu, 8 Sep 2011 20:38:25 +0000 (15:38 -0500)]
ENGR00156300 - EPDC fb: Move ISR code to work Q & replace spinlocks with mutexes
- Move the majority of code from the IRQ handler routine into a workqueue
routine. This should improve system interrupt latency.
- Change the spin_lock protecting EPDC queues into a mutex and change all
associated spin_lock calls into mutex calls.
Signed-off-by: Danny Nold <dannynold@freescale.com>
We can leave L2 cache alone during dormant,
just keep in mind don't access cache in dormant
process, then it should be OK without flushing
L2 cache, it will improve performance of suspend
and resume.
Jason Chen [Tue, 6 Sep 2011 06:06:09 +0000 (14:06 +0800)]
ENGR00155146 ipuv3: use mutex instead of spin lock
keep spin lock for irq function, but use mutex replace other
splin lock to provide better sync method.
Add _ipu_get/put function to check clock enable.
Jason Chen [Mon, 22 Aug 2011 02:46:22 +0000 (10:46 +0800)]
ENGR00155135-3 ipuv3 dev: add processing driver support
IPU's IC/IRT/VDI modules provide resizing/CSC/combination/de-interlacing
support, this patch make all these features into one processing driver.
A struct ipu_task is the interface between user and this driver, user
just need fill his task struct and queue it through ioctl, then wait
ipu hardware finish its job (now only support BLOCKING operation, not
support NO_BLOCK operation).
Pls refer to inlcude/linux/ipu.h for structure information and unit test
for usage.
Jason Chen [Mon, 22 Aug 2011 02:25:51 +0000 (10:25 +0800)]
ENGR00155135-2 ipuv3 dev: add processing driver support
IPU's IC/IRT/VDI modules provide resizing/CSC/combination/de-interlacing
support, this patch make all these features into one processing driver.
A struct ipu_task is the interface between user and this driver, user
just need fill his task struct and queue it through ioctl, then wait
ipu hardware finish its job (now only support BLOCKING operation, not
support NO_BLOCK operation).
Pls refer to inlcude/linux/ipu.h for structure information and unit test
for usage.
Jason Chen [Mon, 22 Aug 2011 02:24:49 +0000 (10:24 +0800)]
ENGR00155135-1 ipuv3 dev: add processing driver support
IPU's IC/IRT/VDI modules provide resizing/CSC/combination/de-interlacing
support, this patch make all these features into one processing driver.
A struct ipu_task is the interface between user and this driver, user
just need fill his task struct and queue it through ioctl, then wait
ipu hardware finish its job (now only support BLOCKING operation, not
support NO_BLOCK operation).
Pls refer to inlcude/linux/ipu.h for structure information and unit test
for usage.
ENGR00155880 USB device: Fix RNDIS Full Speed hang during initialization
When setup irq is received, the status phase of the transfer is primed
on ep0 before the data phase. The usb requests are added to the list
of transfer descriptors (maintained by driver) in reverse of their
expected completion order. Completion order is data followed by status,
however the list of tds contains status followed by data.
Upon completion of the data request, the irq handler proceeds to check
the 1st td in the list -- the status request. In full speed mode,
the status phase has not yet completed at this time, so the td's
ACTIVE bit is still set. This leads irq handler to ignore the completion
interrupt without checking the actual td for the data request that caused
the interrupt.
In high speed mode, this issue does not bear itself out because the status
request also completes by the time the irq handler goes to process the data
completion interrupt.
The simple fix for this issue is to prime the status request AFTER the data
request, so that the list of tds maintained by the driver contains the tds
in the order of expected completion.
Current thermal reading formula is not accurate,
and different board has different value, previous
setting of trip point setting is too low, and some
boards can reach hot and critical point easily, so
change the trip point as below:
critical : 50 -> 100 C
hot : 40 -> 90 C
active : 30 -> 80 C
these trip points value can also be changed via echo
an value into /sys/class/thermal/thermal_zone0/trip..
ENGR00155981: MX6: Fix crash caused by cpufreq during suspend/resume
Random crashes occur in CPUFREQ code when resuming from suspend.
The root cause is due to freeing and allocating of common data structure
(frequency table) shared among all the CPUs.
Fix the code by ensuring that the common data structure is only
created and deleted once.
Danny Nold [Fri, 2 Sep 2011 03:46:05 +0000 (22:46 -0500)]
ENGR00154436-2 - MXC HDMI: Support complete feature set
- Cleaned up video mode configuration in HDMI driver
- Add support for configurable ipu-to-hdmi mappings
- Add hotplug support.
- Adapt interrupt handling to account for sharing interrupt with HDMI audio
- Remove audio configuration
- Change code to only use CEA HDMI modes
- Add support for AVI InfoFrame
- Add aspect ratio to EDID mode data
- Add rounding support to IPU pix clk setup
- Add powerdown/powerup flow
- Support FB notifications
- Remove build warnings
Signed-off-by: Danny Nold <dannynold@freescale.com>
Danny Nold [Fri, 2 Sep 2011 21:45:14 +0000 (16:45 -0500)]
ENGR00154436-1 - MACH-MX6: MXC HDMI updates to support full feature set
- Corrected logic bug in how GPR registers are set
- Add support for configurable ipu-to-hdmi mappings
- Add aspect ratio to EDID mode data
- Expanded HDMI register field defines
- Removed HDMI platform data now handled by HDMI core in MFD
Signed-off-by: Danny Nold <dannynold@freescale.com>
1. We should enable mmdc_ch0 clock in init to make
its usecount > 0, or ipu's parent is mmdc_ch0,
when ipu enable/disable clock, mmdc_ch0 will be
also enable/disable, cause system hang when disable.
2. Remove build warning of unuse variable.
Tony Lin [Wed, 31 Aug 2011 05:28:37 +0000 (13:28 +0800)]
ENGR00155612-4 [mx6q]change the delay after clock frequence change to 1ms
100ms is too long delay, thus it impact other tasks scheduling.
for example, nfs reports timeout if two sd card is inserted because the
100ms delay occupies cpu too long.
1ms value is evaluated by IC engineer.
Tony Lin [Wed, 31 Aug 2011 05:28:37 +0000 (13:28 +0800)]
ENGR00155612-3 [mx6q]add delay after cmd6 for eMMC compatibility
sandisk eMMC4.4 cards need a 1ms delay after cmd6 (switch cmd)
which is confirm by sandisk errata.
add 1ms delay after cmd6 to provide more robustness and compatiblity
of our driver supporting eMMC4.4 cards.
Tony Lin [Wed, 31 Aug 2011 05:28:37 +0000 (13:28 +0800)]
ENGR00155612-1 [mx6q]dynamically sd pad setting change
on mx6q, it supports sd3.0 card with DDR 50MHz, SDR 100Mhz and SDR 200MHz.
sd pads have to be changed dynamically for these large scale of clock
frequencies.
add different pad setting definitions for these clock frequencies under
board file, since these settings are really board dependent.
add callback funtion in sdhc platform data to give driver approach to
change pad setting according to current clock frequency.
Ming Lei [Tue, 30 Aug 2011 16:03:13 +0000 (00:03 +0800)]
usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
This patch introduces the helper of ehci_sync_mem to flush
qtd/qh into memory immediately on some ARM, so that HC can
see the up-to-date qtd/qh descriptor asap.
This patch fixs one performance bug on ARM Cortex A9 dual core
platform, which has been reported on quite a few ARM machines
(OMAP4, Tegra 2, snowball...), see details from link of
https://bugs.launchpad.net/bugs/709245.
The patch has been tested ok on OMAP4 panda A1 board, and the
performance of 'dd' over usb mass storage can be increased from
4~5MB/sec to 14~16MB/sec after applying this patch.
Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ming Lei <ming.lei@canonical.com>
Add anatop thermal cooling device,currently only
support secondary CPUs hotplug when temperature is
too hot,binding the processor cooling device with
anatop thermal zone.
1.Common code of thermal_sys has some bug,could
not set the mode via sysfs using echo enable/disabled
command;
2.Since the anatop thermal formula still not accurate,
in order to help test and adjust the trip point of
anatop thermal zone, we add the set trip point temp
value into the sysfs interface.
Sometimes when system very busy,hotplug may fail
because CPU0 has no chance to kill secondary CPUs
from hardware,secondary CPUs keep enter/exit wfi
,and we have a printk after wfi,that makes CPU0
has no chance to kill secondary CPUs,we should
remove this printk.
in uSDHC controller, SDCLKFS field in SYS_CTRL register
is defined differently from eSDHC
In Single Data Rate mode(DDR_EN bit of MIXERCTRL is '0')
Only the following settings are allowed:
80h) Base clock divided by 256
40h) Base clock divided by 128
20h) Base clock divided by 64
10h) Base clock divided by 32
08h) Base clock divided by 16
04h) Base clock divided by 8
02h) Base clock divided by 4
01h) Base clock divided by 2
00h) Base clock divided by 1
While in Dual Data Rate mode(DDR_EN bit of MIXERCTRL is '1')
Only the following settings are allowed:
80h) Base clock divided by 512
40h) Base clock divided by 256
20h) Base clock divided by 128
10h) Base clock divided by 64
08h) Base clock divided by 32
04h) Base clock divided by 16
02h) Base clock divided by 8
01h) Base clock divided by 4
00h) Base clock divided by 2
so the clock setting function should be changed to fit the definition
Lionel Xu [Fri, 26 Aug 2011 10:26:45 +0000 (18:26 +0800)]
ENGR00139255-2 MX6Q_BSP ESAI: Add esai recording support
Add ESAI recording to mx6q platform.
Note: since there is pad conflict between esai record and fec, add a boot
argument esai_record to deal with it. This argument is required to enable
the record functionality.
Lionel Xu [Fri, 26 Aug 2011 10:20:14 +0000 (18:20 +0800)]
ENGR00139255-1 MX6Q_BSP ESAI: Add esai recording support
Add ESAI recording to mx6q platform.
Note: since there is pad conflict between esai record and fec, add a boot
argument esai_record to deal with it. This argument is required to enable
the record functionality.
Jason Chen [Mon, 22 Aug 2011 03:21:59 +0000 (11:21 +0800)]
ENGR00155141 ipuv3 split mode: adjust split calculate function
One issue was found in split mode: For input 1024x600, output 1360x768,
after stripe calculation, input width and input column are not right.
This patch fix this issue.
Tony Lin [Wed, 24 Aug 2011 05:00:56 +0000 (13:00 +0800)]
ENGR00153895 [MX6Q]SD: SD3 clock is not off, when no SD card is in use
the patch brings in clock management, not only card removal will gate off
corresponding SD clock, but also a timeout after last request will gate off
the SD clock.
Tony Lin [Wed, 24 Aug 2011 09:10:31 +0000 (17:10 +0800)]
ENGR00155288 [mx6q]sd dat1 glitch causes system panic
some sd cards insertion will cause a glitch on sd dat1
which is also a card interrupt signal. Thus the wrongly
generated card interrupt will make system panic because
there's no registered sdio interrupt handler.
the patch fixes this issue.
Anson Huang [Tue, 23 Aug 2011 02:44:52 +0000 (10:44 +0800)]
ENGR00155219 [MX6]Add protection for dormant mode
1. clean up ddr io code, using macro define;
2. we should consider if the wake up irq comes
during execution of low-power(ms6q_suspend.S)
code but before ARM enter wfi, in this scenario,
system will not enter STOP mode, thus, the resume
code will cause system fail, so we need to consider
if system can not enter STOP mode, should resume
immediately after wfi.
Anson Huang [Wed, 17 Aug 2011 10:49:19 +0000 (18:49 +0800)]
ENGR00154961 [MX6]system hang in suspend with irq
If the wakeup source irq pending during suspend process, system will
hang, we need to abort suspend, and resume immediately to make system
running normally.
- Add VGA support. The command option to use VGA as primary
display: video=mxcfb0:dev=vga,VGA-XGA,if=GBR24 ard-vga
For VGA, Need to disable Ethernet and short PIN 1-2 of J14
and J16.
- Add LVDS support. The default display is LVDS0. LVDS1 needs
further modification on ldb driver
Anson Huang [Wed, 17 Aug 2011 04:34:28 +0000 (12:34 +0800)]
ENGR00154922 [MX6]Disable some clocks during boot
To save power, we should disable as much as possible
when kernel boot up, only leaving the necessary clocks
on, devices should enable their clock in init.This is
necessary for our MX6q, or the chip will be too hot,
may damage.
After doing this change, we can save more than 150mA@5V.
Anson Huang [Tue, 16 Aug 2011 01:23:01 +0000 (09:23 +0800)]
ENGR00154917 [MX6]Enable MMDC low-power mode
1. Set MMDC pad ctrl to low-power mode when dormant;
2. DRAM_RESET can't be changed due to hardware design;
3. GPR_CTLDS should be changed to lower the MMDC IO
power to 0mA, but it needs hardware change, will add it
in next hardware version after we figure out how to
change the hardware.
Current MMDC data in dormant is:
IO: 28mA@1.5V;
DDR: 35mA@1.5V.
Tony Lin [Thu, 11 Aug 2011 09:35:20 +0000 (17:35 +0800)]
ENGR00139261 [MX6Q]support 8 bit MMC and eMMC DDR mode
enable 8 bit MMC mode according to mmc stack.
enable eMMC DDR mode according to mmc stack, but change
sdhci a little, since sdhci does not support DDR mode so
far.
Peter Chen [Thu, 11 Aug 2011 02:51:45 +0000 (10:51 +0800)]
ENGR00154704 usb-gadget: wmb is needed after dtd pointer is updated for armv7
At armv7 SoC, the dma_alloc_coherent returns non-cachable, but
bufferable region, so the driver needs to drain write buffer by
itself, if the controller needs to visit dma buffer immediately
after cpu writes
There is a discussion for this armv7 change:
http://marc.info/?t=127918539100004&r=1&w=2
For this issue, the next dtd pointer is invalid sometimes, the reason
is the region which is used to store dtd is dma buffer, so the data may
not be written to memory when the controller visit this data.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Wed, 10 Aug 2011 11:37:16 +0000 (19:37 +0800)]
ENGR00154703 usb-gadget: fix spin_lock recursion problem at SMP platform
- The spin_lock is at interrupt handler, so all code routines
using at interrupt handler are forbidden to hold spin_lock again
- Move the code which needs to be protected by spin_lock to workqueue,
and it will be called when workqueue is scheduled.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Jason Chen [Thu, 4 Aug 2011 07:29:57 +0000 (15:29 +0800)]
ENGR00154108-3 mxc ldb: make ldb support two ipu in separate mode
make ldb support two ipu in separate mode
cmdline option changed:
"ldb=spl0/1" -- split mode on DI0/1
"ldb=dul0/1" -- dual mode on DI0/1
"ldb=sin0/1" -- single mode on LVDS0/1
"ldb=sep0/1" -- separate mode begin from LVDS0/1
there are two LVDS channels(LVDS0 and LVDS1) which can transfer video
datas, there two channels can be used as split/dual/single/separate mode.
split mode means display data from DI0 or DI1 will send to both channels
LVDS0+LVDS1.
dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
and LVDS1, it said, LVDS0 and LVDS1 has the same content.
single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
at the same time.