ENGR00163052: CPUFREQ does not report correct frequency
When DVFS_CORE is enabled, the following command reports incorrect frequency:
cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq
Fix this by ensuring the CPUFREQ does not change the frequency
when DVFS_CORE is active. And DVFS-CORE informs CPUFREQ of the
change done to CPU frequency.
Tony LIU [Wed, 7 Dec 2011 05:31:35 +0000 (13:31 +0800)]
ENGR00169661:Remove the discharge for VBUS and DP
- VBUS discharge code should be removed from suspend_irq function
- On Arik, there is a huge capacitance(C86), even discharge VBUS,
the Drop of VBUS is still very slow
- On Arik, the B session valid threshold is not 0.8V or 1.4V, it is
about 2V~3V, so we can receive B session valid interrupt very soon
- No DP discharge needed, but wait for SE0 is needed Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Wayne Zou [Thu, 1 Dec 2011 11:52:39 +0000 (19:52 +0800)]
ENGR00163669-1 mxc fb: remove FB_EVENT_PREMODE_CHANGE for mxc fb drivers
remove FB_EVENT_PREMODE_CHANGE for mxc ldb/tve drivers
add dispdrv setup interface for ldb/tve drivers
re-structure the dispdrv framework for display devices
Xinyu Chen [Fri, 2 Dec 2011 06:38:21 +0000 (14:38 +0800)]
ENGR00163703 uart: console write routing is unsafe on SMP
The console feature's write routing is unsafe on SMP with
the startup/shutdown call. It happend to cause Android bootup
without shell runnable.
Actually on Android boot, there's 3 consumers of the console
* the kernel printk
* the init process using /dev/kmsg to call printk to show log
* shell, which open /dev/console and write with sys_write()
The shell goes into the normal uart open/write routing,
but the other two go into the console operations.
The open routing calls imx serial startup, which will write USR1/2
register without any lock and critical with imx_console_write call.
Here add spin_lock for startup/shutdown/console_write routing.
Remove the imx_setup_ufcr() call on startup when CONSOLE enabled,
as this will cause clock reinit, and output garbage.
Huang Shijie [Wed, 23 Nov 2011 08:45:17 +0000 (16:45 +0800)]
ENGR00163603-2 IMX/SDMA : save the real count for one DMA transaction.
When we use the SDMA in the UART driver(such as imx6q), we will
meet one situation:
Assume we set 64 bytes for the RX DMA buffer.
The receiving DMA buffer has received some data, but not full.
An Aging DMA request will be received by the SDMA controller if we enable the
IDDMAEN(UCR4[6]) in this case.
So the UART driver needs to know the count of the real received bytes,
and push them to upper layer.
Add two new fields to sdmac, and update the `residue` in sdma_tx_status().
Anson Huang [Thu, 1 Dec 2011 07:51:27 +0000 (15:51 +0800)]
ENGR00163275 [MX6]Fix PLL enable fail panic
The root cause is irqs come between PLL register reading
and getting system time, an interrupt handle could take
more than 2ms, which will make the time reading and register
reading unalignment, see below:
1. pll reg read, it is still not locked;
2. here comes an interrupt, and its handler could spent > 2ms;
3. time reading, found current time already > expiration time(1.2ms),
and we treated the pll lock fail;
There are two method could fix it, one is disable interrupt
during pll lock bit and time expiration check, the other is
to add a second time read after time expiration to make sure
the pll didn't lock during the time we set. I choose the seconde
choise, since it impacts kernel less than disable interrupt;
Even Xu [Wed, 30 Nov 2011 01:36:18 +0000 (09:36 +0800)]
ENGR00163497-3 MX6Q: Enable io_init function for camera drivers
1. Enable io_init function for camera drivers.
2. Add ov5640_mipi camera driver supported resolutions
3. Fine-turn ov5640_mipi camera driver output image quality
Richard Zhu [Mon, 28 Nov 2011 05:02:51 +0000 (13:02 +0800)]
ENGR00163128 [MX6q_ARM2]SATA Boot: reboot failed if boot from SATA
The root cause is that the sata power is not enabled after reboot
the system when boot from sata.
Built in the sata driver would fix this issue.
In this way, the sata power would be enabled defautly
when there is a sata device is plugged into the slot, otherwise,
the power would be disabled.
NOTE:
Pls don't plug the sata disk after the system is booted up.
System wouldn't recognized it, since there are no any power and
clocks on the sata slot.
Fugang Duan [Fri, 25 Nov 2011 10:27:29 +0000 (18:27 +0800)]
ENGR00163040 - FEC : Fix ethernet cannot work after system sleep.
- Descript:
Ethernet can't work in uboot and kernel DHCP throught press
'reset' key when send sleep command 'echo mem > /sys/power/state'
- Cause:
FEC driver will power down phy when system sleep. If just reset the
board, FEC driver cannot run resume function. So, need power on phy
in uboot and linux driver.
Yauheni Kaliuta [Thu, 13 Oct 2011 11:19:05 +0000 (14:19 +0300)]
usb: gadget: file_storage: fix race on unloading
There is a race, reproduced rarely if you unload the module
when host finishes mass storage device initialization (reading
partition table and so on): fsg_unbind() code first closes
lun files then waits for worker thread to finish its work, as
the result the thread may operate on already closed device
with an oops and backtrace:
[ 484.937225] [<b00e403c>] (touch_atime+0x4/0x140) from [<b00a1498>] (generic_file_aio_read+0x678/0x6f0)
[ 484.946563] [<b00a1498>] (generic_file_aio_read+0x678/0x6f0) from [<b00d08c4>] (do_sync_read+0xb0/0xf4)
[ 484.955963] [<b00d08c4>] (do_sync_read+0xb0/0xf4) from [<b00d1478>] (vfs_read+0xac/0x144)
[ 484.964172] [<b00d1478>] (vfs_read+0xac/0x144) from [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage])
[ 484.973785] [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage]) from [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage])
[ 484.985626] [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage]) from [<b0077c48>] (kthread+0x7c/0x84)
[ 484.995666] [<b0077c48>] (kthread+0x7c/0x84) from [<b002f950>] (kernel_thread_exit+0x0/0x8)
[ 485.004028] Code: eaffffd0e28dd008e8bd8df0e92d40f7 (e591400c)
Change the order in unbind: wait for the thread first, then close
the files.
Jason Chen [Wed, 23 Nov 2011 02:46:01 +0000 (10:46 +0800)]
ENGR00162919 mxc_vout: there is one column garbage line at right for split mode
as ipu processing device driver has protect check, the CR ENGR00155141 can be
reverted, this CR is the cause of garbage line.
this patch also change v4l2 output try_task function to make sure there is no
cropping for output when display support window.
Sandor Yu [Tue, 22 Nov 2011 12:25:32 +0000 (20:25 +0800)]
ENGR00162881 Workaround for some MX6x boards failed read EDID data
HDMI video mode setting in command line will not work if no EDID data
reading from HDMI sink.
Creat a default modelist for HDMI video mode when no EDID data.
Then default video mode can work even if no EDID data.
Anson Huang [Tue, 22 Nov 2011 10:26:57 +0000 (18:26 +0800)]
ENGR00162867 [MX6]Fix pm bug of error coding
Before suspend, we need to check whether there
is wakeup source's irq pending via GPC_ISR1~4,
previous coding checked for set of irq status
of GPC_ISR1, should be GPC_ISR1~4.
Yauheni Kaliuta [Thu, 13 Oct 2011 11:19:05 +0000 (14:19 +0300)]
usb: gadget: file_storage: fix race on unloading
There is a race, reproduced rarely if you unload the module
when host finishes mass storage device initialization (reading
partition table and so on): fsg_unbind() code first closes
lun files then waits for worker thread to finish its work, as
the result the thread may operate on already closed device
with an oops and backtrace:
[ 484.937225] [<b00e403c>] (touch_atime+0x4/0x140) from [<b00a1498>] (generic_file_aio_read+0x678/0x6f0)
[ 484.946563] [<b00a1498>] (generic_file_aio_read+0x678/0x6f0) from [<b00d08c4>] (do_sync_read+0xb0/0xf4)
[ 484.955963] [<b00d08c4>] (do_sync_read+0xb0/0xf4) from [<b00d1478>] (vfs_read+0xac/0x144)
[ 484.964172] [<b00d1478>] (vfs_read+0xac/0x144) from [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage])
[ 484.973785] [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage]) from [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage])
[ 484.985626] [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage]) from [<b0077c48>] (kthread+0x7c/0x84)
[ 484.995666] [<b0077c48>] (kthread+0x7c/0x84) from [<b002f950>] (kernel_thread_exit+0x0/0x8)
[ 485.004028] Code: eaffffd0e28dd008e8bd8df0e92d40f7 (e591400c)
Change the order in unbind: wait for the thread first, then close
the files.
Peter Chen [Mon, 21 Nov 2011 06:10:49 +0000 (14:10 +0800)]
ENGR00161644 usb-gadget: prime directly for status dTD of ep0
During the setup transfer, if prime status just after prime the data,
but before the data completes, there is a potential problem:
The device's qTD has NO direction bit, If the IN request(Status Stage)
is added to qTD list while the OUT (Data Stage) is priming,
then the IN will not prime by software, it will prime automatically
by controller as OUT.
We met one usb hang issue during repeat plug in/out test at i.mx6q
that the data status has finished but status has never finished,
it is most likely above issue.
After this fix, the repeat plug in/out test passes successfully.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Anson Huang [Sat, 19 Nov 2011 02:24:21 +0000 (10:24 +0800)]
ENGR00162643 [MX6]Decline SOC LDO voltage to make suspend/resume work
Need to decline SOC LDO domain voltage to make 800M ARM2 board work,
we can set the SOC power domain to be same as ARM core power domain.
Tested on both 1G rework board and 800M origin board.
Anson Huang [Fri, 18 Nov 2011 13:11:04 +0000 (21:11 +0800)]
ENGR00162612 [Mx6]Change arm core voltage of suspend for 1G cpufreq
Previous setting for ARM core is 1V during suspend, it
is working for 800MHz cpu freq, but not enough for
1G cpu freq, actually, we didn't need to change ARM core
LDO's setting during suspend, hardware will auto change it.
Peter Chen [Fri, 18 Nov 2011 06:02:45 +0000 (14:02 +0800)]
ENGR00162583-3 usb header: avoid class driver access register after usb is off
- An well-behavior class driver should disable their endpoints
after being notified disconnect with host, we use all endpoints
are stopped (ep->stopped) to indicates the class
driver will not visit device driver any more.
the ep-stopped will be initialized as 1 for non-control endpoint
it will be 0 after fsl_ep_enable, and be 1 after fsl_ep_disable.
Where is a non-sleep wait routine at disconnect event for waiting all
endpoints are stopped
- Some controller's (like i.mx6q) DP will change from J
to SE0 slowly after the cable disconnects with host, in that case there
will be a wakeup interrupt after driver enables the wakeup interrupt.
For i.mx6q, there is a discharge routine for DP after the disconnection.
- Should not wait vbus to low during first otg switch, as the wait will
be timeout when the usb cable is connecting to host.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Fri, 18 Nov 2011 06:01:06 +0000 (14:01 +0800)]
ENGR00162583-2 usb driver: avoid class driver access register after usb is off
- An well-behavior class driver should disable their endpoints
after being notified disconnect with host, we use all endpoints
are stopped (ep->stopped) to indicates the class
driver will not visit device driver any more.
the ep-stopped will be initialized as 1 for non-control endpoint
it will be 0 after fsl_ep_enable, and be 1 after fsl_ep_disable.
Where is a non-sleep wait routine at disconnect event for waiting all
endpoints are stopped
- Some controller's (like i.mx6q) DP will change from J
to SE0 slowly after the cable disconnects with host, in that case there
will be a wakeup interrupt after driver enables the wakeup interrupt.
For i.mx6q, there is a discharge routine for DP after the disconnection.
- Should not wait vbus to low during first otg switch, as the wait will
be timeout when the usb cable is connecting to host.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Fri, 18 Nov 2011 05:57:47 +0000 (13:57 +0800)]
ENGR00162583-1 usb msl: avoid class driver access register after usb is off
- An well-behavior class driver should disable their endpoints
after being notified disconnect with host, we use all endpoints
are stopped (ep->stopped) to indicates the class
driver will not visit device driver any more.
the ep-stopped will be initialized as 1 for non-control endpoint
it will be 0 after fsl_ep_enable, and be 1 after fsl_ep_disable.
Where is a non-sleep wait routine at disconnect event for waiting all
endpoints are stopped
- Some controller's (like i.mx6q) DP will change from J
to SE0 slowly after the cable disconnects with host, in that case there
will be a wakeup interrupt after driver enables the wakeup interrupt.
For i.mx6q, there is a discharge routine for DP after the disconnection.
- Should not wait vbus to low during first otg switch, as the wait will
be timeout when the usb cable is connecting to host.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
ENGR00162319: MX6 - Add support for updated VDDARM voltages
Set the ARM LDO voltage to 1.225V to run the part at 1GHz.
Also updated the rest of the voltages based on the latest
available working points.
The boards will need to be modified for this change to work
correctly. Please ensure that the VDDARM_IN is set to 1.38V
(using the potentiometer on the ARM2 board or choosing the correct
resistors on the sabrelite boards).
Also added command line option (arm_freq=800) to set the max ARM freq.
Add:
arm_freq=1000 -> to set the max ARM freq to 1GHz
arm_freq=800 -> to set the max ARM freq to 800MHz.
Default max ARM freq is 1GHz. No other values are currently
supported. If your board is not modified, please add the command
line "arm_freq=800' to avoid failures.
Dong Aisheng [Thu, 17 Nov 2011 11:24:54 +0000 (19:24 +0800)]
ENGR00162506 mx6q: set a correct clock for asrc
The ASRC mem to mem mode does not work without this patch.
Bacause 1.5Mhz clock rate is not available which will cause
clock setting fail, change to 7.5Mhz (the mininum one) to make
ASRC work properly.
Fugang Duan [Fri, 11 Nov 2011 06:25:11 +0000 (14:25 +0800)]
ENGR00162013 - FEC : Fix loss interrupt when add "rootwait"
- MII timeout when config ipg 40MHz mode and add "rootwait"
para in uboot. Kernel will delay before peripheral equipment
are ready, which lead to CPU loss interrupt.
- So, prolong the timeout time, and increase the MII clock.
Tony Lin [Thu, 17 Nov 2011 04:51:27 +0000 (12:51 +0800)]
ENGR00162335-1 [mx6q_arm2]SD card 3.0 can't be recognized
fix pin conflict between sd vselect and canbus enable pin.
add 'canbus' to the cmdline will enable canbus driver.
if canbus driver is enabled, sd 3.0 card will not work
ENGR00162460:MX6-Revert "MX6-Disable PLL1 when CPU clk is below 400MHz."
This reverts commit 564e25cb10cd827ea3fa5cda2487fd978f08bbd7.
Sourcing ARM_CLK from PLL2_PFD_400M is causing issues when setting
the ARM_PODF. So for now source arm_clk from PLL1_SYS_MAIN only.
Dong Aisheng [Wed, 16 Nov 2011 09:46:59 +0000 (17:46 +0800)]
ENGR00162364 flexcan: fix endless errors causing system hang
Clear state error to avoid ednless state error if error happens
which will call napi_schedule() each time, seems a little high load,
to cause system hang.
Jason Chen [Wed, 16 Nov 2011 09:33:15 +0000 (17:33 +0800)]
ENGR00162360 mxc_vout: fix STREAMOFF and G_CROP issues
1. move videobuf_mmap_free to mxc_vout_release.
2. call videobuf_queue_cancel in mxc_vout_release if no streamon called.
3. correct return value of G_CROP for support_window case.
wu guoxing [Wed, 16 Nov 2011 03:56:45 +0000 (11:56 +0800)]
ENGR00162325 mx6:Make GPU as kernel module defaultly
GC355 needs to map all reserved memory and consume too much vmalloc space.
So it needs a special kernel command line vmalloc=xxxM.
otherwise, kernel can not boot
Anson Huang [Wed, 16 Nov 2011 06:04:41 +0000 (14:04 +0800)]
ENGR00162330 [mx6]Only mask irq#86 and #125 for wait mode
These two irqs can't be masked together, otherwise, system
will crash when only booting up one core, and NFS can only
work with 4 cores running. Need hardware team to help find
the root cause, this is only a temp work around.
ENGR00162318: MX6: Donot power down PLL when PLL is disabled
Relocking of PLL sometimes takes longer than 1msec when PLL is
enabled after a power down. The kernel panics if the PLL is not locked
in 1ms. Max time expected by HW is only 500us.
Workaround is to disable the output of the PLL and set it in bypass
mode when its output is not being used.
projects / karo-tx-linux.git / log