usb: chipidea: prevent endless loop registering platform_devices when probe fails
Commit 40dcd0e ("usb: chipidea: add PTW, PTS and STS handling") introduced
the following code to the ci_hdrc_probe() function:
+ if (!dev->of_node && dev->parent)
+ dev->of_node = dev->parent->of_node;
This inadvertently associates the ci_hdrc device with the ci_hdrc_imx
driver (which created the ci_hdrc device in the first place).
This results in ci_hdrc_imx_probe() being run for the ci_hdrc device
if ci_hdrc_probe() fails for some reason.
ci_hdrc_imx_probe() will happily create a new ci_hdrc platform_device
whose probing will likewise fail and trigger a new invocation of
ci_hdrc_imx_probe() ... ad nauseam.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Reviewed-and-tested-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
This patch provides a cleaner solution to the problem described in
commit 20a677fd ("usb: chipidea: improve kconfig").
The goal to be achieved is to force USB_CHIPIDEA=m if either
USB_EHCI_HCD=m or USB_GADGET=m.
If both are 'y' USB_CHIPIDEA may be selected to be 'm' or 'y'.
The old patch had the drawback, that USB_CHIPIDEA could be chosen as
'y' though USB_EHCI_HCD or USB_GADGET (or both) were 'm' leading to a
situation where USB_CHIPIDEA_HOST or USB_CHIPIDEA_UDC vanished from
the config options producing a compilable but dysfunctional driver.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Reviewed-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
usb: chipidea: move hw_phymode_configure() into probe
Currently hw_phymode_configure() is located inside hw_device_reset(), which is
only called by chipidea udc driver.
When operating in host mode, we also need to call hw_phymode_configure() in
order to properly configure the PHY mode, so move this function into probe.
After this change, USB Host1 port on mx53qsb board is functional.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Arnaud Patard <arnaud.patard@rtp-net.org> Reviewed-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Fugang Duan [Mon, 19 Aug 2013 02:58:24 +0000 (10:58 +0800)]
ENGR00275619 net: fec: set reset phy gpio to high in .probe().
In .probe() call fec_of_init() to parse phy reset gpio, and
request the gpio for later use. For the init, we must set the
gpio to high to let phy power on.
Robin Gong [Tue, 13 Aug 2013 08:58:26 +0000 (16:58 +0800)]
ENGR00275004-1 input: touchscreen: max11801_ts: Add DCM mode for max11801 ADC
We need add DCM mode/AUX mode for ADC converter function of max11801, so that
it can be used to read voltage of battery. Meanwhile, let the driver based on
device tree. The patchset is based on below patch (V3.5.7):
1. Add support for VDDSOC/VDDPU operating points that track
the VDDARM_CAP within 50mV to the device tree.
2. Add CPU freq and VDDSOC/VDDPU operating points to MX6DL and MX6SL.
Anson Huang [Thu, 15 Aug 2013 20:18:22 +0000 (16:18 -0400)]
ENGR00275403 ARM: imx: Support CPU hotplug
When doing secondary cores enable/disable, the enable bit
and reset bit in SRC should be written together. Without
this, CPU hotplug can NOT pass stress test, and with this,
it can passed over 500k iterations CPU hotplug test with
many threads running in background, at least three boards
are tested.
When trying hotplug a secondary core, it should stay
in idle forever before it is disabled from SRC.
Fugang Duan [Fri, 16 Aug 2013 01:16:21 +0000 (09:16 +0800)]
ENGR00275469 net:fec: move devm_* and of_* apis to probe function
fec_reset_phy() function is called in fec_enet_open(). And
fec_reset_phy() call of_get_named_gpio() and devm_gpio_request_one()
apis, which makes no sense since the two apis do something that
should only be done at .probe() time.
So move two functions into fec_probe() and only leave gpio_set_value()
and msleep() calls in fec_reset_phy(). And remove fec_free_reset_gpio()
function.
Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:
Item#1: If add performance stress test while runing IEEE1588, the link
down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
no such issue found.
The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.
Anson Huang [Wed, 14 Aug 2013 19:51:41 +0000 (15:51 -0400)]
ENGR00275023-5 ARM: imx: Support standby mode for suspend
Support standby mode for suspend, standby mode will only
make CCM enter STOP mode with OSC on and no PMIC_STBY_REQ
asserted, standby mode focus more on resume latency than
power number.
Anson Huang [Wed, 14 Aug 2013 19:47:18 +0000 (15:47 -0400)]
ENGR00275023-4 ARM: imx: Setting CPU isolation according to dts
Different boards may use different PMICs, and the PMICs' power
rail ramp up time can impact the DSM mode a lot, so we need to
adjust the CPU isolation timing setting according to board dts
setting, if there is no such setting defined in dts, use default
value.
Sandor Yu [Wed, 14 Aug 2013 05:32:42 +0000 (13:32 +0800)]
ENGR00275070 arm: dts: add hdmi properties to i.mx6 sabreauto dts
- Add hdmi properties to dts for sabreauto board.
- Remove lcd properties from sabreauto dts, because no parallel lcd
panel for sabresdauto board.
- Change the primary lvds channel from 1 to 0 for the sabreauto board.
- Set hdmi as default secondly display for all i.mx6 board.
Current driver only do phy reset in probe function, which is
not right. Since some phy clock is disabled after module probe,
the phy enter abnormal status, which needs do reset to recovery
the phy. And do ifconfig ethx up/down test, the phy also enter
abnormal status.
The log as:
libphy: 2188000.ethernet:04 - Link is Up - 10/Full
libphy: 2188000.ethernet:04 - Link is Up - 100/Full
libphy: 2188000.ethernet:04 - Link is Down
libphy: 2188000.ethernet:04 - Link is Up - 10/Half
libphy: 2188000.ethernet:04 - Link is Up - 10/Full
libphy: 2188000.ethernet:04 - Link is Up - 100/Full
...
So, do phy reset if ethx up/down or do clock enable/disable
operation.
Fugang Duan [Wed, 14 Aug 2013 08:26:19 +0000 (16:26 +0800)]
ENGR00275246-03: ARM: imx6sl: config iomux-gpr1 to select clock for fec
Config iomux-gpr1 to select clock source for fec system clock.
Clear gpr1[14], gpr1[18-17] bit to select the fec clock source
from internal anatop PLL.
Fugang Duan [Wed, 14 Aug 2013 08:17:15 +0000 (16:17 +0800)]
ENGR00275246-02: ARM: imx6sl: add imx6sl iomux-gpr field define
Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
add fec related macro define.
Add fec phy reset for imx6sl evk board.
Add iomux gpr device node, which used for fec to clear gpr1[14],
gpr1[18-17] bit to select the fec clock sourcr from internal anatop PLL.
Shengjiu Wang [Fri, 9 Aug 2013 06:45:51 +0000 (14:45 +0800)]
ENGR00274585-9 ASoC: change error message to debug message
This error message is not actual error, which is a warning. When using
FE/BE, if there is widget which is used by playback and capture route, then
this message will be printed.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Shengjiu Wang [Fri, 9 Aug 2013 06:41:11 +0000 (14:41 +0800)]
ENGR00274585-1 dma: imx-sdma: update sdma to support p2p
For the sake of support asrc p2p, the sdma driver need to be updated.
1. Add another dma_request, p2p need two dma_request.
2. There are some cases which need to change the config after the
dma_request_channel. add dma_request config in dmaengine_slave_config().
3. add dma_request0 and dma_request1 in dma_slave_config for runtime config
in dmaengine_slave_config.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Robby Cai [Thu, 8 Aug 2013 03:23:54 +0000 (11:23 +0800)]
ENGR00274412-1 dma: pxp: Port ePxP driver to 3.10
It's ported from v3.5.7, which contains ePxP DMAENGINE driver and
a client driver named pxp_device. This patch also includes the changes:
- use uapi header file
- remove VM_RESERVED since it's deprecated, and drop redundant VM_IO flag
since it's automatically set in remap_pfn_range()
- use <linux/platform_data/dma-imx.h> instead of <mach/dma.h>
- use devm_kzalloc() instead in pxp_probe()
- use macro __KERNEL__ in pxp_dma uapi header to avoid definition conflict
Sandor Yu [Tue, 13 Aug 2013 08:55:20 +0000 (16:55 +0800)]
ENGR00274059-02 ARM: Add new dts for imx6q/imx6dl SabreSD hdcp
hdcp ddc pins conflict with i2c2,
add new dts file for imx6q and imx6dl SabreSD board,
enable hdcp and disable i2c2 in these dts files.
Remove hdmi pins property from mx6qdl-sabresd.dtsi.
Anson Huang [Thu, 8 Aug 2013 21:05:38 +0000 (17:05 -0400)]
ENGR00274473-1 regulator: add more notifier events
Some hardware modules need strict flows according
to regulator's enable/disable, such as for i.MX6
SOC's PU regulator, there is another power gate
in GPC module, it needs to disable PU modules' clock
before PU regulator is disabled and need to enable
clock right after PU regulator is enabled, then it
can do GPC's power gate operation.
So we need to add REGULATOR_EVENT_PRE_DISABLE and
REGULATOR_EVENT_ENABLE for regulator's notifier events.
Shawn Guo [Thu, 1 Aug 2013 04:22:04 +0000 (12:22 +0800)]
ARM: dts: imx6q: add quirky select input for USB_OTG_ID
For some reason, the select input of pin function USB_OTG_ID is not
implemented via a regular select input register but using the bit
USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4).
As per the workaround for such quirk implemented in pinctrl driver,
we need to compose the input_val cell as below.
31 23 15 7 0
| 0xff | shift | width | select |
Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and
0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell.
Shawn Guo [Sun, 4 Aug 2013 13:39:23 +0000 (21:39 +0800)]
pinctrl: imx: work around select input quirk
The select input for some pin may not be implemented using the regular
select input register but the general purpose register. A real example
is that imx6q designers found the select input for USB OTG ID pin is
missing at the very late stage, and can not add a new select input
register but have to use a general purpose register bit to implement it.
The patch adds a workaround for such select input quirk by interpreting
the input_val cell of pin function ID in a different way, so that all
the info that needed for setting up select input bits in general purpose
register could be decoded from there.
Shawn Guo [Tue, 13 Aug 2013 08:59:28 +0000 (16:59 +0800)]
ENGR00269945: ARM: imx6: report soc info via soc device
The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl. With the support, user space can get soc related
info by looking at sysfs like below.
Shawn Guo [Tue, 13 Aug 2013 06:59:43 +0000 (14:59 +0800)]
ENGR00269945: ARM: imx6qdl: add a common function to initialize revision from anatop
The patch creates a common function imx_init_revision_from_anatop() by
merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any
SoC that encodes revision info in anatop can use it to initialize
revision.
Shawn Guo [Tue, 13 Aug 2013 06:10:29 +0000 (14:10 +0800)]
ENGR00269945: ARM: imx6qdl: use common soc revision helpers
It calls imx_set_soc_revision() to set up soc revision in
imx6q_init_revision(), and replaces all the occurrences imx6q_revision()
and imx6dl_revision() with common helper imx_get_soc_revision().
Similar to what we do for cpu type, the patch adds helper functions
imx_set_soc_revision() and imx_get_soc_revision() to maintain
imx_soc_revision in cpu.c.
Nicolin Chen [Tue, 13 Aug 2013 03:37:54 +0000 (11:37 +0800)]
ENGR00274386-2 ASoC: imx-wm8962: Set MCLK source clock to 0Hz in hw_free()
When DAPM closed WM8962 after playback, its driver would prompt
'wm8962 0-001a: Unsupported sysclk ratio 500' due to the invalid
divisor calculated by WM8962 codec driver.
To fix it, we can work around by setting its MCLK source to 0Hz,
so the codec driver would never get an invalid divisor any more.
Since hw_params() would re-set the MCLK source, no need to worry
about any side-effect.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
We are using auto sample rate feature of WM8962, whereas it doesn't
support those sample rates bigger than 96KHz, 192Khz for example,
so 384 * samplerate would be too big for it to handle. When playing
192KHz 24bit wav file, the playback would be slower than normal.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Hongzhang Yang [Mon, 12 Aug 2013 07:38:07 +0000 (15:38 +0800)]
ENGR00274761-3 Upgrade VPU driver for Linux 3.10 kernel
Modify mxc_vpu.c to adapt to kernel 3.10 change
- Remove all references to header files in mach folder
- Include linux/clk.h instead of mach/clock.h
- Call device_reset instead of imx_src_reset_vpu
- Dummy PU and PM api callings before they are ready
- Dummy cpu_is_mx5? api callings
- Remove VM_RESERVED flags
- Call gen_pool instead of iram_alloc
Modify mxc_vpu.h
- Change CONFIG_ARCH_MX6 to CONFIG_SOC_IMX6Q
Modify Kconfig:
- Change ARCH_MX? to SOC_IMX?, remove ARCH_MX3/ARCH_MX37
because for MX3 series only SOC_IMX31 and SOC_IMX35 are
defined in Linux 3.10, and these chips don't have VPU.
Need to add SOC_IMX37 to VPU Kconfig if MX37 could be
supported later.
Add VPU to config and build path
- mxc/Kconfig
- mxc/Makefile
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
Hongzhang Yang [Mon, 12 Aug 2013 07:23:41 +0000 (15:23 +0800)]
ENGR00274761-2 Upgrade VPU driver for Linux 3.10 kernel
Add VPU node in dtsi
- Add VPU node (common part) in imx6qdl.dtsi. It was defined
in imx6.dtsi in Linux 3.5.7.
- Add "iram" property for gen_pool api callings
- Add "resets" property for device_reset api calling
- Add VPU node (soc specific part) in imx6q.dtsi and imx6dl.dtsi
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
Hongzhang Yang [Mon, 12 Aug 2013 07:14:23 +0000 (15:14 +0800)]
ENGR00274761-1 Upgrade VPU driver for Linux 3.10 kernel
Pick files from origin/imx_3.5.7 commit 135bf02a0727ea5ce96
- mxc_vpu.h is picked from arch/arm/plat-mxc/include/mach/
and put to include/linux/
- drivers/mxc/vpu/Kconfig
- drivers/mxc/vpu/Makefile
- drivers/mxc/vpu/mxc_vpu.c
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
Anson Huang [Mon, 12 Aug 2013 21:17:57 +0000 (17:17 -0400)]
ENGR00274768-2 ARM: imx: Use irq #32 for cpuidle instead of irq #125
IRQ #125's status is not constant on different boards, IRQ #32 is
IOMUXC's interrupt which can be triggered manually at anytime, use
this irq instead of #125 to generate interrupt for avoiding CCM enter
low power mode by mistake.
Shawn Guo [Tue, 13 Aug 2013 01:16:52 +0000 (09:16 +0800)]
ENGR00269945: ARM: imx6sl: initialize use count of IPG clock
We're running into a system hang during imx6sl boot. It's been tracked
down to SDMA driver function sdma_init(). System hangs immediately
after the clk_disable() is called in sdma_init().
It turns out that the issue is caused by IPG bus clock which is the
parent of sdma clock is turned off accidentally due to the incorrect
initial use count. IPG clock is initial on and should be always on
when system operates. But the use count of the clock is zero initially.
So when the last child clock gets disabled, the use count of IPG clock
reaches zero, and thus clock framework will turn off IPG clock (and
possibly parent clocks along the way), and causes the system hang.
Let's initialize the use count of IPG clock by calling
clk_prepare_enable() on it to match the on state of the clock, so that
the clock will not be turned off accidentally.
Sandor Yu [Mon, 12 Aug 2013 10:51:52 +0000 (18:51 +0800)]
ENGR00274821 ARM: Add i.MX6 FB properties to dts for SabreAuto board
- Add Framebuffer and ldb properties to dts for i.MX6Q and
i.MX6DL SabreAuto board.
- Add PWM3 and backlight properties to dts for i.MX6Q and
i.Mx6DL SabreAuto board.
- fix i2c2 indent in dts.
Luwei [Thu, 8 Aug 2013 08:35:24 +0000 (16:35 +0800)]
ENGR00274247: touch: add egalax touch driver support on i.MX6Q/DL AUTO/SD
Copy the egalax touch screen driver from linux3.5.7.Make some
modification.Remove the __devinit __devexit __devexit_p out
of the file, because 3.10 does not support.
This patch removes the unnecessary gpio_set_value() and
gpio_free() function calls after request the gpios with
gpio_requestion_one() successfully. Also, this patch adds
a warning message if the request fails.
Hannstar LVDS panel CABC function turns backlight density
automatically according to display content. This may introduce
annoying unstable backlight when display content changes.
So, this patch disables the CABC function if a platform's of
device tree provides controlling gpios in lvds_cabc_ctrl node.
This patch adds lvds_cabc_ctrl node in imx6qdl-sabresd.dtsi file.
This node contains two gpio entries for the Hannstar LVDS panel
CABC control function on LVDS0 and LVDS1 interfaces.
This patch adds pinmux entries for LVDS0 and LVDS1 to control the
Hannstar LVDS panel CABC function. Pin NANDF_CS2 and pin NANDF_CS3
are configured to be gpio so that they can control the CABC function.
Anson Huang [Thu, 8 Aug 2013 17:57:23 +0000 (13:57 -0400)]
ENGR00274056-3 thermal: imx: binding device cooling to thermal
1. imx thermal depends on device cooling config, as only cpu
cooling is not enough for cooling down SOC;
2. binding device cooling to imx thermal driver.
3. add temperature buffer for passive trip, which means when
temperature cross passive trip, cooling devices will be triggered,
but only when temperature drop to more than the number we defined(10 C)
lower than passive trip, cooling devices will be canceled. this
is to avoid triggering/canceling cooling device back and forth when
temperature is around passive trip.
Anson Huang [Thu, 8 Aug 2013 17:20:40 +0000 (13:20 -0400)]
ENGR00274056-1 thermal: add device cooling for thermal driver
cpu cooling is not enough when temperature is
too hot, as some devices may contribute a lot of heat
to SOC, such as GPU, so we need to add device cooling
as well, when system is too hot, devices can also take
their actions to lower SOC temperature.
when temperature cross the passive trip, device cooling
driver will send out notification, those devices who
register this devfreq_cooling notification will take
actions to lower SOC temperature.
Robin Gong [Mon, 5 Aug 2013 09:40:02 +0000 (17:40 +0800)]
ENGR00273425 ARM: imx: enable suspend code for imx6q/dl
Enable DSM code for imx6, the code porting form kernel 3.5.7.So with the patch,
we can suspend imx6q, imx6dl from iram to decrease power number of DDR IO:
save ~15mA@1.5V on imx6qsabresd, but need more ~30us in suspend and resume back.
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