Chris Wilson [Mon, 4 Jan 2016 10:10:59 +0000 (10:10 +0000)]
drm: Balance error path for GEM handle allocation
The current error path for failure when establishing a handle for a GEM
object is unbalance, e.g. we call object_close() without calling first
object_open(). Use the typical onion structure to only undo what has
been set up prior to the error.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Lukas Wunner [Sat, 2 Jan 2016 17:47:17 +0000 (18:47 +0100)]
vga_switcheroo: Prettify documentation
Fix indentation of vga_switcheroo sections in gpu.tmpl.
Change section type of API documentation from "chapter" to "sect1"
so that the individual functions no longer clutter up the ToC.
Group together under a new "API" chapter.
Fix wording "heretoforth" -> "henceforth".
Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Matt Roper [Sat, 19 Dec 2015 01:27:01 +0000 (17:27 -0800)]
drm/fb-helper: Use proper plane mask for fb cleanup
pan_display_atomic() calls drm_atomic_clean_old_fb() to sanitize the
legacy FB fields (plane->fb and plane->old_fb). However it was building
the plane mask to pass to this function incorrectly (the bitwise OR was
using plane indices rather than plane masks). The end result was that
sometimes the legacy pointers would become out of sync with the atomic
pointers. If another operation tried to re-set the same FB onto the
plane, we might end up with the pointers back in sync, but improper
reference counts, which would eventually lead to system crashes when we
accessed a pointer to a prematurely-destroyed FB.
The cause here was a very subtle bug introduced in commit:
drm/core: Fix old_fb handling in pan_display_atomic.
I found the crashes were most easily reproduced (on i915 at least) by
starting X and then VT switching to a VT that wasn't running a console
instance...the sequence of vt/fbcon entries that happen in that case
trigger a reference count mismatch and crash the system.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93313 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(Sometimes dev_name(ddev->dev) is used, which is the same.)
As suggested in
http://lists.freedesktop.org/archives/dri-devel/2015-December/096441.html,
the unique name of a new DRM device can be set as dev_name(parent_dev)
when parent_dev is not NULL (vgem is a special case).
Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Nicolas Iooss [Fri, 11 Dec 2015 10:20:27 +0000 (11:20 +0100)]
drm: make drm_dev_set_unique() not use a format string
drm_dev_set_unique() uses a format string to define the unique name of a
device. This feature is not used as currently all the calls to this
function either use "%s" as a format string or directly use
dev_name().
Even though this second kind of call does not introduce security
problems, because there cannot be "%" characters in dev_name() results,
gcc issues a warning when building with -Wformat-security flag
("warning: format string is not a string literal (potentially
insecure)"). This warning is useful to find real bugs like the one
fixed by commit 3958b79266b1 ("configfs: fix kernel infoleak through
user-controlled format string"). False positives which do not bring
an extra value make the work of finding real bugs harder.
Therefore remove the format-string feature from drm_dev_set_unique().
Nicolas Ferre [Tue, 15 Dec 2015 11:20:57 +0000 (12:20 +0100)]
drm: atmel-hlcdc: add support for sama5d2 SoCs
As the hardware description for this chip is the same as the sama5d4, we use
this SoC structures for layers and DC descriptions. Thus only 2 lines are added
to the atmel_hlcdc_of_match table.
The compatible string is already documented in the parent MFD driver's binding.
Thierry Reding [Tue, 15 Dec 2015 11:20:50 +0000 (12:20 +0100)]
drm/bochs: Store correct CRTC index in events
Previously a negative pipe caused a special case to be triggered for
drivers that didn't have proper VBLANK support. The trigger for this
special case is now independent of the pipe, so the correct CRTC index
can now be stored in events.
Thierry Reding [Tue, 15 Dec 2015 11:20:49 +0000 (12:20 +0100)]
drm/gma500: Sanity-check pipe index
If the DSI output isn't connected, then mdfld_dsi_encoder_get_pipe()
will return -1. The mdfld_dsi_dp_mode_set() function doesn't properly
check for this condition and causes the following compiler warnings:
CC drivers/gpu/drm/gma500/mdfld_dsi_dpi.o
drivers/gpu/drm/gma500/mdfld_dsi_dpi.c: In function ‘mdfld_dsi_dpi_mode_set’:
drivers/gpu/drm/gma500/mdfld_dsi_dpi.c:828:35: warning: array subscript is below array bounds [-Warray-bounds]
u32 pipeconf = dev_priv->pipeconf[pipe];
^
drivers/gpu/drm/gma500/mdfld_dsi_dpi.c:829:33: warning: array subscript is below array bounds [-Warray-bounds]
u32 dspcntr = dev_priv->dspcntr[pipe];
^
Fix this by checking for a valid pipe before indexing the pipeconf and
dspcntr arrays.
Eric Anholt [Tue, 15 Dec 2015 00:26:26 +0000 (16:26 -0800)]
drm: Use the driver's gem_object_free function from CMA helpers.
VC4 wraps the CMA objects in its own structures, so it needs to do its
own teardown (waiting for GPU to finish, updating bo_stats tracking).
The other CMA drivers are using drm_gem_cma_free_object as their
gem_free_object, so this should be a no-op for them.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Mykola Lysenko [Mon, 7 Dec 2015 18:55:51 +0000 (13:55 -0500)]
drm/dp/mst: reply with ACK for UP reqs
Currently we reply with NACK to UP requests which might
confuse receivers. We haven't seen any actual issues with
this but should still respond to UP requests correctly.
Daniel Vetter [Tue, 8 Dec 2015 08:49:18 +0000 (09:49 +0100)]
drm/atomic-helper: Drop unneeded argument from check_pending_encoder
Just a remnant from an old iteration of this patch that I've forgotten
to remove: We only need the encoder to figure out whether it has been
reassigned in this update already or not to figure out whether there's
a conflict or not.
DRM Docbook is now Markdown ready. This means its doc is able to
use markdown text on it.
* Documentation/DocBook/drm.tmpl: Contains a table duplicated from
drivers/gpu/drm/i915/i915_reg.h. This is not needed anymore
* drivers/gpu/drm/drm_modeset_lock.c: had a code example that used
to look pretty bad on html. Fixed by using proper code markup.
* drivers/gpu/drm/drm_prime.c: Remove spaces between lines to make
a proper markup list.
* drivers/gpu/drm/i915/i915_reg.h: Altought pandoc supports tables,
it doesn't support table cell spanning. But we can use fixed-width
for those special cases.
* include/drm/drm_vma_manager.h: Another code example that should be
proper indented with four spaces.
v2 (Daniel): Adjust name to gpu.xml due to rename.
v3 (Daniel):
Split out the actual enabling in the Makefile - this way we can merge
the conversion, while just keeping the enabling in a drm-private tree.
Signed-off-by: Danilo Cesar Lemes de Paula <danilo.cesar@collabora.co.uk> (v1) Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Stephan Mueller <smueller@chronox.de> Cc: Michal Marek <mmarek@suse.cz> Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: intel-gfx <intel-gfx@lists.freedesktop.org> Cc: dri-devel <dri-devel@lists.freedesktop.org> Acked-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1448471279-19748-2-git-send-email-daniel.vetter@ffwll.ch
Dave Airlie [Tue, 15 Dec 2015 01:01:04 +0000 (11:01 +1000)]
Merge tag 'drm-intel-next-2015-12-04-1' of git://anongit.freedesktop.org/drm-intel into drm-next
This is the "fix igt basic test set issues" edition.
- more PSR fixes from Rodrigo, getting closer
- tons of fifo underrun fixes from Ville
- runtime pm fixes from Imre, Daniel Stone
- fix SDE interrupt handling properly (Jani Nikula)
- hsw/bdw fdi modeset sequence fixes (Ville)
- "don't register bad VGA connectors and fall over" fixes (Ville)
- more fbc fixes from Paulo
- and a grand total of exactly one feature item: Implement dma-buf/fence based
cross-driver sync in the i915 pageflip path (Alex Goins)
* tag 'drm-intel-next-2015-12-04-1' of git://anongit.freedesktop.org/drm-intel: (70 commits)
drm/i915: Update DRIVER_DATE to 20151204
drm/i915/skl: Add SKL GT4 PCI IDs
Revert "drm/i915: Extend LRC pinning to cover GPU context writeback"
drm/i915: Correct the Ref clock value for BXT
drm/i915: Restore skl_gt3 device info
drm/i915: Fix RPS pointer passed from wait_ioctl to i915_wait_request
Revert "drm/i915: Remove superfluous NULL check"
drm/i915: Clean up device info structure definitions
drm/i915: Remove superfluous NULL check
drm/i915: Handle cdclk limits on broadwell.
i915: wait for fence in prepare_plane_fb
i915: wait for fence in mmio_flip_work_func
drm/i915: Extend LRC pinning to cover GPU context writeback
drm/i915/guc: Clean up locks in GuC
drm/i915: only recompress FBC after flushing a drawing operation
drm/i915: get rid of FBC {,de}activation messages
drm/i915: kill fbc.uncompressed_size
drm/i915: use a single intel_fbc_work struct
drm/i915: check for FBC planes in the same place as the pipes
drm/i915: alloc/free the FBC CFB during enable/disable
...
Dave Airlie [Tue, 15 Dec 2015 00:43:27 +0000 (10:43 +1000)]
Merge tag 'drm-vc4-next-2015-12-11' of http://github.com/anholt/linux into drm-next
This pull request brings in 3D acceleration support for the VC4 GPU.
While there is still performance work to be done (particularly
surrounding RCL generation), the CL submit ABI should be settled and
done now.
* tag 'drm-vc4-next-2015-12-11' of http://github.com/anholt/linux:
drm/vc4: Add an interface for capturing the GPU state after a hang.
drm/vc4: Add support for async pageflips.
drm/vc4: Add support for drawing 3D frames.
drm/vc4: Bind and initialize the V3D engine.
drm/vc4: Fix a typo in a V3D debug register.
drm/vc4: Add an API for creating GPU shaders in GEM BOs.
drm/vc4: Add create and map BO ioctls.
drm/vc4: Add a BO cache.
drm: Create a driver hook for allocating GEM object structs.
Dave Airlie [Tue, 15 Dec 2015 00:42:07 +0000 (10:42 +1000)]
Merge branch 'exynos-drm-next' of git://git.kernel.org:/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
- Support runtime pm
. In case of most ARM SoC, each IP has each power domain which should be
controlled by each IP driver using runtime pm interface. So this patch
series makes each IP driver to control its own power domain when
drm dpms is requested.
- Support of_graph based dt binding for DP panel.
. This patch series adds of_graph based dt binding for DP panel.
And also it keeps backward compatibility. This includes dt binding
patch so I got Acked-by from Krzysztof Kozlowski who is a Exynos
SoC maintainer and from Rob Herring who is a device tree maintainer.
- Cleanup for Exynos DRM IPP enhancement.
. This patch series is a first step for enhancing existing IPP framework
which will integrate existing IPP functions with DRM KMS part so that
these can be transparent to userspace. For other portion of the patch
series, we will have more times for the review.]
* 'exynos-drm-next' of git://git.kernel.org:/pub/scm/linux/kernel/git/daeinki/drm-exynos: (29 commits)
drm/exynos: gem: remove old unused prototypes
drm/exynos: fimd: fix dma burst size setting for small plane size
drm/exynos: fix clipping when scaling is enabled
drm/exynos: mixer: use ratio precalculated in exynos_state
drm/exynos: add generic check for plane state
drm/exynos: introduce exynos_drm_plane_config structure
drm/exynos: mixer: enable video overlay plane only when VP is available
drm/exynos: mixer: use crtc->state->adjusted_mode instead of crtc->mode
drm/exynos: introduce exynos_drm_plane_state structure
drm/exynos: move dma_addr attribute from exynos plane to exynos fb
drm/exynos: exynos7-decon: remove excessive check
drm/exynos: rotator: convert to common clock framework
drm/exynos: gsc: add device tree support and remove usage of static mappings
drm/exynos: gsc: fix wrong pm_runtime state
drm/exynos: gsc: prepare and unprepare gsc clock
ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi
dt-bindings: exynos-dp: update ports node binding for panel
drm/exynos: dp: add of_graph dt binding support for panel
drm/exynos: decon: remove unused variables
drm/exynos: dsi: modify a error type when getting a node failed
...
Dave Airlie [Tue, 15 Dec 2015 00:07:07 +0000 (10:07 +1000)]
Merge tag 'topic/drm-misc-2015-12-14' of git://anongit.freedesktop.org/drm-intel into drm-next
Last (very likely at least) drm-misc pull for 4.5. 3 big things:
- piles of docs for kms vtables.
- drm.debug dmesg output prettification from Ville (i915 parts are for 4.6
I think)
- connector mode probing/validating/merging cleanup from Ville.
[airlied : fix drm_encoder_init conflict.]
* tag 'topic/drm-misc-2015-12-14' of git://anongit.freedesktop.org/drm-intel: (43 commits)
drm: modes: Revert cc344980c767 "replace simple_strtoul by kstrtouint"
drm: Expand the drm_helper_probe_single_connector_modes() docs
drm: Allow override_edid to override the firmware EDID
drm/sti: Drop bogus drm_mode_sort() call
drm: Drop drm_helper_probe_single_connector_modes_nomerge()
drm: Only merge mode type bits between new probed modes
drm: Flatten drm_mode_connector_list_update() a bit
drm: Rename MODE_UNVERIFIED to MODE_STALE
drm: Don't overwrite UNVERFIED mode status to OK
drm: Add plane->name and use it in debug prints
drm: Add crtc->name and use it in debug messages
drm: Use driver specified encoder name
drm: Pass 'name' to drm_encoder_init()
drm: Pass 'name' to drm_universal_plane_init()
drm: Pass 'name' to drm_crtc_init_with_planes()
drm: Documentation style guide
drm: Document drm_encoder/crtc_helper_funcs
drm: Move drm_display_mode an related docs into kerneldoc
drm/atomic-helper: Mention the new system/resume helpers the docs
drm: Document drm_connector_helper_funcs
...
Dave Airlie [Mon, 14 Dec 2015 23:52:29 +0000 (09:52 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
Main thing this time around is DSI support for msm8960/apq8064, which
should be helpful for getting an upstream kernel working on
nexus7/nexus4/etc.
* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (29 commits)
drm/msm/mdp: fix a problematic usage of WARN_ON()
drm/msm/dsi: Added missing mutex_unlock
drm/msm: ratelimit error irq msgs
drm/msm: Use unlocked gem unreferencing
drm/msm: trivial whitespace fix
dt-bindings: msm/dsi: Add DSIv2 documentation
dt-bindings: msm/dsi: Fix the order in which clocks are listed
drm/msm/dsi: Enable MMSS SPFB port via syscon
drm/msm/dsi: Don't use iommu for command TX buffer for DSIv2
drm/msm/dsi: Add dsi_cfg for APQ8064
drm/msm/dsi: Set up link clocks for DSIv2
drm/msm/dsi: Parse bus clocks from a list
drm/msm/dsi: Delay dsi_clk_init
drm/msm/dsi: Use a better way to figure out DSI version
drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY
drm/msm/dsi: Add support for 28nm PHY on 8960
drm/msm/dsi: Don't get byte/pixel source clocks from DT
drm/msm/mdp4: Initialize DSI encoders
drm/msm/mdp4: Call custom round_pixclk helper only if the encoder type is TMDS
drm/msm/dsi: Add a mdp4 encoder for DSI
...
Daniel Vetter [Mon, 23 Nov 2015 09:32:41 +0000 (10:32 +0100)]
drm/msm: Use unlocked gem unreferencing
For drm_gem_object_unreference callers are required to hold
dev->struct_mutex, which these paths don't. Enforcing this requirement
has become a bit more strict with
Archit Taneja [Tue, 1 Dec 2015 06:18:15 +0000 (11:48 +0530)]
dt-bindings: msm/dsi: Add DSIv2 documentation
Add additional property info needed for DSIv2 DT.
Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Tue, 1 Dec 2015 06:09:59 +0000 (11:39 +0530)]
dt-bindings: msm/dsi: Fix the order in which clocks are listed
List the clocks in the order that's used in DT. We don't have mdp/dsi
DT nodes for any SoC in upstream yet, but we align with the order
we intend to use.
Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Wed, 14 Oct 2015 10:01:13 +0000 (15:31 +0530)]
drm/msm/dsi: Enable MMSS SPFB port via syscon
For DSIv2 to work, we need to enable MMSS_AHB_ARB_MASTER_PORT in
MMSS_SFPB. We enable the required bitfield by retrieving MMSS_SFPB
regmap pointer via syscon.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Tue, 13 Oct 2015 06:50:47 +0000 (12:20 +0530)]
drm/msm/dsi: Don't use iommu for command TX buffer for DSIv2
We currently use iommu allocated DMA buffers for sending DSI commands.
DSIv2 doesn't have a port connected to the MDP iommu. Therefore, it
can't use iommu allocated buffers to fetch DSI commands.
Use a regular contiguous DMA buffer if we are DSIv2.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Fri, 9 Oct 2015 11:02:38 +0000 (16:32 +0530)]
drm/msm/dsi: Set up link clocks for DSIv2
DSIv2 (DSI on older A family chips) has slightly different link clock
requirements.
First, we have an extra clock called src_clk (with a dedicated RCG).
This is required by the DSI controller to process the pixel data
coming from MDP. It needs to be set at the rate "pclk * bytes_per_pixel".
We also need to explicitly configure esc_clk. On DSI6G chips, we don't
need to set a rate to esc_clk because its RCG is always sourced from
crystal clock (19.2 Mhz in all cases), which is within the escape clock
frequency range in the mipi DSI spec. For chips with DSIv2, the crystal
clock rate may not be within the required range (27Mhz on APQ8064).
Therefore, we derive it from the DSI byte clock. We calculate an esc_clck
rate that is within the mipi spec and also divisible by the byte clock
rate.
When setting rate and enabling the link clocks, we make sure that byte_clk
is configured before esc_clk, and src_clk before pixel_clk. We create two
different link_enable funcs for DSI6G and DSIv2 since the sequences are
different.
We also obtain two extra source clocks (dsi_src_clk and esc_src_clk) and
set their parent to the clocks provided by DSI PLL.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Fri, 9 Oct 2015 09:51:12 +0000 (15:21 +0530)]
drm/msm/dsi: Parse bus clocks from a list
DSI bus clocks seem to vary between different DSI host versions, and the
SOC to which they belong. Even the enable/disable sequence varies.
Provide a list of bus clock names in dsi_cfg. The driver will use this to
retrieve the clocks, and enable/disable them.
Add bus clock lists for DSI6G, and DSI for MSM8916(this is DSI6G too, but
there is no MMSS_CC specific clock since there is no MMSS clock controller
on 8916).
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Fri, 9 Oct 2015 07:10:39 +0000 (12:40 +0530)]
drm/msm/dsi: Delay dsi_clk_init
Initialize clocks only after we get the DSI host version. This will allow
us to get clocks using a pre-defined list based on the DSI major/minor
version of the host. This is required since clock requirements of
different major DSI revisions(v2 vs 6g) aren't the same.
Modify dsi_get_version to get the interface clock, and then put it after
it is used.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Fri, 9 Oct 2015 05:40:59 +0000 (11:10 +0530)]
drm/msm/dsi: Use a better way to figure out DSI version
The current version checking mechanism works fine for DSI6G blocks. It
doesn't work so well for older generation DSIv2 blocks.
The initial read of REG_DSI_6G_HW_VERSION(offset 0x0) would result in a
read of REG_DSI_CTRL for DSIv2. This register won't necessarily be 0 on
DSIv2. It can be non zero if DSI was previously initialized by the
bootloader.
Instead of reading offset 0x0, we now read offset 0x1f0. For DSIv2, this
register is DSI_VERSION, and is bound to be non-zero. On DSI6G, this
register(offset 0x1f0) is SCRATCH_REGISTER_0, which no one ever seems to
touch, and from all register dumps I'vc seen, holds 0 all the time.
Modify dsi_get_version to read REG_DSI_VERSION to determine whether we
are DSI6G or DSIv2.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Wed, 14 Oct 2015 06:33:44 +0000 (12:03 +0530)]
drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY
Add DSI PLL common clock framework clocks for 8960 PHY.
The PLL here is different from the ones found in B family msm chips. As
before, the DSI provides two clocks to the outside world. dsixpll and
dsixpllbyte (x = 1, 2). dsixpll is a regular clock divider, but
dsixpllbyte is modelled as a custom clock divider.
dsixpllbyte is the starting point of the PLL configuration. It is the
one that sets up the VCO clock rate. We need the VCO clock rate in the
form: F * byteclk, where F is a multiplication factor that varies on
the byte clock the DSI driver is trying to set. We use the custom
clk_ops for dsixpllbyte to ensure that the parent (VCO) is set at this
rate.
An additional divider (POSTDIV1) generates the bitclk. Since bit clock
can be derived from byteclock, we calculate it internally, and don't
expose it as a clock.
Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Mon, 30 Nov 2015 12:17:17 +0000 (17:47 +0530)]
drm/msm/dsi: Don't get byte/pixel source clocks from DT
We retrieve the byte and pixel source clocks (RCG clocks) in the dsi
driver via DT. These are needed so that we can re-parent these source
clocks if we want to drive it using a different DSI PLL.
We shouldn't get these via DT because they aren't clocks that directly
serve as inputs to the dsi host.
Fortunately, there is a static parent-child link between the
byte_clk_src/pixel_clk_src and byte_clk/pixel_clk clocks. So, we can
retrieve the source clocks via clk_get_parent.
Do this instead of retrieving via DT.
Cc: Rob Herring <robh@kernel.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Wed, 18 Nov 2015 12:28:28 +0000 (17:58 +0530)]
drm/msm/mdp4: Initialize DSI encoders
Create DSI encoders during modeset_init. The 2 encoders should ideally be
one command mode and one video mode DSI encoder respectively, but we don't
support command mode yet. We just create 2 of the same because the dsi
driver expects it, we end up using only the first one.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Wed, 18 Nov 2015 12:27:16 +0000 (17:57 +0530)]
drm/msm/mdp4: Call custom round_pixclk helper only if the encoder type is TMDS
The mdp_kms round_pixclk op creates problems when we have more
interfaces in use. It calls the DTV encoder's helper by default.
Check on encoder type and call the corresponding encoder's
func meant for rounding pixel clock. DSI and LVDS don't require
rounding, so just return rate in their case.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Wed, 18 Nov 2015 11:45:50 +0000 (17:15 +0530)]
drm/msm/mdp4: Initialize LCDC encoder even if panel driver isn't available
Currently, the driver defers if it doesn't find a drm_panel. This forces
us to have a drm_panel, if not, the driver isn't usable.
Make the lcdc encoder initialization independent of the availability of
the drm panel. We only check if there is a panel node specified in DT. If
it isn't, then we don't initialize the encoder at all. The panel node is
passed to the lcdc encoder and lvds connector drivers.
The connector driver takes the responsibility to retrieve the drm_panel
from the panel node, and update the status on whether the panel is
connected or not. This makes the panel usable even if the drm_panel
driver is inserted as a module later on.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Archit Taneja [Mon, 26 Oct 2015 09:13:57 +0000 (14:43 +0530)]
drm/msm/mdp5: high precision vblank timestamp support
MDP5 has line count and frame count registers for each interface. Enable
these counters and use them to implement the get_vblank_timestamp drm
driver op.
The line counter starts with the value 1 at the beginning of the VSYNC
pulse and ends with value VTOTAL at the end of VFP. This value is used
to determine whether we're in blanking period or not, and an adjusted
value of this counter is used to get vpos as expected by
get_scanout_position. Since there is no way to calculate hpos, we always
set it to 0.
Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Marek Szyprowski [Mon, 30 Nov 2015 13:53:29 +0000 (14:53 +0100)]
drm/exynos: fimd: fix dma burst size setting for small plane size
This patch fixes trashed display of buffers cropped to very small width.
Even if DMA is unstable and causes tearing when changing the burst size,
it is still better than displaying a garbage.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Marek Szyprowski [Mon, 30 Nov 2015 13:53:28 +0000 (14:53 +0100)]
drm/exynos: fix clipping when scaling is enabled
This patch fixes calculation of src x/y offset for negative crtc x/y
values when scaling is enabled. This fixes possible IOMMU fault when
scaling is enabled.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
This patch adds common structure for keeping plane configuration and
capabilities data. This patch is inspired by similar code developed by
Tobias Jakobi.
Changelog v2:
- fix vidi_win_types(i) call. vidi_win_types is not a function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
This patch introduces exynos_drm_plane_state structure, which subclasses
drm_plane_state and holds precalculated data suitable for configuring
Exynos hardware.
Marek Szyprowski [Mon, 30 Nov 2015 13:53:21 +0000 (14:53 +0100)]
drm/exynos: move dma_addr attribute from exynos plane to exynos fb
DMA address is a framebuffer attribute and the right place for it is
exynos_drm_framebuffer not exynos_drm_plane. This patch also introduces
helper function for getting dma address of the given framebuffer.
Changelog v2:
- use state->fb instead of plane->base.fb.
Marek Szyprowski [Mon, 30 Nov 2015 13:53:19 +0000 (14:53 +0100)]
drm/exynos: rotator: convert to common clock framework
This driver was not used after introduction of common clock framework.
This patch adds missing prepare/unprepare calls and allows to use it
again with current kernel code.
Seung-Woo Kim [Mon, 30 Nov 2015 13:53:18 +0000 (14:53 +0100)]
drm/exynos: gsc: add device tree support and remove usage of static mappings
This patch adds device tree support for exynos_drm_gsc. This patch
also fixed build issue on non-Exynos platforms, thus dependency on
!ARCH_MULTIPLATFORM can be now removed. The driver cannot be used
simultaneously with V4L2 Mem2Mem GScaller driver thought.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi
The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
since it uses a phandle to describe the connection between the DP port and
the display panel but uses the OF graph ports and endpoints to describe the
connection betwen the DP port, a bridge chip and the panel.
The Exynos DP driver and the DT binding have been changed to allow also to
describe the DP port to panel connection using ports / endpoints (OF graph)
so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 27 Nov 2015 14:32:45 +0000 (15:32 +0100)]
drm/exynos: simplify sleep PM ops
PM ops in exynos_drm_drv were split into two separate function as they were
used also by drm device. Since PM ops have been removed from drm device, the
functions can be merged together.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
projects / linux-beck.git / log