Thierry Reding [Thu, 5 Jun 2014 14:31:10 +0000 (16:31 +0200)]
drm/tegra: sor - Don't hardcode link parameters
The currently hardcoded link parameters don't work on all eDP panels, so
compute the parameters at runtime depending on the mode and panel type
to allow the driver to cope with a wider variety of panels.
Note that the number of bits per pixel of the panel is still hardcoded,
but this can be addressed in a separate patch.
This is largely based on a patch by Stéphane Marchesin but the algorithm
was largely rewritten to be more readable and concise.
The code currently rounds up the clock to the next MHZ, which is
rounding up a 69.5MHz clock to 70MHz on my machine. This in turn
prevents the display from syncing. Removing this rounding fixes eDP
for me.
Removing only the root directory will fail when there are still files in
it. Instead of manually removing all files, remove the whole directory
recursively.
drm/tegra: dp - Implement hotplug detection in work queue
Calling the drm_helper_hpd_irq_event() helper can sleep, so instead of
invoking it directly from the interrupt handler, schedule a work queue
and run it from there.
Thierry Reding [Fri, 20 Dec 2013 12:58:33 +0000 (13:58 +0100)]
drm/tegra: Add hardware cursor support
Enable hardware cursor support on Tegra124. Earlier generations support
the hardware cursor to some degree as well, but not in a way that can be
generically exposed.
drm: Document how to register devices without struct drm_bus
With the recent addition of the drm_set_unique() function, devices can
now be registered without requiring a drm_bus. Add a brief description
to the DRM docbook to show how that can be achieved.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 19 May 2014 11:39:07 +0000 (13:39 +0200)]
drm: Add device registration documentation
Describe how devices are registered using the drm_*_init() functions.
Adding this to docbook requires a largish set of changes to the comments
in drm_{pci,usb,platform}.c since they are doxygen-style rather than
proper kernel-doc and therefore mess with the docbook generation.
While at it, mark usage of drm_put_dev() as discouraged in favour of
calling drm_dev_unregister() and drm_dev_unref() directly.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a helper function that allows drivers to statically set the unique
name of the device. This will allow platform and USB drivers to get rid
of their DRM bus implementations and directly use drm_dev_alloc() and
drm_dev_register().
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 15 Nov 2013 15:07:32 +0000 (16:07 +0100)]
drm/tegra: hdmi - Add Tegra124 support
Tegra124 is mostly backwards-compatible with Tegra114. However, Tegra124
supports a few more features (e.g. interlacing, ...). Introduce a new
compatible string and TMDS tables to cope with these differences.
Thierry Reding [Fri, 14 Mar 2014 13:20:42 +0000 (14:20 +0100)]
drm/tegra: dsi - Do not needlessly recompute pclk
In some cases the pixel clock used to not be correct, which is why it
had to be recomputed. It turns out that the reason why it wasn't correct
is that it was used wrongly. If used correctly there's not need for the
recomputation.
Thierry Reding [Wed, 26 Mar 2014 12:32:21 +0000 (13:32 +0100)]
drm/tegra: dc - Compute shift clock divider in output drivers
The shift clock divider is highly dependent on the type of output, so
push computation of it down into the output drivers. The old code used
to work merely by accident.
Thierry Reding [Fri, 14 Mar 2014 13:25:43 +0000 (14:25 +0100)]
drm/tegra: dsi - Reset controller on driver unload
Assert the DSI controller's reset when the driver is unloaded to reduce
power consumption and to put the controller into a known state for
subsequent driver reloads.
Thierry Reding [Fri, 14 Mar 2014 13:15:10 +0000 (14:15 +0100)]
drm/tegra: dsi - Add enable guard
To prevent the enable or disable operations to potentially be run
multiple times, add guards to return early when the output is already
in the targetted state.
The packet sequencer needs to be programmed depending on the video mode
of the attached peripheral. Add support for non-burst video modes with
sync events (as opposed to sync pulses) and select either sequence
depending on the video mode.
Thierry Reding [Fri, 14 Mar 2014 13:07:50 +0000 (14:07 +0100)]
drm/tegra: dsi - Implement VDD supply support
The DSI controllers are powered by a (typically 1.2V) regulator. Usually
this is always on, so there was no need to support enabling or disabling
it thus far. But in order not to consume any power when DSI is inactive,
give the driver a chance to enable or disable the supply as needed.
Thierry Reding [Fri, 14 Mar 2014 13:02:28 +0000 (14:02 +0100)]
drm/tegra: dsi - Remove unneeded code
A bunch of registers are initialized to 0 upon during driver probe. It
turns out that none of these are actually needed, so they can simply be
dropped.
Thierry Reding [Thu, 13 Mar 2014 07:50:39 +0000 (08:50 +0100)]
drm/tegra: dsi - Use internal pixel format
The pixel format enumeration values used by the Tegra DSI controller
don't match those defined by the DSI framework. Make sure to convert
them to the internal format before writing it to the register.
For some reason when the PW*_ENABLE and PM*_ENABLE fields are cleared
during disable, the HDMI output stops working properly. Resetting and
initializing doesn't help.
Comment out those accesses for now until it has been determined what to
do about them.
Disable LVDS mode according to register documentation. It seems like
this has no effect on the operation of HDMI, but it's probably a good
idea to do this anyway.
Thierry Reding [Fri, 28 Feb 2014 15:57:34 +0000 (16:57 +0100)]
drm/tegra: hdmi - Add connector supply support
Revert commit 18ebc0f404d5 "drm/tegra: hdmi: Enable VDD earlier for
hotplug/DDC" and instead add a new supply for the +5V pin on the HDMI
connector.
The vdd-supply property refers to the regulator that supplies the
AVDD_HDMI input on Tegra, rather than the +5V HDMI connector pin. This
was never a problem before, because all boards had that pin hooked up to
a regulator that was always on. Starting with Dalmore and continuing
with Venice2, the +5V pin is controllable via a GPIO. For reasons
unknown, the GPIO ended up as the controlling GPIO of the AVDD_HDMI
supply in the Dalmore and Venice2 DTS files. But that's not correct.
Instead, a separate supply must be introduced so that the +5V pin can be
controlled separately from the supplies that feed the HDMI block within
Tegra.
A new hdmi-supply property is introduced that takes the place of the
vdd-supply and vdd-supply is only enabled when HDMI is enabled rather
than all the time.
drm/tegra: dc - Do not touch power control register
Setting the bits in this register is dependent on the output type driven
by the display controller. All output drivers already set these properly
so there is no need to do it here again.
Thierry Reding [Fri, 14 Mar 2014 08:54:58 +0000 (09:54 +0100)]
drm/tegra: dc - Reshuffle code to get rid of prototypes
The tegra_dc_format() and tegra_dc_setup_window() functions are only
used internally by the display controller driver. Move them upwards in
order to make them static and get rid of the function prototypes.
Thierry Reding [Fri, 31 Jan 2014 09:02:15 +0000 (10:02 +0100)]
drm/tegra: sor - Add CRC debugfs support
The SOR allows the computation of a 32 bit CRC of the content that it
transmits. This functionality is exposed via debugfs and is useful to
verify proper operation of the SOR.
Thierry Reding [Wed, 29 Jan 2014 19:31:17 +0000 (20:31 +0100)]
drm/tegra: dc - Add YUYV support
YUYV is UYVY with swapped bytes. Luckily the Tegra DC hardware can swap
bytes during scan-out, so supporting YUYV is simply a matter of writing
the correct value to the byteswap register.
This patch modifies tegra_dc_format() to return the byte swap parameter
via an output parameter in addition to returning the pixel format. Many
other formats can potentially be supported in a similar way.
Rob Clark [Tue, 19 Nov 2013 17:10:12 +0000 (12:10 -0500)]
drm: convert crtc and connection_mutex to ww_mutex (v5)
For atomic, it will be quite necessary to not need to care so much
about locking order. And 'state' gives us a convenient place to stash a
ww_ctx for any sort of update that needs to grab multiple crtc locks.
Because we will want to eventually make locking even more fine grained
(giving locks to planes, connectors, etc), split out drm_modeset_lock
and drm_modeset_acquire_ctx to track acquired locks.
Atomic will use this to keep track of which locks have been acquired
in a transaction.
v1: original
v2: remove a few things not needed until atomic, for now
v3: update for v3 of connection_mutex patch..
v4: squash in docbook
v5: doc tweaks/fixes
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 4 Jun 2014 05:47:41 +0000 (15:47 +1000)]
Merge tag 'topic/core-stuff-2014-06-02' of git://anongit.freedesktop.org/drm-intel into drm-next
Just flushing out my pile of random drm patches for the merge window,
nothing big. And it all hung around in drm-intel trees for a while (only
just rebased now).
* tag 'topic/core-stuff-2014-06-02' of git://anongit.freedesktop.org/drm-intel:
imx-drm: imx-tve: remove unused variable
drm: Missed clflushopt in drm_clflush_virt_range
drm/plane: Fix a couple of checkpatch warnings
drm/plane: Fix sparse warnings
drm/exynos: Fix double locks at PM resume
drm/ast: Fix double lock at PM resume
drm/dp-helper: Deprecate old i2c-over-dp_aux heleprs
Dave Airlie [Wed, 4 Jun 2014 03:41:11 +0000 (13:41 +1000)]
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
Summary:
- Resolve probe order and deferred probe issue with component framework
support.
- Resolve hdmi dt broken issue.
. HDMI DT support, which was broken since CCF (common clock framework)
support, and considring legacy dt binding.
- Consolidate HDMI part.
. APB based phy support for Exynos5420 and later, and fixups related
to power on/off sequence.
- Consolidate IPP part.
. Mostly bug fixups and code cleanups.
- Trivial fixups and code cleanups.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (64 commits)
drm/exynos: consider deferred probe case
drm/exynos: remove unnecessary exynos_hdmi.h file
drm/exynos/fimd: allow multiplatform configuration
drm/exynos: add hdmiphy power on/off sequence
drm/exynos: ipp: remove description of non-existing field
drm/exynos: ipp: update comment for struct drm_ipp_buf_info
drm/exynos: ipp: rearrange c_node->event_lock using routine
drm/exynos: ipp: rearrange c_node->mem_lock using routines
drm/exynos: ipp: add ipp_remove_id()
drm/exynos: ipp: add cmd_lock for cmd_list
drm/exynos: ipp: rename cmd_lock to lock
drm/exynos: ipp: remove duplicated setting
drm/exynos: ipp: remove usless list_empty() functions
drm/exynos: Use PTR_ERR_OR_ZERO in exynos_dp_core.c
drm/exynos: remove hardware overlays disable from fimd probe
drm/exynos: Fix checkpatch warning in exynos_dp_reg.c
drm/exynos: add fimd dependency to fimd related encoders
drm/exynos: remove redundant mutex_unlock
drm/exynos/fimc: simplify and rename fimc_dst_get_buf_seq
drm/exynos/fimc: replace mutex by spinlock
...
Dave Airlie [Wed, 4 Jun 2014 03:39:12 +0000 (13:39 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
Pretty small pull this time around for msm. Adds some useful debugfs
I'd been carrying around on a branch for a while, plus few fixes. And
Kconfig update for the great ARCH_MSM -> ARCH_QCOM split.
* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
drm/msm: use correct gfp flag for vram allocation
drm/msm/mdp5: fix error return value
drm/msm: remove redundant private plane cleanup
drm/msm: add perf logging debugfs
drm/msm: add rd logging debugfs
drm/msm: update for ARCH_MSM -> ARCH_QCOM
drm/msm/hdmi: use gpio and HPD polling
drm/msm/mdp5: fix crash in error/unload paths
Daniel Vetter [Tue, 3 Jun 2014 17:30:45 +0000 (19:30 +0200)]
drm: Move plane helpers into drm_kms_helper.ko
The drm core shouldn't depend upon any helpers, and we make sure this
doesn't accidentally happen by moving them into the helper-only
drm_kms_helper.ko module.
v2: Don't break the build for vmwgfx, spotted by Matt.
v3: Unbreak the depency loop around CONFIG_FB (not actually a loop
since it involves select). Reported by Chris.
Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Thu, 29 May 2014 21:54:47 +0000 (23:54 +0200)]
drm: Split connection_mutex out of mode_config.mutex (v3)
After the split-out of crtc locks from the big mode_config.mutex
there's still two major areas it protects:
- Various connector probe states, like connector->status, EDID
properties, probed mode lists and similar information.
- The links from connector->encoder and encoder->crtc and other
modeset-relevant connector state (e.g. properties which control the
panel fitter).
The later is used by modeset operations. But they don't really care
about the former since it's allowed to e.g. enable a disconnected VGA
output or with a mode not in the probed list.
Thus far this hasn't been a problem, but for the atomic modeset
conversion Rob Clark needs to convert all modeset relevant locks into
w/w locks. This is required because the order of acquisition is
determined by how userspace supplies the atomic modeset data. This has
run into troubles in the detect path since the i915 load detect code
needs _both_ protections offered by the mode_config.mutex: It updates
probe state and it needs to change the modeset configuration to enable
the temporary load detect pipe.
The big deal here is that for the probe/detect users of this lock a
plain mutex fits best, but for atomic modesets we really want a w/w
mutex. To fix this lets split out a new connection_mutex lock for the
modeset relevant parts.
For simplicity I've decided to only add one additional lock for all
connector/encoder links and modeset configuration states. We have
piles of different modeset objects in addition to those (like bridges
or panels), so adding per-object locks would be much more effort.
Also, we're guaranteed (at least for now) to do a full modeset if we
need to acquire this lock. Which means that fine-grained locking is
fairly irrelevant compared to the amount of time the full modeset will
take.
I've done a full audit, and there's just a few things that justify
special focus:
- Locking in drm_sysfs.c is almost completely absent. We should
sprinkle mode_config.connection_mutex over this file a bit, but
since it already lacks mode_config.mutex this patch wont make the
situation any worse. This is material for a follow-up patch.
- omap has a omap_framebuffer_flush function which walks the
connector->encoder->crtc links and is called from many contexts.
Some look like they don't acquire mode_config.mutex, so this is
already racy. Again fixing this is material for a separate patch.
- The radeon hot_plug function to retrain DP links looks at
connector->dpms. Currently this happens without any locking, so is
already racy. I think radeon_hotplug_work_func should gain
mutex_lock/unlock calls for the mode_config.connection_mutex.
- Same applies to i915's intel_dp_hot_plug. But again, this is already
racy.
- i915 load_detect code needs to acquire this lock. Which means the
w/w dance due to Rob's work will be nicely contained to _just_ this
function.
I've added fixme comments everywhere where it looks suspicious but in
the sysfs code. After a quick irc discussion with Dave Airlie it
sounds like the lack of locking in there is due to sysfs cleanup fun
at module unload.
v1: original (only compile tested)
v2: missing mutex_init(), etc (from Rob Clark)
v3: i915 needs more care in the conversion:
- Protect the edp pp logic with the connection_mutex.
- Use connection_mutex in the backlight code due to
get_pipe_from_connector.
- Use drm_modeset_lock_all in suspend/resume paths.
- Update lock checks in the overlay code.
Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 30 May 2014 15:34:01 +0000 (11:34 -0400)]
drm: add extended property types
If we continue to use bitmask for type, we will quickly run out of room
to add new types. Split this up so existing part of bitmask range
continues to function as before, but reserve a chunk of the remaining
space for an integer type-id. Wrap this all up in some type-check
helpers to keep the backwards-compat uglyness contained.
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Jani Nikula [Tue, 3 Jun 2014 11:56:19 +0000 (14:56 +0300)]
drm/radeon: replace drm_get_connector_name() with direct name field use
Generated using semantic patch:
@@
expression E;
@@
- drm_get_connector_name(E)
+ E->name
[airlied: regenerated]
Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Mansfield [Wed, 4 Jun 2014 02:12:15 +0000 (12:12 +1000)]
drm/qxl: use surface_id 0 for primary surface on all monitors
spice-server and downstream code expect that the primary surface
will always have surface_id = 0, while in reality, once allocated, the
surface_id in qxl.ko is NEVER 0. In a dual head environment, all
monitors render portions of the primary surface.
However, when the monitor config events are generated and sent,
the primary surface is only mapped to the correct identifier
(i.e. 0) for the primary head (where crtc index is 0).
The fix is to look at the "primary" flag in the bo and always
use id 0, irrespective of which head is being configured.
[airlied: qxl hw really needs to be fixed to scanout surfaces]
Christian König [Tue, 3 Jun 2014 22:13:21 +0000 (18:13 -0400)]
drm/radeon: rework page flip handling v4
Instead of trying to flip inside the vblank period when
the buffer is idle, offload blocking for idle to a kernel
thread and program the flip directly into the hardware.
v2: add error handling, fix EBUSY handling
v3: add proper exclusive_lock handling
v4: update crtc->primary->fb when the flip actually happens
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 3 Jun 2014 00:34:29 +0000 (10:34 +1000)]
Merge branch 'drm-next-3.16' of git://people.freedesktop.org/~agd5f/linux into drm-next
Highlights:
- GPUVM opimtizations
- HDMI audio cleanups
- Deep color HDMI support
- more bug fixes, cleanups
* 'drm-next-3.16' of git://people.freedesktop.org/~agd5f/linux: (29 commits)
drm/edid: Add quirk for Sony PVM-2541A to get 12 bpc hdmi deep color.
drm/edid: Parse and handle HDMI deep color modes.
drm/radeon: Limit hdmi deep color bit depth to 12 bpc.
drm/radeon: Setup HDMI_CONTROL for hdmi deep color gcp's (v2)
drm/radeon: fix pll setup for hdmi deep color (v7)
drm/radeon: use hw cts/n values for deep color
drm/radeon: only apply hdmi bpc pll flags when encoder mode is hdmi
drm/radeon/atom: fix dithering on certain panels
drm/radeon: optimize CIK VM handling v2
drm/radeon: optimize SI VM handling
drm/radeon: add define for flags used in R600+ GTT
drm/radeon: rework page flip handling v3
drm/radeon: separate vblank and pflip crtc handling
drm/radeon: split page flip and pending callback
drm/radeon: remove drm_vblank_get|put from pflip handling
drm/radeon: remove (pre|post)_page_flip callbacks
drm/radeon/dp: fix lane/clock setup for dp 1.2 capable devices
drm/radeon: fix typo in radeon_connector_is_dp12_capable()
radeon: Remove useless quirk for zx1/FireGL X1 combo introduced with fdo #7770
vgaswitcheroo: switch the mux to the igp on power down when runpm is enabled
...
Mario Kleiner [Fri, 23 May 2014 19:40:55 +0000 (21:40 +0200)]
drm/edid: Add quirk for Sony PVM-2541A to get 12 bpc hdmi deep color.
The Sony PVM-2541A OLED high precision color display supports
both 10 bpc and 12 bpc hdmi deep color input, but its edid
does not signal any deep color support.
Add a quirk to force it being treated as a 12 bpc panel.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Kleiner [Thu, 27 Mar 2014 18:59:39 +0000 (19:59 +0100)]
drm/edid: Parse and handle HDMI deep color modes.
Check the HDMI cea block for deep color mode bits. If available,
assign the highest supported bpc for a hdmi display, corresponding
to the given deep color modes.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Kleiner [Mon, 5 May 2014 21:03:18 +0000 (23:03 +0200)]
drm/radeon: Limit hdmi deep color bit depth to 12 bpc.
DCE-4/5/6 can't support more than 12 bpc deep color over hdmi,
so clamp to 12 bpc when a hdmi deep color capable display is
connected. This even makes sense on DCE-8+, which could do up
to 16 bpc, as driving with more than 12 bpc would only waste
video bandwidth as long as we don't support framebuffers with
more than 12 bpc depth.
On pre-DCE4 we clamp hdmi bit depth to 8 bpc, as those asics
don't support hdmi deep color.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 22 Apr 2014 02:09:19 +0000 (22:09 -0400)]
drm/radeon: fix pll setup for hdmi deep color (v7)
Need to adjust the pll up for deep color modes.
Additionally, the atom bpc defines were wrong in certain
cases.
v2: set the adjusted clock to the pll clock for hdmi deep
color. This fixes display and audio issues with deep color
as reported by Andy Furniss <adf.lists@gmail.com>
v3: set crtc_clock as well
v4: setcrtcinfo on the adjusted mode
v5: just use the adjusted clock for setting the pll
v6: only use the adjusted clock for hdmi
v7: only DCE5 and DCE6 and bpc > 8
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 27 May 2014 14:49:22 +0000 (16:49 +0200)]
drm/radeon: rework page flip handling v3
Instead of trying to flip inside the vblank period when
the buffer is idle, offload blocking for idle to a kernel
thread and program the flip directly into the hardware.
Émeric MASCHINO [Fri, 23 May 2014 15:02:24 +0000 (11:02 -0400)]
radeon: Remove useless quirk for zx1/FireGL X1 combo introduced with fdo #7770
Removes useless quirk a7f465f73363fce409870f62173d518b1bc02ae6 introduced with
fdo #7770 as a failed attempt to minimize stability issues with hp zx1 chipset/
ATI FireGL X1 graphics adapter configuration
(see http://marc.info/?l=linux-ia64&m=140077543819871&w=2 for details/reason)
Signed-off-by: Émeric MASCHINO <emeric.maschino@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rafał Miłecki [Fri, 16 May 2014 09:10:29 +0000 (11:10 +0200)]
drm/radeon/hdmi: DCE3: clean ACR control
What initially seemed to be a typo in fglrx (using register 0x740c
instead of 0x74dc) appeared to be a correct behavior. DCE3 has ACR and
CRC registers swapped which explains why we needed
WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000);
This has been tested for possible regressions on DCE3 HD3470 (RV620).
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rafał Miłecki [Fri, 16 May 2014 09:36:24 +0000 (11:36 +0200)]
drm/radeon/hdmi: use separated file for DCE 3.1/3.2 code
DCE 3.1 and 3.2 should be programmed in a different way than DCE 2 and
DCE 3. The order of setting registers and sets of registers are
different.
It's still unsure how we will handle DCE 3.1 vs. DCE 3.2, since they
have few differences as well.
For now separate DCE 2 and DCE 3 path, so we can work on it without a
risk of breaking DCE 3.1+.
This has been tested for possible regressions on DCE32 HD4550 (RV710).
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sat, 10 May 2014 10:17:55 +0000 (12:17 +0200)]
drm/radeon: add large PTE support for NI, SI and CIK v5
This patch implements support for VRAM page table entry compression.
PTE construction is enhanced to identify physically contiguous page
ranges and mark them in the PTE fragment field. L1/L2 TLB support is
enabled for 64KB (SI/CIK) and 256KB (NI) PTE fragments, significantly
improving TLB utilization for VRAM allocations.
Linear store bandwidth is improved from 60GB/s to 125GB/s on Pitcairn.
Unigine Heaven 3.0 sees an average improvement from 24.7 to 27.7 FPS
on default settings at 1920x1200 resolution with vsync disabled.
See main comment in radeon_vm.c for a technical description.
v2 (chk): rebased and simplified.
v3 (chk): add missing hw setup
v4 (chk): rebased on current drm-fixes-3.15
v5 (chk): fix comments and commit text
Signed-off-by: Jay Cornwall <jay@jcornwall.me> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / karo-tx-linux.git / log