Paul Mundt [Fri, 28 Sep 2007 07:04:49 +0000 (16:04 +0900)]
sh: Conditionalize gUSA support.
This conditionalizes gUSA support. gUSA is not supported on
SMP configurations, and it's not necessary there anyways due
to having other atomicity options (ie, movli.l/movco.l).
Anything implementing the LL/SC semantics (all SH-4A CPUs)
can switch to userspace atomicity implementations without
requiring gUSA. This is left default-enabled on all UP so
that glibc doesn't break.
Those that know what they are doing can disable this explicitly.
Paul Mundt [Fri, 28 Sep 2007 06:21:51 +0000 (15:21 +0900)]
sh: Tidy up gUSA preempt handling.
Currently gUSA toggles hardirqs to disable preemption in the signal
handler. Make the preemption toggling explicit, and kill off some
CONFIG_PREEMPT ifdefs in the process.
Stuart Menefy [Fri, 28 Sep 2007 03:36:35 +0000 (12:36 +0900)]
sh: __copy_user() optimizations for small copies.
This implements a fast-path for small (less than 12 bytes) copies,
with the existing path treated as the slow-path and left as the default
behaviour for all other copy sizes.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt [Thu, 27 Sep 2007 09:22:21 +0000 (18:22 +0900)]
sh: Fix URAM start address on SH7785.
Not all of the SH-X2 URAM blocks are mapped in the same place,
SH7785 happens to map it on the opposite end of the address space
from SH7722, correct the addresses.
Paul Mundt [Thu, 27 Sep 2007 09:18:39 +0000 (18:18 +0900)]
sh: Use boot_cpu_data for CPU probe.
This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.
Paul Mundt [Thu, 27 Sep 2007 01:47:00 +0000 (10:47 +0900)]
sh: Disable 4kB pages on extended mode TLB.
4kB pages are unstable on extended mode TLB, it's recommended
that TLB compat mode be used when using a 4kB PAGE_SIZE. Set
the default for extended mode to 8kB.
This should have negligible impact, as other than the extra swap
cache entry bits, there's no reason to use the extended mode TLB
with 4kB pages.
Paul Mundt [Thu, 27 Sep 2007 01:29:58 +0000 (10:29 +0900)]
sh: Disable L2 reporting for present URAM only parts.
The probing logic works for both URAM and L2, with no way to
distinguish between the two. Disable the probing for now and
let the CPU subtypes that have this in a real L2 configuration
explicitly say so.
Paul Mundt [Mon, 24 Sep 2007 07:38:25 +0000 (16:38 +0900)]
sh: Fix alias calculation for non-aliasing cases.
There was an off-by-1 on the cache alias detection logic on SH-4,
which caused n_aliases to always be 1 even when the page size
precluded the existence of aliases.
With this corrected, 64KB pages happily reports n_aliases == 0, and
hits the appropriate fast paths in the flushing routines.
Paul Mundt [Fri, 21 Sep 2007 10:16:05 +0000 (19:16 +0900)]
sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt [Fri, 21 Sep 2007 09:32:32 +0000 (18:32 +0900)]
sh: Bring SMP support back from the dead.
There was a very preliminary bunch of SMP code scattered around for the
SH7604 microcontrollers from way back when, and it has mostly suffered
bitrot since then. With the tree already having been slowly getting
prepped for SMP, this plugs in most of the remaining platform-independent
bits.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt [Fri, 21 Sep 2007 09:05:20 +0000 (18:05 +0900)]
sh: Avoid smp_processor_id() in cache desc paths.
current_cpu_data uses smp_processor_id() in order to find the
corresponding cpu_data. As the cache descs are all currently
identical, just have this look at probed results from the boot
CPU.
Paul Mundt [Fri, 21 Sep 2007 09:01:40 +0000 (18:01 +0900)]
sh: Kill off special boot_cpu_data.
This consolidates the cpu_data definitions and gets rid of the special
boot_cpu_data. It's made a wrapper to the boot CPU, in order to keep
the existing in-tree users happy.
Adrian McMenamin [Fri, 21 Sep 2007 06:55:55 +0000 (15:55 +0900)]
sh: Add maple bus support for the SEGA Dreamcast.
The Maple bus is SEGA's proprietary serial bus for peripherals
(keyboard, mouse, controller etc). The bus is capable of some
(limited) hotplugging and operates at up to 2 M/bits.
Drivers of one sort or another existed/exist for 2.4 and a rudimentary
port, which didn't support the 2.6 device driver model was also in
existence.
This driver - for the bus logic itself and for the keyboard (other
drivers will follow) are based on the code and concepts of those old
drivers but have lots of completely rewritten parts.
I have the maple bus code as a built in now as that seems the sane and
rational way to handle something like that - you either want the bus
or you don't.
Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Markus Brunner [Fri, 21 Sep 2007 06:27:35 +0000 (15:27 +0900)]
sh: Magic Panel MTD mapping update.
This update moves the flash mapping for the Magic Panel into the board
setup. It also removes references to the old MTD mapping option in the
defconfig.
Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt [Fri, 21 Sep 2007 02:55:03 +0000 (11:55 +0900)]
sh: Fix up extended mode TLB for SH-X2+ cores.
The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot,
correspondingly, the PGD also has to be 64-bits, so fix that up.
The kernel and user permission bits really are decoupled in early
cuts of the silicon, which means that we also have to set corresponding
kernel permissions on user pages or we end up with user pages that the
kernel simply can't touch (!).
Finally, with those things corrected, really enable MMUCR.ME and
correct the PTEA value (this simply needs to be the upper 32-bits
of the PTE, with the size and protection bit encoding).
Paul Mundt [Tue, 18 Sep 2007 06:41:39 +0000 (15:41 +0900)]
sh: se7206: Handle non-SuperIO I/O ports.
This fixes up the port calculation logic for non-SuperIO accesses,
before these were always matching the MRSHPC base, now just make
sure the original port is handed back if it's not in the I/O port
range.
Paul Mundt [Thu, 13 Sep 2007 04:01:15 +0000 (13:01 +0900)]
sh: se7206: heartbeat needs 32-bit writes.
Most boards use 8 or 16-bit access for the LED bank, se7206
needs 32. There's only 8 individual LEDs however, each with
a 'special' value in terms of logical ordering. Go FPGA, go!
Markus Brunner [Wed, 12 Sep 2007 02:54:58 +0000 (11:54 +0900)]
sh: Magic Panel R2 board support.
This adds support for the SH7720 (SH3-DSP) based Magic Panel R2
board.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt [Tue, 11 Sep 2007 06:27:29 +0000 (15:27 +0900)]
serial: sh-sci: kgdb console build fixes.
The kgdb console code requires uart_set_options() and friends, which
are only provided by the serial core when console support is enabled.
These were sitting under CONFIG_SH_KGDB and resulted in a link error
when console support wasn't enabled, work that by rolling the console
routines under CONFIG_SH_KGDB_CONSOLE, which they should have been
all along.
HP6xx uses OFFCHIP_IRQ_BASE to know the base irq number where non
cpu interrupts should start. This define was in irq.h before, but
since rework got lost. It really belongs inside hd64461.h since
the hp6xx wont work without it.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Mon, 10 Sep 2007 03:06:44 +0000 (12:06 +0900)]
sh: remove sh7780 interrupt controller hack from pci code
This patch removes the sh778x specific pci code that pokes in the
interrupt controller and overwrites things. The new and improved IRL
code manages this in plat_irq_setup() and plat_irq_setup_pins()
instead.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Mon, 10 Sep 2007 03:06:03 +0000 (12:06 +0900)]
sh: intc - rework higlander irq code for r7780mp and r7785rp
This patch reworks the highlander irq code for r7780mp and r7785rp.
The same strategy as for the new R2D code is used here - the board
specific interrupts are now starting from HL_FPGA_IRQ_BASE. The code
for r7780rp is not touched due to lack of hardware.
Tested with CF, AX88796 on r7780mp and r7785rp. The touch switch
interrupt has also been tested on r7780mp.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Mon, 10 Sep 2007 03:05:10 +0000 (12:05 +0900)]
sh: minor fixes
This patch contains the following fixes:
- Adds sh7785 support to CONFIG_EARLY_SCIF_CONSOLE_PORT.
- Removes duplicate include from rts7751r2d irq code.
- Removes CONFIG_CPU_HAS_INTC from sh7720 Kconfig entry.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Mon, 10 Sep 2007 03:03:50 +0000 (12:03 +0900)]
sh: intc - irl mode update for sh7780 and sh7785
This patch contains the following fixes and improvements:
- Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780.
- Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking.
- Good old IRQ_MODE_IRLnnnn should not register any intc controller.
- plat_irq_setup_pins() now selects IRL or IRQ mode.
- the holding function is now disabled using ICR0.
By default all external pin interrupts are disabled.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Adrian McMenamin [Mon, 10 Sep 2007 03:01:42 +0000 (12:01 +0900)]
fb: pvr2fb: Shared IRQ for dreamcast pvr2.
The maple bus driver (http://lkml.org/lkml/2007/9/4/165) uses hardware
synchronisation between the maple bus and the VBLANK to poll the maple
bus. This patch makes the interrupt shareable.
By definition the interrupt is for both devices.
Signed-off by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Thu, 23 Aug 2007 06:19:40 +0000 (15:19 +0900)]
sh: remove CONFIG_CPU_HAS_INTC_IRQ
All processor specific interrupt code is now converted to make use
of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is
because of that pointless.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt [Thu, 23 Aug 2007 06:11:44 +0000 (15:11 +0900)]
sh: Fix up heartbeat build and resource size.
We were abusing the resource size for the number of bits, this
has been reworked using proper platform data, so this can be
tidied up now. Boards in general only have a 1-byte wide resource,
which the ioremap_nocache() case already handles.
Magnus Damm [Wed, 22 Aug 2007 04:36:23 +0000 (13:36 +0900)]
sh: defconfigs for R2D-PLUS and for R2D-1
This patch removes the old r2d config file named rts7751r2d_defconfig
and adds separate config files for the two r2d board versions. The two
new defconfigs are identical with the exception of board selection:
Paul Mundt [Tue, 21 Aug 2007 03:25:09 +0000 (12:25 +0900)]
sh: Kill off volatile silliness in sq_flush_range().
CC arch/sh/kernel/cpu/sh4/sq.o
arch/sh/kernel/cpu/sh4/sq.c: In function 'sq_flush_range':
arch/sh/kernel/cpu/sh4/sq.c:65: warning: passing argument 1 of 'prefetch' discards qualifiers from pointer target type
This didn't actually need to be volatile in the first place, so just
kill off the qualifier entirely.
Magnus Damm [Thu, 16 Aug 2007 15:53:41 +0000 (00:53 +0900)]
sh: intc - add support for sh7206
This patch converts the cpu specific interrupt setup code for sh7206
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Thu, 16 Aug 2007 15:53:07 +0000 (00:53 +0900)]
sh: intc - add support for sh7619
This patch converts the cpu specific interrupt setup code for sh7619
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
- add intc_set_priority() function prototype to hw_irq.h
- fix off-by-one error in intc_set_priority()
- make sure _INTC_WIDTH() is set for primary priority masking
Big thanks to Markus for finding these problems. Version two fixes
a compile error and an inverted primary check.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Markus Brunner <super.firetwister@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Sun, 12 Aug 2007 06:30:40 +0000 (15:30 +0900)]
sh: replace sh specific CONFIG_VOYAGERGX with CONFIG_MFD_SM501
This patch replaces all instances of CONFIG_VOYAGERGX with
CONFIG_MFD_SM501. While at it we make sure the r2d code compiles
both with and without SM501.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Sun, 12 Aug 2007 06:29:16 +0000 (15:29 +0900)]
sh: intc - convert board specific r2d code
This patch converts the board specific interrupt code for r2d to make
use of intc. While at it we improve the Kconfig to avoid confusion.
- Two sets of interrupt tables exist - one for R2D-1 and one for R2D-PLUS.
- R2D-1 and R2D-PLUS use the same irq constants.
- R2D-1 has AX88796 support, R2D-PLUS does not hook up that IRQ.
- R2D-PLUS has KEY support, R2D-1 does not hook up that IRQ.
- The number and order of IRQ values are disconnected from register bits.
- Interrupt sources now start from IRQ 100.
- The machvec demux function converts from irlm IRQ 0-14 to IRQ 100++.
Tested on R2D-1 and R2D-PLUS boards.
Version 2 adds CONFIG_RTS7751R2D_1 and CONFIG_RTS7751R2D_PLUS together
with intc structured as __initdata.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Sun, 12 Aug 2007 06:26:12 +0000 (15:26 +0900)]
sh: intc - rework core code
This patch reworks the intc core, implementing the following features:
- Support dual priority registers - one set and one clear register
- All 8/16/32 bit register combinations are now supported
- Both single mask and single enable bitmap register are supported
- Add code to set interrupt priority
- Speedup sense and priority configuration code
- Allocate data using bootmem, allows intc data structures to be
__initdata
- Save memory - allocated memory footprint is smaller than intc
structures
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Markus Brunner [Sun, 19 Aug 2007 23:59:33 +0000 (08:59 +0900)]
sh: Add SH7720 CPU support.
This adds support for the SH7720 (SH3-DSP) CPU.
Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Markus Brunner [Sun, 19 Aug 2007 23:58:12 +0000 (08:58 +0900)]
sh: Add gpio.h stubs for PFC definitions.
This adds the PFC definitions for SH-3, as well as consolidating the
gpio.h mess within sh-sci. Stub in sh64, as it's the odd one out
between the sh-sci architectures (sh, sh64, h8300) in this capacity.
Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt [Wed, 8 Aug 2007 06:26:51 +0000 (15:26 +0900)]
sh: x3proto: ILSEL IRQ support.
This adds functionality for the on-board ILSEL IRQs that chain
IRL mode events. Many on-board devices (ethernet, usb, etc.) rely
on ILSEL IRQs directly.
Paul Mundt [Tue, 7 Aug 2007 09:51:19 +0000 (18:51 +0900)]
sh: intc: Fix sense regs oops for IRL IRQs.
IRL doesn't always define sense registers, so don't bother trying to
iterate through the table. This ended up causing an oops on SH-X3
when using IRL mode.
Magnus Damm [Fri, 3 Aug 2007 05:27:20 +0000 (14:27 +0900)]
sh: intc - convert voyagergx code
This patch converts the sh-specific voyagergx interrupt code to make use
of intc. A lot of "interesting" old cruft gets replaced with intc tables
and some simple demux code.
- All interrupt sources in the sm501 data sheet are now in the header.
- The number and order of IRQ values are disconnected from register bits.
- Interrupt sources now start from IRQ 200.
- set_irq_chained_handler() is now used to hook up the demux function.
In the future it would probably make sense to move the interrupt demuxer
into into the mfd driver, but this is probably a nice step in the right
direction until that happens.
Tested on a R2D-1 board using the serial port hooked up to the sm501.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm [Fri, 3 Aug 2007 05:25:32 +0000 (14:25 +0900)]
sh: intc - add single bitmap register support
This patch adds single bitmap register support to intc. The current
code only handles 16 and 32 bit registers where a set bit means
interrupt enabled, but this is easy to extend in the future.
The INTC_IRQ() macro is also added to provide a way to hook in
interrupt controllers for FPGAs in boards or companion chips.
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
projects / linux-beck.git / log