Olof Johansson [Wed, 24 Sep 2014 05:10:18 +0000 (22:10 -0700)]
Merge tag 'mailbox-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Mailbox related changes for omaps to get it to work with
device tree.
* tag 'mailbox-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
mailbox/omap: add support for parsing dt devices
Documentation: dt: add omap mailbox bindings
Olof Johansson [Wed, 24 Sep 2014 05:08:40 +0000 (22:08 -0700)]
Merge tag 'intc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge "omap intc changes for v3.18 merge window" from Tony Lindgren:
Interrupt code related clean-up for omap2 and 3 to make
it ready to move to drivers/irqchip. Note that this series
does not yet move the interrupt code to drivers, that will
be posted separately as a follow-up series.
Note that this branch has a dependency to patches both
in fixes-v3.18-not-urgent and soc-for-v3.18 and is based on
a merge. Without doing the merge, off-idle would not work
properly for git bisect.
* tag 'intc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (325 commits)
arm: omap: intc: switch over to linear irq domain
arm: omap: irq: get rid of ifdef hack
arm: omap: irq: introduce omap_nr_pending
arm: omap: irq: remove nr_irqs argument
arm: omap: irq: remove unnecessary header
arm: omap: irq: drop omap2_intc_handle_irq()
arm: omap: irq: drop omap3_intc_handle_irq()
arm: omap: irq: call set_handle_irq() from .init_irq
arm: omap: irq: move some more code around
arm: boot: dts: omap2/3/am33xx: drop ti,intc-size
arm: omap: irq: drop ti,intc-size support
arm: boot: dts: am33xx/omap3: fix intc compatible flag
arm: omap: irq: use compatible flag to figure out number of IRQ lines
arm: omap: irq: add specific compatibles for omap3 and am33xx devices
arm: omap: irq: drop .handle_irq and .init_irq fields
arm: omap: irq: use IRQCHIP_DECLARE macro
arm: omap: irq: call set_handle_irq() from intc_of_init
arm: omap: irq: make intc_of_init static
arm: omap: irq: reorganize code a little bit
arm: omap: irq: always define omap3 support
...
Olof Johansson [Wed, 24 Sep 2014 04:58:35 +0000 (21:58 -0700)]
Merge tag 'at91-drivers2' of git://github.com/at91linux/linux-at91 into next/drivers
Merge " Second drivers series for AT91/3.18" from Nicolas Ferre:
- move of the PIT (basic timer) from mach-at91 to its proper location:
drivers/clocksource
- big cleanup of this driver along the way
* tag 'at91-drivers2' of git://github.com/at91linux/linux-at91:
ARM: at91: PIT: Move the driver to drivers/clocksource
ARM: at91: Give the PIT irq as an argument of at91sam926x_pit_init
ARM: at91: Convert the boards to the init_time callback
ARM: at91: soc: Add init_time callback
ARM: at91: PIT: (Almost) remove the global variables
ARM: at91: PIT: use request_irq instead of setup_irq
ARM: at91: PIT: Use pr_fmt
ARM: at91: PIT: Use consistent exit path in probe
ARM: at91: dt: Remove init_time definitions
ARM: at91: PIT: Rework probe functions
ARM: at91: PIT: Use of_have_populated_dt instead of CONFIG_OF
ARM: at91: PIT: Use DIV_ROUND_CLOSEST to compute the cycles
ARM: at91: generic.h: Add include safe guards
ARM: at91: PIT: Follow the general coding rules
Felipe Balbi [Tue, 9 Sep 2014 00:54:58 +0000 (17:54 -0700)]
arm: omap: intc: switch over to linear irq domain
now that we don't need to support legacy board-files,
we can completely switch over to a linear irq domain
and make use of irq_alloc_domain_generic_chips() to
allocate all generic irq chips for us.
Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Felipe Balbi [Tue, 9 Sep 2014 00:54:57 +0000 (17:54 -0700)]
arm: omap: irq: get rid of ifdef hack
we don't need the ifdef if we have omap_nr_pending
telling us how many pending registers we have
on current platform. This solves a possible
problem where we could try to handle bogus
interrupts on OMAP2 and OMAP3 if using single
zImage kernel, because we would end up reading
the following pending FIQ register.
Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Felipe Balbi [Tue, 9 Sep 2014 00:54:51 +0000 (17:54 -0700)]
arm: omap: irq: move some more code around
We want .init_irq to call set_irq_handle() for
legacy platforms. Note that this code will also
be dropped once omap2/3 devices are completely
moved to DT.
Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Felipe Balbi [Tue, 9 Sep 2014 00:54:32 +0000 (17:54 -0700)]
arm: omap: irq: start to remove irq_banks array
We have a single bank in that array, this patch
is in preparation to remove that array. It just
shifts everything to a new set of functions
for register IO while also removing old ones.
Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
of_device_ids (i.e. compatible strings and the respective data) are not
supposed to change at runtime. All functions working with of_device_ids
provided by <linux/of.h> work with const of_device_ids. So mark the
non-const function parameters and structs for OMAP2+ as const, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Wed, 10 Sep 2014 19:20:59 +0000 (14:20 -0500)]
mailbox/omap: add support for parsing dt devices
Logic has been added to the OMAP2+ mailbox code to parse the
mailbox dt nodes and construct the different sub-mailboxes
associated with the instance. The DT representation of the
sub-mailbox devices is different from legacy platform data
representation to allow flexibility of interrupt configuration
between Tx and Rx fifos (to also possibly allow simplex devices
in the future). The DT representation gathers similar information
that was being passed previously through the platform data, except
for the interrupt type information, which is gathered through driver
compatible match data.
The non-DT support has to be maintained for now to not break
OMAP3 legacy boot, and the legacy-style code will be cleaned
up once OMAP3 is also converted to DT-boot only.
Cc: Jassi Brar <jassisinghbrar@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Wed, 10 Sep 2014 19:20:58 +0000 (14:20 -0500)]
Documentation: dt: add omap mailbox bindings
Add the device tree bindings document for OMAP2+ mailbox.
Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Merge tag 'socfpga_driver_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next into next/drivers
Pull "SOCFPGA driver update for v3.18" from Dinh Nguyen:
This is the EDAC driver for EDAC. Boris had given me permission to
take this patch together with it's DTS component. The DTS portion was in the
previous pull request.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'socfpga_driver_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next:
edac: altera: Add Altera SDRAM EDAC support
Mark Brown [Sat, 6 Sep 2014 10:14:16 +0000 (11:14 +0100)]
ARM: omap: Remove stray ARCH_HAS_OPP references
OPP is now a normal kernel library selected by its users rather than a
feature that architectures need to enable so ARCH_HAS_OPP serves no
function any more - remove the selects.
Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization
With consolidated code, now we can add the required hooks for
OMAP5 to enable power management.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor rebase updates] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
Rajendra Nayak [Mon, 27 May 2013 10:16:44 +0000 (15:46 +0530)]
ARM: OMAP5 / DRA7: Enable CPU RET on suspend
On OMAP5 / DRA7, prevent a CPU powerdomain OFF and resulting MPU OSWR
and instead attempt a CPU RET and side effect, MPU RET in suspend.
NOTE: the hardware was originally designed to be capable of achieving
deep power states such as OFF and OSWR, however due to various issues
and risks, deepest valid state was determined to be CSWR - hence we use
the errata framework to handle this case.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[nm@ti.com: updates] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug
Dont assume that all OMAP4+ code will be able to use OMAP4 hotplug
logic. On OMAP5, DRA7, we do not need this in place yet, also,
currently the CPU startup pointer is located in omap4_cpu_pm_info
instead of cpu_pm_ops.
So, isolate the function to hotplug_restart pointer in cpu_pm_ops
where it should have belonged, initalize them as per valid startup
pointers for OMAP4430/60 as in current logic, however provide
dummy_cpu_resume to be the startup location as well.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: split this out of original code and isolate it] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
Rajendra Nayak [Fri, 3 May 2013 10:04:40 +0000 (15:34 +0530)]
ARM: OMAP5 / DRA7: PM: Avoid all SAR saves
Get rid of all assumptions about always having a sar base on *all*
OMAP4+ platforms. We dont need one on DRA7 and it is not necessary at
this point for OMAP5 either.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[nm@ti.com: Split and optimize] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
In addition to the standard power-management technique, the OMAP5 / DRA7
MPU subsystem also employs an SR3-APG (mercury) power management
technology to reduce leakage.
It allows for full logic and memories retention on MPU_C0 and MPU_C1 and
is controlled by the PRCM_MPU. Only "Fast-mode" is supported on the
OMAP5 and DRA7 family of processors.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor consolidation] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
Enables MPUSS ES2 power management mode using ES2_PM_MODE in
AMBA_IF_MODE register.
0x0: OMAP5 ES1 behavior, CPU cores would enter and exit OFF mode together.
Broken! Fortunately, we do not support this anymore.
0x1: OMAP5 ES2, DRA7 behavior, CPU cores are allowed to enter/exit OFF mode
independently.
This is one time settings thanks to always ON domain.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor conflict resolutions, consolidation for DRA7] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency
With EMIF clock-domain put under hardware supervised control, memory
corruption and untraceable crashes are observed on OMAP5. Further
investigation revealed that there is a weakness in the PRCM on this
specific dynamic depedency.
The recommendation is to set MPUSS static dependency towards EMIF
clock-domain to avoid issues. This recommendation holds good for DRA7
family of devices as well.
ARM: OMAP5 / DRA7: PM: Update CPU context register offset
On OMAP5, RM_CPUi_CPUi_CONTEXT offset has changed. Update the code
so that same code works for OMAP4+ devices. DRA7 and OMAP5 have the same
context offset as well.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[rnayak@ti.com: for DRA7] Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[nm@ti.com: rebase, split/merge etc..] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
Nishanth Menon [Fri, 6 Jun 2014 06:17:37 +0000 (01:17 -0500)]
ARM: OMAP4+: PM: use only valid low power state for suspend
We are using power domain state as RET and logic state as OFF. This
state is OSWR. This may not always be supported on ALL power domains. In
fact, on certain power domains, this might result in a hang on certain
platforms. Instead, depend on powerdomain data to provide accurate
information about the supported powerdomain states and use the
appropriate function to query and use it as part of suspend path.
Nishanth Menon [Fri, 6 Jun 2014 02:40:39 +0000 (21:40 -0500)]
ARM: OMAP4+: PM: Make logic state programmable
Move the logic state as different for each power domain. This allows us
to customize the deepest power state we should target over all for each
powerdomain in the follow on patches.
Nishanth Menon [Fri, 6 Jun 2014 06:04:20 +0000 (01:04 -0500)]
ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain
powerdomain configuration in OMAP is done using PWRSTCTRL register for
each power domain. However, PRCM lets us write any value we'd like to
the logic and power domain target states, however the SoC integration
tends to actually function only at a few discrete states. These valid
states are already in our powerdomains_xxx_data.c file.
So, provide a function to easily query valid low power state that the
power domain is allowed to go to.
Based on work originally done by Jean Pihet <j-pihet@ti.com>
https://patchwork.kernel.org/patch/1325091/ . There is no attempt to
create a new powerdomain solution here, except fixing issues seen
attempting invalid programming attempts. Future consolidation to the
generic powerdomain framework should consider this requirement as
well.
Similar solutions have been done in product kernels in the past such
as:
https://android.googlesource.com/kernel/omap.git/+blame/android-omap-panda-3.0/arch/arm/mach-omap2/pm44xx.c
Nishanth Menon [Tue, 12 Aug 2014 12:05:19 +0000 (07:05 -0500)]
ARM: OMAP3+: PRM: register interrupt information from DT
Allow the PRM interrupt information to be picked up from device tree.
OMAP3 may use legacy boot and needs to be compatible with old dtbs
(without interrupt populated), for these, we use the value which is
pre-populated.
Nishanth Menon [Thu, 22 May 2014 20:19:29 +0000 (15:19 -0500)]
ARM: OMAP4+: PRM: register interrupt information from DT
Allow the PRM interrupt information to be picked up from device tree.
the only exception is for OMAP4 which uses values pre-populated and allows
compatibility with older dtb.
Nishanth Menon [Thu, 22 May 2014 19:53:54 +0000 (14:53 -0500)]
ARM: OMAP4+: prminst: provide function to find prm_dev instance offset
PRM device instance can vary depending on SoC. We already handle the
same during reset of the device, However, this is also needed
for other logic instances. So, first abstract this out to a generic
function.
Merge tag 'at91-drivers' of git://github.com/at91linux/linux-at91 into next/drivers
Merge "First batch of AT91 drivers for 3.18" from Nicolas Ferre:
- reset, poweroff and ram drivers are moved to their proper
location instead of being in mach-at91 directory. They now use
the appropriate frameworks.
- big amount of removal of these machine specific drivers and use
of the newly created drivers. This lead to an overhaul of the setup.c AT91
startup code.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'at91-drivers' of git://github.com/at91linux/linux-at91: (31 commits)
power: reset: at91-poweroff: fix wakeup status register index
ARM: at91/power/reset: fix Kconfig "depends on" directive
ARM: at91: fix ramc standby function registration
ARM: at91: Remove rstc and shdwc headers
ARM: at91: Remove rstc and shdwnc global base addresses
ARM: at91/pm: Remove show_reset_status function
ARM: at91: Remove poweroff code
ARM: at91: Register the poweroff driver
ARM: at91: Remove poweroff DT probing
ARM: at91: Remove reset code from the machine code
ARM: at91: Call at91_register_devices in the board files
ARM: at91: Probe the reset driver
ARM: at91/soc: Introduce register_devices callback
ARM: at91: Remove the old-style reset probing
ARM: at91: Rework ramc mapping code
ARM: at91: setup: Switch to pr_fmt
ARM: at91: remove old irq material
ARM: at91: make use of the new AIC driver for dt enabled boards
ARM: at91: enclose at91_aic_xx calls in IS_ENABLED(CONFIG_OLD_IRQ_AT91) blocks
ARM: at91: introduce OLD_IRQ_AT91 Kconfig option
...
This patch adds support for the CycloneV and ArriaV SDRAM controllers.
Correction and reporting of SBEs, Panic on DBEs.
There was a discussion thread on whether this driver should be an mfd driver
or just make use of syscon, which is already a mfd. Ultimately, the
decision to use a simple syscon interface was reached.[1]
[1] https://lkml.org/lkml/2014/7/30/514
[dinguyen] Fixed Kconfig to have EDAC_ALTERA_MC as a tristate to prevent a
build failure for allmodconfig.
ARM: dts: am335x-bone*: Fix model name and update compatibility information
Beaglebone white and beaglebone black differ in tiny little aspects.
This is the reason why we maintain seperate dts for these platforms.
However, there is no real way to decode from dtb which platform it is
since compatible and model name are the same for both platforms.
Fix this so that beaglebone black and beaglebone are identifiable,
while maintaining compatibility for older zImages which might use old
beaglebone compatible flag for black as well.
Reported-by: Tom Rini <trini@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Nishanth Menon [Thu, 28 Aug 2014 20:45:03 +0000 (15:45 -0500)]
ARM: dts: omap4-panda: Fix model and SoC family details
Currently we claim that omap4-panda and omap4-panda-es are essentially
the same, but they are not since PandaBoard-ES uses OMAP4460 and
PandaBoard uses OMAP4430.
So, split the common definition and make the model name available.
Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:25 +0000 (11:33 +0200)]
ARM: at91: Convert the boards to the init_time callback
Now that we have the init_time callback in the at91_init_soc structure, convert
all the boards and SoC to this.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 2 Sep 2014 16:05:04 +0000 (18:05 +0200)]
ARM: at91: soc: Add init_time callback
Introduce an init_time callback to the at91_init_soc structure to be able to
tweak the init_time machine callback on a per-soc basis, instead of having to
rely on a global one.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Conflicts:
arch/arm/mach-at91/setup.c
Maxime Ripard [Tue, 1 Jul 2014 09:33:23 +0000 (11:33 +0200)]
ARM: at91: PIT: (Almost) remove the global variables
The timer driver is using some global variables to define some variables it has
to use in most of its functions, like the base address.
Use some container_of calls to have a single dynamic (and local) variable to
hold this content.
The only exception is in the !DT case, where the call chain to
at91sam926x_ioremap_pit and then at91sam926x_pit_init as init_time makes it
hard for the moment to pass the physical address of the timer.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:22 +0000 (11:33 +0200)]
ARM: at91: PIT: use request_irq instead of setup_irq
We can use the generic request_irq now to register a timer interrupt handler,
instead of the more complex setup_irq.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:21 +0000 (11:33 +0200)]
ARM: at91: PIT: Use pr_fmt
All the panic messages hardcode the same prefix. Define the pr_fmt macro to
unify its definition.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:20 +0000 (11:33 +0200)]
ARM: at91: PIT: Use consistent exit path in probe
The current probe code is, whenever it fails to retrieve a resource, either
panicing, silently returning, or returning and displaying an error.
Make the code consistent by always panicing whenever it fails to grab any
resource.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:18 +0000 (11:33 +0200)]
ARM: at91: PIT: Rework probe functions
The PIT timer driver until now had a single probe function, disregarding wether
it was probed through DT or in the old-style way. This code later on was
calling some DT function to retrieve the proper values for its base address,
interrupts and clocks.
While this was working, it was preventing the usage of CLOCKSOURCE_OF_DECLARE,
and the two different probe path were not as clearly separated as they could
be.
Rework the probe path to take this into account, and switch to
CLOCKSOURCE_OF_DECLARE.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:17 +0000 (11:33 +0200)]
ARM: at91: PIT: Use of_have_populated_dt instead of CONFIG_OF
Until now, the machines, even when CONFIG_OF was enabled, were calling
at91sam926x_ioremap_pit to try to map the PIT address using the defined
physical address.
Obviously, with DT, it's not appropriate anymore, and some code was added to
the function to deal with this case.
Unfortunately, this code was conditionned on CONFIG_OF, which can be enabled,
even though no DT was actually used, which would result in such a case, to this
code being executed, without any reason.
Moreover, the logic that was here before to bail out of the function just check
in the DT to see if the PIT node is there, which is the case in all our DTSI.
All this can be made much more straightforward just by using
of_have_populated_dt to bail out.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:16 +0000 (11:33 +0200)]
ARM: at91: PIT: Use DIV_ROUND_CLOSEST to compute the cycles
Until now, the pit_cycle computation was dividing the rate by HZ, rounding to
the closest integer, but without using the appropriate macro.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:15 +0000 (11:33 +0200)]
ARM: at91: generic.h: Add include safe guards
The generic.h header file doesn't have any safe guards against multiple
inclusion. It only worked so far because all the symbols defined in it were
extern, but this is a rather fragile assumption.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Maxime Ripard [Tue, 1 Jul 2014 09:33:14 +0000 (11:33 +0200)]
ARM: at91: PIT: Follow the general coding rules
Replace all masks and bits definitions by matching calls to BIT and GENMASK.
While we're at it, also fix a few style issues.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
After the for_each_matching_node loop, we end up with a null value for np. Then,
of_match_node() is not matching anything and we can't register the standby
function and "ramc no standby function available" is printed.
Fix that by selecting the first available standby function. For now,
at91_pm_set_standby doesn't support multiple different standby functions and no
existing SoCs have different RAM controllers.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Merge tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linux
Pull Xtensa updates from Chris Zankel:
"Xtensa improvements for 3.17:
- support highmem on cores with aliasing data cache. Enable highmem
on kc705 by default
- simplify addition of new core variants (no need to modify Kconfig /
Makefiles)
- improve robustness of unaligned access handler and its interaction
with window overflow/underflow exception handlers
- deprecate atomic and spill registers syscalls
- clean up Kconfig: remove orphan MATH_EMULATION, sort 'select'
statements
- wire up renameat2 syscall.
Various fixes:
- fix address checks in dma_{alloc,free}_coherent (runtime BUG)
- fix access to THREAD_RA/THREAD_SP/THREAD_DS (debug build breakage)
- fix TLBTEMP_BASE_2 region handling in fast_second_level_miss
(runtime unrecoverable exception)
- fix a6 and a7 handling in fast_syscall_xtensa (runtime userspace
register clobbering)
- fix kernel/user jump out of fast_unaligned (potential runtime
unrecoverabl exception)
- replace termios IOCTL code definitions with constants (userspace
build breakage)"
* tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linux: (25 commits)
xtensa: deprecate fast_xtensa and fast_spill_registers syscalls
xtensa: don't allow overflow/underflow on unaligned stack
xtensa: fix a6 and a7 handling in fast_syscall_xtensa
xtensa: allow single-stepping through unaligned load/store
xtensa: move invalid unaligned instruction handler closer to its users
xtensa: make fast_unaligned store restartable
xtensa: add double exception fixup handler for fast_unaligned
xtensa: fix kernel/user jump out of fast_unaligned
xtensa: configure kc705 for highmem
xtensa: support highmem in aliasing cache flushing code
xtensa: support aliasing cache in kmap
xtensa: support aliasing cache in k[un]map_atomic
xtensa: implement clear_user_highpage and copy_user_highpage
xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_miss
xtensa: allow fixmap and kmap span more than one page table
xtensa: make fixmap region addressing grow with index
xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DS
xtensa: add renameat2 syscall
xtensa: fix address checks in dma_{alloc,free}_coherent
xtensa: replace IOCTL code definitions with constants
...
Guenter Roeck [Sun, 31 Aug 2014 18:14:26 +0000 (11:14 -0700)]
unicore32: Fix build error
unicore32 builds fail with
arch/unicore32/kernel/signal.c: In function ‘setup_frame’:
arch/unicore32/kernel/signal.c:257: error: ‘usig’ undeclared (first use in this function)
arch/unicore32/kernel/signal.c:279: error: ‘usig’ undeclared (first use in this function)
arch/unicore32/kernel/signal.c: In function ‘handle_signal’:
arch/unicore32/kernel/signal.c:306: warning: unused variable ‘tsk’
arch/unicore32/kernel/signal.c: In function ‘do_signal’:
arch/unicore32/kernel/signal.c:376: error: implicit declaration of function ‘get_signsl’
make[1]: *** [arch/unicore32/kernel/signal.o] Error 1
make: *** [arch/unicore32/kernel/signal.o] Error 2
Bisect points to commit 649671c90eaf ("unicore32: Use get_signal()
signal_setup_done()").
This code never even compiled. Reverting the patch does not work, since
previously used functions no longer exist, so try to fix it up. Compile
tested only.
Fixes: 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()") Cc: Richard Weinberger <richard@nod.at> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"Various assorted fixes:
- a couple of patches from Mark Rutland to resolve an errata with
Cortex-A15 CPUs.
- fix cpuidle for the CPU part ID changes in the last merge window
- add support for a relocation which ARM binutils is generating in
some circumstances"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part number
ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex
ARM: 8128/1: abort: don't clear the exclusive monitors
ARM: 8127/1: module: add support for R_ARM_TARGET1 relocations
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Here's the weekly batch of fixes from arm-soc.
The delta is a largeish negative delta, due to revert of SMP support
for Broadcom's STB SoC -- it was accidentally merged before some
issues had been addressed, so they will make a new attempt for 3.18.
I didn't see a need for a full revert of the whole platform due to
this, we're keeping the rest enabled.
The rest is mostly:
- a handful of DT fixes for i.MX (Hummingboard/Cubox-i in particular)
- some MTD/NAND fixes for OMAP
- minor DT fixes for shmobile
- warning fix for UP builds on vexpress/spc
There's also a couple of patches that wires up hwmod on TI's DRA7 SoC
so it can boot. Drivers and the rest had landed for 3.17, and it's
small and isolated so it made sense to pick up now even if it's not a
bugfix"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
vexpress/spc: fix a build warning on array bounds
ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists
ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants
MAINTAINERS: catch special Rockchip code locations
ARM: dts: microsom-ar8035: MDIO pad must be set open drain
ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates
ARM: brcmstb: revert SMP support
ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled
ARM: dts: Enable UART wake-up events for beagleboard
ARM: dts: Remove twl6030 clk32g "regulator"
ARM: OMAP2+: omap_device: remove warning that clk alias already exists
ARM: OMAP: fix %d confusingly prefixed with 0x in format string
ARM: dts: DRA7: fix interrupt-cells for GPIO
mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc()
ARM: dts: omap3430-sdp: Revert to using software ECC for NAND
ARM: OMAP2+: GPMC: Support Software ECC scheme via DT
mtd: nand: omap: Revert to using software ECC by default
ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptive
ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configuration
ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR
...
Alex Shi [Wed, 16 Jul 2014 11:21:56 +0000 (19:21 +0800)]
vexpress/spc: fix a build warning on array bounds
With ARCH_VEXPRESS_SPC option, kernel build has the following
warning:
arch/arm/mach-vexpress/spc.c: In function ‘ve_spc_clk_init’:
arch/arm/mach-vexpress/spc.c:431:38: warning: array subscript is below array bounds [-Warray-bounds]
struct ve_spc_opp *opps = info->opps[cluster];
^
since 'cluster' maybe '-1' in UP system. This patch does a active
checking to fix this issue.
Signed-off-by: Alex Shi <alex.shi@linaro.org> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* tag 'for-v3.17-rc/omap-dra72x-d74x-support-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists
ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants
Linus Torvalds [Sun, 31 Aug 2014 17:09:07 +0000 (10:09 -0700)]
Merge tag 'spi-v3.17-rc3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi bugfixes from Mark Brown:
"A smattering of bug fixes for the SPI subsystem, all in driver code
which has seen active work recently and none of them with any great
global impact.
There's also a new ACPI ID for the pxa2xx driver which required no
code changes and the addition of kerneldoc for some structure fields
that were missing it and generating warnings during documentation
builds as a result"
* tag 'spi-v3.17-rc3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: sh-msiof: Fix transmit-only DMA transfers
spi/rockchip: Avoid accidentally turning off the clock
spi: dw: fix kernel crash due to NULL pointer dereference
spi: dw-pci: fix bug when regs left uninitialized
spi: davinci: fix SPI_NO_CS functionality
spi/rockchip: fixup incorrect dma direction setting
spi/pxa2xx: Add ACPI ID for Intel Braswell
spi: spi-au1550: fix build failure
spi: rspi: Fix leaking of unused DMA descriptors
spi: sh-msiof: Fix leaking of unused DMA descriptors
spi: Add missing kerneldoc bits
spi/omap-mcspi: Fix the spi task hangs waiting dma_rx
Mark Brown [Sun, 31 Aug 2014 12:46:19 +0000 (13:46 +0100)]
Merge tag 'spi-v3.17-rc3' into spi-linus
spi: Bug fixes for v3.17
A smattering of bug fixes for the SPI subsystem, all in driver code
which has seen active work recently and none of them with any great
global impact.
There's also a new ACPI ID for the pxa2xx driver which required no code
changes and the addition of kerneldoc for some structure fields that
were missing it and generating warnings during documentation builds as a
result.
# gpg: Signature made Sun 31 Aug 2014 13:19:12 BST using RSA key ID 7EA229BD
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg: aka "Mark Brown <broonie@debian.org>"
# gpg: aka "Mark Brown <broonie@kernel.org>"
# gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg: aka "Mark Brown <broonie@linaro.org>"
# gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
Linus Torvalds [Sun, 31 Aug 2014 04:04:37 +0000 (21:04 -0700)]
Merge tag 'locks-v3.17-3' of git://git.samba.org/jlayton/linux
Pull file locking bugfx from Jeff Layton:
"Just a bugfix for a bug that crept in to v3.15. It's in a rather rare
error path, and I'm not aware of anyone having hit it, but it's worth
fixing for v3.17"
* tag 'locks-v3.17-3' of git://git.samba.org/jlayton/linux:
locks: pass correct "before" pointer to locks_unlink_lock in generic_add_lease
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