]> git.karo-electronics.de Git - karo-tx-linux.git/log
karo-tx-linux.git
11 years agoENGR00173845 MX6Q SABRESD camera: add camera power down function
Yuxi Sun [Mon, 6 Feb 2012 05:45:05 +0000 (13:45 +0800)]
ENGR00173845 MX6Q SABRESD camera: add camera power down function

Add camera power down function and change default camera to ov5642
for parallel interface camera

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00174038 [mx6 mmc]fix build err
Tony Lin [Wed, 8 Feb 2012 07:42:24 +0000 (15:42 +0800)]
ENGR00174038 [mx6 mmc]fix build err

fix build error:
incompatible pointer type

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00174031 [MX6Q] Support AR6003 SDIO wifi on kernel v3.0
Ryan QIAN [Wed, 8 Feb 2012 07:15:55 +0000 (15:15 +0800)]
ENGR00174031 [MX6Q] Support AR6003 SDIO wifi on kernel v3.0

- add macros and struct used in new ath6kl.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoAdd ath6kl cleaned up driver
Kalle Valo [Sun, 17 Jul 2011 21:22:30 +0000 (00:22 +0300)]
Add ath6kl cleaned up driver

Last May we started working on cleaning up ath6kl driver which is
currently in staging. The work has happened in a separate
ath6kl-cleanup tree:

http://git.kernel.org/?p=linux/kernel/git/kvalo/ath6kl-cleanup.git;a=summary

After over 1100 (!) patches we have now reached a state where I would
like to start discussing about pushing the driver to the wireless
trees and replacing the staging driver.

The driver is now a lot smaller and looks like a proper Linux driver.
The size of the driver (measured with simple wc -l) dropped from 49
kLOC to 18 kLOC and the number of the .c and .h files dropped from 107
to 22. Most importantly the number of subdirectories reduced from 26
to zero :)

There are two remaining checkpatch warnings in the driver which we
decided to omit for now:

drivers/net/wireless/ath/ath6kl/debug.c:31:
  WARNING: printk() should include KERN_ facility level
drivers/net/wireless/ath/ath6kl/sdio.c:527:
  WARNING: msleep < 20ms can sleep for up to 20ms;
  see Documentation/timers/timers-howto.txt

The driver has endian annotations for all the hardware specific
structures and there are no sparse errors. Unfortunately I don't have
any big endian hardware to test that right now.

We have been testing the driver both on x86 and arm platforms. The
code is also compiled with sparc and parisc cross compilers.

Notable missing features compared to the current staging driver are:

o HCI over SDIO support
o nl80211 testmode
o firmware logging
o suspend support

Testmode, firmware logging and suspend support will be added soon. HCI
over SDIO support will be more difficult as the HCI driver needs to
share code with the wifi driver. This is something we need to research
more.

Also I want to point out the changes I did for signed endian support.
As I wasn't able to find any support for signed endian annotations I
decided to follow what NTFS has done and added my own. Grep for sle16
and sle32, especially from wmi.h.

Various people have been working on the cleanup, the hall of
fame based on number of patches is:

   543  Vasanthakumar Thiagarajan
   403  Raja Mani
   252  Kalle Valo
    16  Vivek Natarajan
    12  Suraj Sumangala
     3  Joe Perches
     2  Jouni Malinen

Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com>
Signed-off-by: Raja Mani <rmani@qca.qualcomm.com>
Signed-off-by: Vivek Natarajan <nataraja@qca.qualcomm.com>
Signed-off-by: Suraj Sumangala <surajs@qca.qualcomm.com>
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jouni Malinen <jouni@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
11 years agoENGR00171642 [MX6Q_Lite]Power:suspend and resume stress test failed
Tony Lin [Wed, 8 Feb 2012 06:03:11 +0000 (14:03 +0800)]
ENGR00171642 [MX6Q_Lite]Power:suspend and resume stress test failed

add bus suspend/resume function to prevent SDMMC suspend/resume stess test fail

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00173947-2 MX6Q/ARCH : enable the BBT support to ARM2
Huang Shijie [Tue, 7 Feb 2012 08:38:32 +0000 (16:38 +0800)]
ENGR00173947-2 MX6Q/ARCH : enable the BBT support to ARM2

enable the BBT support to ARM2 board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173947-1 mtd/gpmi : add BBT support to gpmi nand driver
Huang Shijie [Mon, 30 Jan 2012 03:34:03 +0000 (11:34 +0800)]
ENGR00173947-1 mtd/gpmi : add BBT support to gpmi nand driver

Add a new field to gpmi_nand_platform_data{}.
Make the BBT support to board specific.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00172274-02 - IEEE-1588: rework ts_clk in MX6 ARIK CPU board.
Fugang Duan [Wed, 8 Feb 2012 03:39:25 +0000 (11:39 +0800)]
ENGR00172274-02 - IEEE-1588: rework ts_clk in MX6 ARIK CPU board.

Default use RMII 50MHz clock for ts_clk.
Test result:
Enet work fine at 100/1000Mbps in TO1.1 and Rigel.
IEEE 1588 timestamp is convergent for 25M & 50M & 100MHz
timestamp clock.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00172274-01 - [MX6]: rework IEEE-1588 ts_clk in MX6Q ARIK CPU board.
Fugang Duan [Wed, 8 Feb 2012 03:26:58 +0000 (11:26 +0800)]
ENGR00172274-01 - [MX6]: rework IEEE-1588 ts_clk in MX6Q ARIK CPU board.

- Fix GPIO_16 IOMUX config.
- Config GPIO_16 pad to ENET_ANATOP_ETHERNET_REF_OUT.
- IEEE-1588 ts_clk, S/PDIF in and i2c3 are mutually exclusive,
  because all of them use GPIO_16, so it only for one function
  work at a moment.
- Test result:
    Enet work fine at 100/1000Mbps in TO1.1.
IEEE 1588 timestamp is convergent.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00174021 MX6Q/ARCH : fix the section mismatch
Huang Shijie [Wed, 8 Feb 2012 03:19:07 +0000 (11:19 +0800)]
ENGR00174021 MX6Q/ARCH : fix the section mismatch

add __init to the gpmi_nand_platform_init() to make this
function store in the init.text section.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173926 Support eMMC ddr mode
Ryan QIAN [Wed, 8 Feb 2012 00:34:03 +0000 (08:34 +0800)]
ENGR00173926 Support eMMC ddr mode

- support 4bit/8bit ddr mode
- change cpu_is_mx6q() || cpu_is_mx6dl() to cpu_is_mx6()

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00174018 MX6Q/perfmon : fix the compiling error
Huang Shijie [Wed, 8 Feb 2012 02:16:06 +0000 (10:16 +0800)]
ENGR00174018 MX6Q/perfmon : fix the compiling error

reduce one parameter to fix the built error.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173869-9: i.mx6dl: add the misc drivers support
Jason Liu [Tue, 7 Feb 2012 06:30:42 +0000 (14:30 +0800)]
ENGR00173869-9: i.mx6dl: add the misc drivers support

This patch change is very trivial and simply just add
cpu_is_mx6dl() or using cpu_is_mx6 to replace cpu_is_mx6q

each driver owner will check it and adjust it accordingly later,
such as sdhc etc.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-8: i.mx6: ARM2: add i.mx6dl support
Jason Liu [Tue, 7 Feb 2012 06:26:23 +0000 (14:26 +0800)]
ENGR00173869-8: i.mx6: ARM2: add i.mx6dl support

i.mx6dl and i.mx6q share the same ARM2 board due to the pin-pin
compatible between them.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-7: i.mx6: sdma: add i.mx6dl support
Jason Liu [Tue, 7 Feb 2012 06:13:50 +0000 (14:13 +0800)]
ENGR00173869-7: i.mx6: sdma: add i.mx6dl support

add i.mx6dl support for sdma

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-6: i.mx6: gpio: add the i.mx6dl support
Jason Liu [Tue, 7 Feb 2012 06:12:25 +0000 (14:12 +0800)]
ENGR00173869-6: i.mx6: gpio: add the i.mx6dl support

add the i.mx6dl support for gpio

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-5: i.mx6: don't turn off MMDC clock on i.mx6dl
Jason Liu [Tue, 7 Feb 2012 06:09:59 +0000 (14:09 +0800)]
ENGR00173869-5: i.mx6: don't turn off MMDC clock on i.mx6dl

MMDC clock is from pll2_pfd_400M, thus we can't turn it off

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-4: i.mx6: add the i.mx6dl iomux support
Jason Liu [Tue, 7 Feb 2012 06:06:24 +0000 (14:06 +0800)]
ENGR00173869-4: i.mx6: add the i.mx6dl iomux support

externally, i.mx6dl is pin-pin compatible with i.mx6dq
internally, i.mx6dl is totally different with iomux setting

Checkpatch will throw some warnings in iomux-mx6dl.h file as:
WARNING: line over 80 characters

But for the readable, I intend not to fix these warnings, and linux
upstream also has so many such kind of cases

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-3: i.mx6: add the cpu_is_mx6dl() support
Jason Liu [Tue, 7 Feb 2012 06:00:21 +0000 (14:00 +0800)]
ENGR00173869-3: i.mx6: add the cpu_is_mx6dl() support

In order to support one image for i.mx6q and i.mx6dl, we introduce
the below functions by diff the value reading from ANATOP ID register.
cpu_is_mx6q() and cpu_is_mx6dl()

The layout for the register defines:
               Major  Minor
i.MX6Q1.1:       6300     01
i.MX6Q1.0:       6300     00
i.MX6DL1.0:      6100     00

For the common bits shared across all i.mx6 ports, we can use:
cpu_is_mx6() for it.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-2: i.mx6: add the i.mx6dl memory map and irq definion
Jason Liu [Tue, 7 Feb 2012 05:56:02 +0000 (13:56 +0800)]
ENGR00173869-2: i.mx6: add the i.mx6dl memory map and irq definion

i.mx6dl shares with almost the same memory layout with i.mx6d/q
except it adds some new fetures such as pxp/epdc etc.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173869-1: i.mx6: cosmetic the code
Jason Liu [Tue, 7 Feb 2012 05:45:51 +0000 (13:45 +0800)]
ENGR00173869-1: i.mx6: cosmetic the code

This is the cosmetic patch for the i.mx6 and make
the prepartion for the coming i.mx6dl support.

Why cosmetic? It's due to the code is a little bit
mess and want to make it clean and clear.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00173731-7 MX6Q/GPMI : add gpmi for mx6q
Huang Shijie [Wed, 1 Feb 2012 08:14:55 +0000 (16:14 +0800)]
ENGR00173731-7 MX6Q/GPMI : add gpmi for mx6q

add gpmi support to mx6q for the imx_3.0.15.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173731-6 MX6Q/DMA : enable the mxs-dma for mx6q
Huang Shijie [Wed, 1 Feb 2012 08:14:01 +0000 (16:14 +0800)]
ENGR00173731-6 MX6Q/DMA : enable the mxs-dma for mx6q

enable the mxs-dma for mx6q.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173731-5 MX6Q/ARCH :rename gpmi-nfc to gpmi-nand
Huang Shijie [Wed, 1 Feb 2012 08:39:46 +0000 (16:39 +0800)]
ENGR00173731-5 MX6Q/ARCH :rename gpmi-nfc to gpmi-nand

rename the gpmi-nfc to gpmi-nand.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173731-4 MX6Q/ARCH : add mxs_reset_block()
Huang Shijie [Wed, 1 Feb 2012 08:12:33 +0000 (16:12 +0800)]
ENGR00173731-4 MX6Q/ARCH : add mxs_reset_block()

add mxs_reset_block() for mx6q.
In order to keep the same code as the community, I reduce the
parameters to one.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173731-3 mxs-dma : rewrite the last parameter of mxs_dma_prep_slave_sg()
Huang Shijie [Wed, 18 Jan 2012 02:51:40 +0000 (10:51 +0800)]
ENGR00173731-3 mxs-dma : rewrite the last parameter of mxs_dma_prep_slave_sg()

[1] Background :
    The GPMI does ECC read page operation with a DMA chain consist of three DMA
    Command Structures. The middle one of the chain is used to enable the BCH,
    and read out the NAND page.

    The WAIT4END(wait for command end) is a comunication signal between
    the GPMI and MXS-DMA.

[2] The current DMA code sets the WAIT4END bit at the last one, such as:

    +-----+               +-----+                      +-----+
    | cmd | ------------> | cmd | ------------------>  | cmd |
    +-----+               +-----+                      +-----+
                                                          ^
                                                          |
                                                          |
                                                     set WAIT4END here

    This chain works fine in the mx23/mx28.

[3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should
    be set not only at the last DMA Command Structure,
    but also at the middle one, such as:

    +-----+               +-----+                      +-----+
    | cmd | ------------> | cmd | ------------------>  | cmd |
    +-----+               +-----+                      +-----+
                             ^                            ^
                             |                            |
                             |                            |
                        set WAIT4END here too        set WAIT4END here

    If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state.
    In the next ECC write page operation, a DMA-timeout occurs.
    This has been catched in the MX6Q board.

[4] In order to fix the bug, rewrite the last parameter of
    mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags:
    ---------------------------------------------------------
      DMA_PREP_INTERRUPT : append a new DMA Command Structrue.
      DMA_CTRL_ACK       : set the WAIT4END bit for this DMA Command Structure.
    ---------------------------------------------------------

[5] changes to the relative drivers:
    For gpmi-nand driver: use the new flags.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173731-2 mxs-dma : use the new mxs-dma.h
Huang Shijie [Wed, 1 Feb 2012 07:26:54 +0000 (15:26 +0800)]
ENGR00173731-2 mxs-dma : use the new mxs-dma.h

use the new header : mxs-dma.h.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173731-1 mxs-dma : rename the dma.h for mxs-dma
Huang Shijie [Mon, 6 Feb 2012 02:47:02 +0000 (10:47 +0800)]
ENGR00173731-1 mxs-dma : rename the dma.h for mxs-dma

Move the header to a more common place.
The mxs dma engine is not only used in mx23/mx28, but also used
in mx50/mx6q.  It will also be used in the future chips.

rename it to mxs-dma.h

Acked-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173615 [mx5 mmc]fix mx5 build error
Tony Lin [Thu, 2 Feb 2012 05:59:05 +0000 (13:59 +0800)]
ENGR00173615 [mx5 mmc]fix mx5 build error

fix build error on mx5 platforms

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00173615-2 [mx6q mmc]remove software workaround for TO1.1 and later
Tony Lin [Thu, 2 Feb 2012 05:59:05 +0000 (13:59 +0800)]
ENGR00173615-2 [mx6q mmc]remove software workaround for TO1.1 and later

the card interrupt status bit workaround and TC interrupt comes earlier than
DMA interrupt workaround are not necessary for i.MX6Q TO1.1 and later

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00173615-1 [mx6q]add mx6q_revision to common header file
Tony Lin [Thu, 2 Feb 2012 05:59:05 +0000 (13:59 +0800)]
ENGR00173615-1 [mx6q]add mx6q_revision to common header file

the common API is needed by drivers to distinguish TO version

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00173939 [MX6Q]: Skip sending S18R on SD slots doesnt support 1.8V
Ryan QIAN [Tue, 7 Feb 2012 06:43:09 +0000 (14:43 +0800)]
ENGR00173939 [MX6Q]: Skip sending S18R on SD slots doesnt support 1.8V

- checking whether host support MMC_VDD_165_195, before query
UHS mode supported by host controller.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173846 MX6DQ_SD: add touch support for LVDS0 and LVDS1
Frank Li [Mon, 6 Feb 2012 04:54:28 +0000 (12:54 +0800)]
ENGR00173846 MX6DQ_SD: add touch support for LVDS0 and LVDS1

Add touch support.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
11 years agoENGR00173288-02 merge "[MX6Q]add SDHC3.0 support on uSDHC controller"
Ryan QIAN [Tue, 31 Jan 2012 03:01:52 +0000 (11:01 +0800)]
ENGR00173288-02 merge "[MX6Q]add SDHC3.0 support on uSDHC controller"

ENGR152547-03 [MX6Q]add SDHC3.0 support on uSDHC controller
add voltage switch function due to SDHC3.0 spec requirement
add tuning function due to SDHC3.0 spec requirement
extend some functions to support SDR50 & SDR104 speed mode

- adjust the sequence of current_limit and bus_speed_mode
- add FSL specific tuning procedure

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173288-01 merge "[MX6Q]add SDHC3.0 support on uSDHC controller"
Ryan QIAN [Tue, 31 Jan 2012 02:58:38 +0000 (10:58 +0800)]
ENGR00173288-01 merge "[MX6Q]add SDHC3.0 support on uSDHC controller"

ENGR152547-03 [MX6Q]add SDHC3.0 support on uSDHC controller
add voltage switch function due to SDHC3.0 spec requirement
add tuning function due to SDHC3.0 spec requirement
extend some functions to support SDR50 & SDR104 speed mode

- add support for SD3.0.
- add workaround for accessing non-exist registers on FSL SDHC.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173639 mx6q: clock: PLL3's power can be off at runtime at TO1.1
Peter Chen [Fri, 3 Feb 2012 06:31:35 +0000 (14:31 +0800)]
ENGR00173639 mx6q: clock: PLL3's power can be off at runtime at TO1.1

It is the fix for Design PDM TKT064178, IC has already verified it,
and no more power consumption for setting/clear this bit.

With this bit, the power of pll3 can be off even the power bit for pll3
is on. In order to support USB wakeup, the power bit for pll3 should
be always on, and the power of pll3 is controller by USB hardware and
this new added bit at runtime.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00173586-2 [MX6] Add support to source GPT from 24MHz
Ranjani Vaidyanathan [Thu, 2 Feb 2012 11:32:32 +0000 (05:32 -0600)]
ENGR00173586-2 [MX6] Add support to source GPT from 24MHz

On MX6Q TO1.1, MX6DL/S and MX6Solo, GPT can be sourced
from a constant source (better for frequency scaling).
Currently we set the GPT clock to 3MHz (24MHz div by 8).

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00173586-1 [MX6] Add support to source GPT from 24MHz
Ranjani Vaidyanathan [Thu, 2 Feb 2012 11:31:52 +0000 (05:31 -0600)]
ENGR00173586-1 [MX6] Add support to source GPT from 24MHz

On MX6Q TO1.1, MX6DL/S and MX6Solo, GPT can be sourced
from a constant source (better for frequency scaling).
Currently we set the GPT clock to 3MHz (24MHz div by 8).

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00173810 clean up rej file
Alan Tull [Fri, 3 Feb 2012 10:16:29 +0000 (04:16 -0600)]
ENGR00173810 clean up rej file

Makefile.rej got committed from doing cherry-pick for kernel
upgrade from 2.6.38 to 3.0.15

Signed-off-by: Alan Tull <r80115@freescale.com>
11 years agoENGR00171536 HDMI handle mmapped audio buffers
Alan Tull [Thu, 26 Jan 2012 10:37:10 +0000 (04:37 -0600)]
ENGR00171536 HDMI handle mmapped audio buffers

The ALSA userspace requires mmapped buffer access to support sample
rate conversion.

Our hardware requires the driver to add frame information to the pcm
data.  For non-mmap access, the snd_pcm_ops' copy routine will do it.
For mmap access, we have to do it in the isr.  This is not ideal, but
it will work.

Signed-off-by: Alan Tull <r80115@freescale.com>
11 years agoENGR00173645 [MX6]Implement low power actions into DSM
Anson Huang [Thu, 2 Feb 2012 10:05:40 +0000 (18:05 +0800)]
ENGR00173645 [MX6]Implement low power actions into DSM

1. Need to follow right programming model for wb_per_at_lpm
   ,zeroed wb_count each time exit from DSM and set it before
   entering DSM;
2. For TO1.1, need to set fet_odrive for better power gate.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00173659 MX6Q_UART Change Physical / Virtural Port mapping
Eric Sun [Thu, 2 Feb 2012 10:59:20 +0000 (18:59 +0800)]
ENGR00173659 MX6Q_UART Change Physical / Virtural Port mapping

For ARM2 and Sabreauto, change TTY0 to TTY3 (which is physical UART4)
For SabreSD, Change TTY3 to TTY0 (which is physical UART1)

Mapping Changed as the following
Physical Virtual
-------- --------
1 0
2 1
3 2
4 3

Signed-off-by: Eric Sun <jian.sun@freescale.com>
11 years agoENGR00173617 Enable LVDS on MX6DQ sabresd board
Sandor Yu [Thu, 2 Feb 2012 06:01:32 +0000 (14:01 +0800)]
ENGR00173617 Enable LVDS on MX6DQ sabresd board

Enable AUX 5V when system bootup.
Enable PWM0 for LVDS backlight.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00172391 [MX6]Remove unnecessary workaround of wdog for TO1.1
Anson Huang [Thu, 19 Jan 2012 09:07:02 +0000 (17:07 +0800)]
ENGR00172391 [MX6]Remove unnecessary workaround of wdog for TO1.1

On TO1.1, there is no such issue now, so remove the workaround,
as this is a very very low possibility to reproduce this issue, and the
workaround has very complicated logic, it is hard and non-necessary
to add SOC version check, so just remove it.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00173585: MX6: Added WAIT mode workaround for MX6Q TO1.1
Ranjani Vaidyanathan [Wed, 1 Feb 2012 13:32:32 +0000 (07:32 -0600)]
ENGR00173585: MX6: Added WAIT mode workaround for MX6Q TO1.1

There is small window where an interrupt can occur when the SOC is
in the process of entering WAIT mode. The ARM core responds to this
interrupt and can access the internal memories when their clocks are
disabled.
To avoid crashes generated due to this, WFI code should be executed
from non-cacheable IRAM and enough delay should added after the
WFI so that accesses to memories are prevented.

This workaround assumes that all interrupts are routed to CPU0 only.
This workaround is applicable to iMX6DL/Solo also.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00171987 ipuv3 fb: add error handler for mxcfb_blank
Jason Chen [Fri, 13 Jan 2012 09:04:36 +0000 (17:04 +0800)]
ENGR00171987 ipuv3 fb: add error handler for mxcfb_blank

add error handler for mxcfb_blank.

Signed-off-by: Jason Chen <b02280@freescale.com>
(cherry picked from commit 1999793303187b4aa9ccbdfc53f9a4c6ab59e749)

11 years agoENGR00173378-2 usb: device: the udc stop flag should not be set at suspend
Peter Chen [Tue, 31 Jan 2012 06:10:49 +0000 (14:10 +0800)]
ENGR00173378-2 usb: device: the udc stop flag should not be set at suspend

It should not do re-enumeration at udc resume if the vbus is on and host
just sends suspend to device

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00173378-1 usb: device: Change judgement condition for resume occurrence
Peter Chen [Tue, 31 Jan 2012 05:34:20 +0000 (13:34 +0800)]
ENGR00173378-1 usb: device: Change judgement condition for resume occurrence

At former code, it uses portsc.fpr to indicate if the host sends
resume signal to device, but it has some limitations that if the code
can't be executed before the resume signal finishes, the portsc.fpr
will be cleared automatically.
Now, it uses usbsts.pci to judge host resume signal, this bit
will not be cleared before the non-wakeup interrupt handler is called,
and the wakeup code is executed before non-wakeup interrupt handler.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00172395-2 MX6Q_ARM2: add sgtl5000 audio driver
Gary Zhang [Fri, 20 Jan 2012 03:01:31 +0000 (11:01 +0800)]
ENGR00172395-2 MX6Q_ARM2: add sgtl5000 audio driver

add sgtl5000 driver for MX6Q_ARM2 in config file

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00172395-1 MX6Q_ARM2: add sgtl5000 audio driver
Gary Zhang [Fri, 20 Jan 2012 02:42:38 +0000 (10:42 +0800)]
ENGR00172395-1 MX6Q_ARM2: add sgtl5000 audio driver

add sgtl5000 platform data.
VPC board is used to extend sgtl5000 hardware.

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00173406-2 MX6Q/IMX : fix compiling error.
Huang Shijie [Tue, 31 Jan 2012 11:10:43 +0000 (19:10 +0800)]
ENGR00173406-2 MX6Q/IMX : fix compiling error.

add dma header to fix the compiling error.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173406-1 MX6Q : fix compiling error
Huang Shijie [Tue, 31 Jan 2012 11:09:52 +0000 (19:09 +0800)]
ENGR00173406-1 MX6Q : fix compiling error

add the DMA header to fix the compiling error.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173397 MTD: add NAND_BBT_USE_FLASH macro
Huang Shijie [Tue, 31 Jan 2012 08:50:03 +0000 (16:50 +0800)]
ENGR00173397 MTD: add NAND_BBT_USE_FLASH macro

add the new macro to fix a compiling error.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agomtd: abstract last MTD partition parser argument
Dmitry Eremin-Solenikov [Fri, 10 Jun 2011 14:18:28 +0000 (18:18 +0400)]
mtd: abstract last MTD partition parser argument

Encapsulate last MTD partition parser argument into a separate
structure. Currently it holds only 'origin' field for RedBoot parser,
but will be extended in future to contain at least device_node for OF
devices.

Amended commentary to make kerneldoc happy

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com>
11 years agomtd: add new API for handling MTD registration
Dmitry Eremin-Solenikov [Fri, 25 Mar 2011 19:26:25 +0000 (22:26 +0300)]
mtd: add new API for handling MTD registration

Lots (nearly all) mtd drivers contain nearly the similar code that
calls parse_mtd_partitions, provides some platform-default values, if
parsing fails, and registers  mtd device.

This is an aim to provide single implementation of this scenario:
mtd_device_parse_register() which will handle all this parsing and
defaults.

Artem: amended comments

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
11 years agoclk: add helper functions clk_prepare_enable and clk_disable_unprepare
Richard Zhao [Tue, 15 Nov 2011 06:47:56 +0000 (14:47 +0800)]
clk: add helper functions clk_prepare_enable and clk_disable_unprepare

It's for migrating to generic clk framework API.

The helper functions  help cases clk_enable/clk_disable is used
in non-atomic context.
For example, Call clk_enable in probe and clk_disable in remove.

Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
11 years agoclk: provide prepare/unprepare functions
Russell King [Thu, 22 Sep 2011 10:30:50 +0000 (11:30 +0100)]
clk: provide prepare/unprepare functions

As discussed previously, there's the need on some platforms to run some
parts of clk_enable() in contexts which can schedule.  The solution
which was agreed upon was to provide clk_prepare() and clk_unprepare()
to contain this parts, while clk_enable() and clk_disable() perform
the atomic part.

This patch provides a common definition for clk_prepare() and
clk_unprepare() in linux/clk.h, and provides an upgrade path for
existing implementation and drivers: drivers can start using
clk_prepare() and clk_unprepare() once this patch is merged without
having to wait for platform support.  Platforms can then start to
provide these additional functions.

Eventually, HAVE_CLK_PREPARE will be removed from the kernel, and
everyone will have to provide these new APIs.

Acked-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
11 years agodma: mxs-dma: convert to clk_prepare/clk_unprepare
Shawn Guo [Tue, 20 Dec 2011 05:54:00 +0000 (13:54 +0800)]
dma: mxs-dma: convert to clk_prepare/clk_unprepare

The patch converts mxs-dma driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels
Lothar Waßmann [Thu, 8 Dec 2011 08:15:44 +0000 (09:15 +0100)]
dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels

This is how the original Freescale code (unintentionally) worked,
because the code path which would have asserted the CLKGATE bit was
never actually reached in their code.
This fixes the nefarious "DMA timout" bug when multiple DMA channels
(e.g. GPMI NAND and MMC) are used at the same time.
If a better fix for this problem should be found, the clkgate handling
could be reinstated.
See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/065228.html

Also reverse the order of mxs_dma_disable_chan() and
mxs_dma_reset_chan() in mxs_dma_control() because mxs_dma_reset_chan()
can only work when the DMA channel is enabled.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe
Lothar Waßmann [Thu, 8 Dec 2011 08:15:43 +0000 (09:15 +0100)]
dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe

Using a static variable for counting the number of CCWs attached to
a DMA channel when appending a new descriptor is not multi user safe.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: Always leave mxs_dma_init() with the clock disabled.
Lothar Waßmann [Thu, 8 Dec 2011 08:15:42 +0000 (09:15 +0100)]
dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled.

There is no need to have the clock enabled all the time the driver is
loaded.
It will be enabled anyway in mxs_dma_alloc_chan_resources() when a
channel is actually going to be used.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodma: mxs-dma: fix a typo in comment
Lothar Waßmann [Thu, 8 Dec 2011 08:15:41 +0000 (09:15 +0100)]
dma: mxs-dma: fix a typo in comment

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodmaengine: move drivers to dma_transfer_direction
Vinod Koul [Thu, 13 Oct 2011 17:04:23 +0000 (22:34 +0530)]
dmaengine: move drivers to dma_transfer_direction

fixup usage of dma direction by introducing dma_transfer_direction,
this patch moves dma/drivers/* to use new enum

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Viresh Kumar <viresh.kumar@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Mika Westerberg <mika.westerberg@iki.fi>
Cc: H Hartley Sweeten <hartleys@visionengravers.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Zhang Wei <zw@zh-kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Yong Wang <yong.y.wang@intel.com>
Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Cc: Barry Song <Baohua.Song@csr.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agoARM: mxs-dma: include <linux/dmaengine.h>
Dong Aisheng [Wed, 13 Jul 2011 03:40:54 +0000 (11:40 +0800)]
ARM: mxs-dma: include <linux/dmaengine.h>

Other files using dma.h may fail to compile as follows:
In file included from sound/soc/mxs/mxs-pcm.h:22,
                 from sound/soc/mxs/mxs-saif.h:112,
                 from sound/soc/mxs/mxs-sgtl5000.c:34:
arch/arm/mach-mxs/include/mach/dma.h:16: warning: 'struct dma_chan' declared inside parameter list
arch/arm/mach-mxs/include/mach/dma.h:16: warning: its scope is only this definition or declaration, which is probably not what you want
arch/arm/mach-mxs/include/mach/dma.h: In function 'mxs_dma_is_apbh':
arch/arm/mach-mxs/include/mach/dma.h:18: error: dereferencing pointer to incomplete type
arch/arm/mach-mxs/include/mach/dma.h: At top level:
arch/arm/mach-mxs/include/mach/dma.h:21: warning: 'struct dma_chan' declared inside parameter list
arch/arm/mach-mxs/include/mach/dma.h: In function 'mxs_dma_is_apbx':
arch/arm/mach-mxs/include/mach/dma.h:23: error: dereferencing pointer to incomplete type
make[3]: *** [sound/soc/mxs/mxs-sgtl5000.o] Error 1
make[2]: *** [sound/soc/mxs] Error 2
make[1]: *** [sound/soc] Error 2
make: *** [sound] Error 2

It seems it's better for dma.h to include dmaengine.h himself.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
11 years agodmaengine: add DMA_TRANS_NONE to dma_transfer_direction
Shawn Guo [Tue, 13 Dec 2011 15:48:03 +0000 (23:48 +0800)]
dmaengine: add DMA_TRANS_NONE to dma_transfer_direction

Before dma_transfer_direction was introduced to replace
dma_data_direction, some dmaengine device uses DMA_NONE of
dma_data_direction for some talk with its client drivers.
The mxs-dma and its clients mxs-mmc and gpmi-nand are such case.

This patch adds DMA_TRANS_NONE to dma_transfer_direction and
migrate the DMA_NONE use in mxs-dma to it.

It also fixes the compile warning below.

CC      drivers/dma/mxs-dma.o
drivers/dma/mxs-dma.c: In function â€˜mxs_dma_prep_slave_sg’:
drivers/dma/mxs-dma.c:420:16: warning: comparison between â€˜enum dma_transfer_direction’ and â€˜enum dma_data_direction’

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agolinux/dmaengine.h: fix implicit use of bitmap.h and asm/page.h
Paul Gortmaker [Fri, 29 Jul 2011 06:55:11 +0000 (16:55 +1000)]
linux/dmaengine.h: fix implicit use of bitmap.h and asm/page.h

The implicit presence of module.h and all its sub-includes was
masking these implicit header usages:

include/linux/dmaengine.h:684: warning: 'struct page' declared inside parameter list
include/linux/dmaengine.h:684: warning: its scope is only this definition or declaration, which is probably not what you want
include/linux/dmaengine.h:687: warning: 'struct page' declared inside parameter list
include/linux/dmaengine.h:736:2: error: implicit declaration of function 'bitmap_zero'

With input from Stephen Rothwell <sfr@canb.auug.org.au>

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
11 years agodmaengine: add new enum dma_transfer_direction
Vinod Koul [Thu, 13 Oct 2011 09:45:27 +0000 (15:15 +0530)]
dmaengine: add new enum dma_transfer_direction

This new enum removes usage of dma_data_direction for dma direction. The new
enum cleans tells the DMA direction and mode
This further paves way for merging the dmaengine _prep operations and also for
interleaved dma

Suggested-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agodmaengine: remove struct scatterlist for header
Vinod Koul [Tue, 9 Aug 2011 04:38:10 +0000 (10:08 +0530)]
dmaengine: remove struct scatterlist for header

Commit 90b44f8 introduces dmaengine_prep_slave_single API which adds
scatterlist.h in dmaengine.h, so defining struct scatterlist is not required

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
11 years agodmaengine: add helper function for slave_single
Vinod Koul [Mon, 25 Jul 2011 14:27:52 +0000 (19:57 +0530)]
dmaengine: add helper function for slave_single

For clients which require a single slave transfer and dont want to be bothered
about the scatterlist api, this helper gives simple API for this transfer and
creates single scatterlist for DMA API

Idea from Russell King

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
11 years agonet: remove mm.h inclusion from netdevice.h
Alexey Dobriyan [Thu, 16 Jun 2011 11:01:34 +0000 (11:01 +0000)]
net: remove mm.h inclusion from netdevice.h

Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).

To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.

Hope people are OK with tiny include file.

Note, that mm_types.h is still dragged in, but it is a separate story.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
11 years agoENGR00173369-3 Revert "ENGR00143126-3 ARM: add DMA driver for mx50"
Huang Shijie [Tue, 31 Jan 2012 02:54:39 +0000 (10:54 +0800)]
ENGR00173369-3 Revert "ENGR00143126-3 ARM: add DMA driver for mx50"

This reverts commit 6257fa54c1c66de2c9f72172895ea7e0e3c0845c.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173369-2 Revert "ENGR00139247-6 DMA : add DMA support for imx6q"
Huang Shijie [Tue, 31 Jan 2012 02:54:24 +0000 (10:54 +0800)]
ENGR00173369-2 Revert "ENGR00139247-6 DMA : add DMA support for imx6q"

This reverts commit ab11e98c15ecb29eaf93114cb928478c98d637e9.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00173369-1 Revert "ENGR00169906-4 MXS-DMA : change the last parameter...
Huang Shijie [Tue, 31 Jan 2012 02:53:46 +0000 (10:53 +0800)]
ENGR00173369-1 Revert "ENGR00169906-4 MXS-DMA : change the last parameter...

This reverts commit a1a43335ccbf5578eb48edbf16c11e53d76c0123.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agomtd: gpmi-lib: convert to clk_prepare/clk_unprepare
Shawn Guo [Tue, 20 Dec 2011 06:02:05 +0000 (14:02 +0800)]
mtd: gpmi-lib: convert to clk_prepare/clk_unprepare

The patch converts gpmi nand driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Huang Shijie <b32955@freescale.com>
Cc: Artem Bityutskiy <artem.bityutskiy@intel.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
11 years agoENGR00171746 LVDS: Disable channel mode to enter low power when suspend
Wayne Zou [Wed, 11 Jan 2012 06:22:29 +0000 (14:22 +0800)]
ENGR00171746 LVDS: Disable channel mode to enter low power when suspend

1. During suspend, LVDS didn't enter low power status.
   It needs to disable channel mode and mux control.
   It can save ~8mA@3.2V.

2. Clean up the LDB route function for better readability.

3. Fix lvds clk_enable/disable bug,
   clk_enable/disable should base on setting_idx variable.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agomtd: gpmi-nand bugfix: reset the BCH module when it is not MX23
Huang Shijie [Wed, 4 Jan 2012 03:18:46 +0000 (11:18 +0800)]
mtd: gpmi-nand bugfix: reset the BCH module when it is not MX23

In MX28, if we do not reset the BCH module. The BCH module may
becomes unstable when the board reboots for several thousands times.
This bug has been catched in customer's production.

The patch adds some comments(some from Wolfram Sang), and fixes it now.

Also change gpmi_reset_block() to static.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
11 years agomtd: gpmi-nand: move to dma_transfer_direction
Shawn Guo [Tue, 13 Dec 2011 15:48:06 +0000 (23:48 +0800)]
mtd: gpmi-nand: move to dma_transfer_direction

This patch fixes usage of dma direction to adopt dma_transfer_direction.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agomtd: gpmi: add missing include 'module.h'
Wolfram Sang [Wed, 23 Nov 2011 14:57:06 +0000 (15:57 +0100)]
mtd: gpmi: add missing include 'module.h'

Fixes:

drivers/mtd/nand/gpmi-nand/gpmi-nand.c: In function 'gpmi_nfc_init':
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: error: 'THIS_MODULE' undeclared (first use in this function)
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: note: each undeclared identifier is reported only once for each function it appears in
drivers/mtd/nand/gpmi-nand/gpmi-nand.c: At top level:
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:15: error: expected declaration specifiers or '...' before string constant
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: data definition has no type or storage class
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: type defaults to 'int' in declaration of 'MODULE_AUTHOR'

and some more...

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
11 years agoENGR00173287 remove build warning in SDHC driver platform code
Ryan QIAN [Mon, 9 Jan 2012 08:08:18 +0000 (16:08 +0800)]
ENGR00173287 remove build warning in SDHC driver platform code

- remove unused 'u32 reg' in platform code

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173286 merge "eMMC: improve boot_info message output"
Ryan QIAN [Sat, 7 Jan 2012 04:38:06 +0000 (12:38 +0800)]
ENGR00173286 merge "eMMC: improve boot_info message output"

ENGR133884 eMMC: improve boot_info message output

Output bit means of important esd_csd register

Read esd_csd info each time when cat boot_info
becasue user may change config affect esd_csd
value.

boot_info:0x07;
  ALT_BOOT_MODE:1 - Supports alternate boot method
  DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot
  HS_BOOTMODE:1 - Supports high speed timing during boot
boot_size:0512KB
  boot_partition:0x48;
  BOOT_ACK:1 - Boot acknowledge sent during boot operation
  BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled
  PARTITION_ACCESS:0 - No access to boot partition
boot_bus:0x01
  BOOT_MODE:0 - Use single data rate + backward compatible timings
in boot operation
  RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate
and backward compatible timings after boot operation
  BOOT_BUS_WIDTH:1 - x4 (sdr/ddr) bus width in boot operation mode

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173284 merge "eMMC: Configure boot_partition_enable"
Ryan QIAN [Sat, 7 Jan 2012 04:32:40 +0000 (12:32 +0800)]
ENGR00173284 merge "eMMC: Configure boot_partition_enable"

ENGR126228 eMMC: Configure boot_partition_enable

Enable the configurations of the boot enable on the eMMC cards.

Add the interface that used to configure the boot_bus_width

In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.

NOTE:
The following are the valid inputs when configure the boot
bus width of the eMMC cards.
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2                 | Bit1 Bit0      |
|----------------|----------------------------------|----------------|
| X              | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved

The following are the valid inputs when configure the boot
partitions of the eMMC cards.
+------------------------------------------------------------+
| Bit7 | Bit6     | Bit5 Bit4 Bit3        | Bit2 Bit1 Bit0   |
|------|----------|-----------------------|------------------|
| X    | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
So only the '0, 1, 2; 8, 9, 10; 16, 17, 18; 56, 57, 58' are
valid parameters when configure the boot_partiton.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00173283 merge "eMMC: Boot Partition switch func used in MFG tool"
Ryan QIAN [Sat, 7 Jan 2012 04:20:28 +0000 (12:20 +0800)]
ENGR00173283 merge "eMMC: Boot Partition switch func used in MFG tool"

ENGR125411 eMMC: Boot Partition switch func used in MFG tool

User can get eMMC partitions info from user space layer in
linux OS enviroment.
User can do switch operations between the eMMC boot partitions
and the user partition.
User can access the eMMC boot partitions from user space layer
in linux OS enviroment.
NOTE:This func had been verified on TOSHIBA eMMC44 card only.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agomtd: fix compile error for gpmi-nand
Huang Shijie [Tue, 13 Dec 2011 15:48:05 +0000 (23:48 +0800)]
mtd: fix compile error for gpmi-nand

The driver gpmi-nand should compile at least.  This patch adds the
missing gpmi-nand.h to fix the compile error below.

  CC      drivers/mtd/nand/gpmi-nand/gpmi-nand.o
  CC      drivers/mtd/nand/gpmi-nand/gpmi-lib.o
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:25:33: fatal error: linux/mtd/gpmi-nand.h: No such file or directory
drivers/mtd/nand/gpmi-nand/gpmi-lib.c:21:33: fatal error: linux/mtd/gpmi-nand.h: No such file or directory

This header is grabbed from patch below, which has not been postponed
for merging.

  [PATCH v8 1/4] ARM: mxs: add GPMI-NAND support for imx23/imx28
  http://permalink.gmane.org/gmane.linux.drivers.mtd/37338

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
11 years agomtd: add the common code for GPMI-NAND controller driver
Huang Shijie [Thu, 8 Sep 2011 02:47:09 +0000 (10:47 +0800)]
mtd: add the common code for GPMI-NAND controller driver

These files contain the common code for the GPMI-NAND driver.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
11 years agomtd: add GPMI-NAND driver in the config and Makefile
Huang Shijie [Thu, 8 Sep 2011 02:47:11 +0000 (10:47 +0800)]
mtd: add GPMI-NAND driver in the config and Makefile

add the GPMI-NAND driver in the relevant Kconfig and Makefile in the MTD.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
11 years agomtd: add helper functions library and header files for GPMI NAND driver
Huang Shijie [Thu, 8 Sep 2011 02:47:10 +0000 (10:47 +0800)]
mtd: add helper functions library and header files for GPMI NAND driver

bch-regs.h : registers file for BCH module
gpmi-regs.h: registers file for GPMI module
gpmi-lib.c: helper functions library.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
11 years agoENGR00172362 mx6q-ard cleanup i2c board settings
Adrian Alonso [Wed, 18 Jan 2012 20:56:32 +0000 (14:56 -0600)]
ENGR00172362 mx6q-ard cleanup i2c board settings

* Clean i2c board settings for sabreauto platform
* Remove and unregister i2c0 device not used in this board
* Move i2c3 pads to general mx6q_sabreauto_pads[]
* [v2] add camera module ov3640 module to i2c2 bus

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00171946 SPI nor chip select update
Francisco Munoz [Fri, 13 Jan 2012 01:13:36 +0000 (19:13 -0600)]
ENGR00171946 SPI nor chip select update

SPI nor cannot be probed, due to a previous patch which
modified its chip select settings.

Signed-off-by: Francisco Munoz <b37752@freescale.com>
11 years agoENGR00172360-2 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock code
Danny Nold [Thu, 19 Jan 2012 20:56:33 +0000 (14:56 -0600)]
ENGR00172360-2 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock code

Due to the use of some higher frequencies for HDMI video modes, the
IPU clock set/get/round functions need to use 64-bit variables
for clock calculations instead of 32-bit variables.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00172360-1 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock co
Danny Nold [Thu, 19 Jan 2012 20:53:51 +0000 (14:53 -0600)]
ENGR00172360-1 - MXC HDMI: New TO1.1 PLL5/PLL4 dividers not set up in clock co

Update get_rate, set_rate, and round_rate for audio_video PLLs
to account for new dividers added for MX6Q TO1.1.  Since default value
for one of these dividers is 4, this is important for function of clocks
derived from PLL4 and PLL5.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00172476 [USB Host]change the default wakeup value of RH
Tony LIU [Fri, 20 Jan 2012 03:14:54 +0000 (11:14 +0800)]
ENGR00172476 [USB Host]change the default wakeup value of RH

- change the default wakeup value of RH from enabled to disabled

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00172475 [USB]Add wakeup entry for USB device on Kernel3.0
Tony LIU [Fri, 20 Jan 2012 03:02:18 +0000 (11:02 +0800)]
ENGR00172475 [USB]Add wakeup entry for USB device on Kernel3.0

- in Kernel 3.0, all the wakeup entry is removed by default,
  we need add it manually

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00173271 [mx6q] Fix build break in imx6_updater_defconfig
Nancy Chen [Fri, 27 Jan 2012 10:55:42 +0000 (04:55 -0600)]
ENGR00173271 [mx6q] Fix build break in imx6_updater_defconfig

Enable PFUZE regulator.

Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172375 MX6Q Sabresd: Enable camera sensors
Nancy Chen [Wed, 25 Jan 2012 15:39:01 +0000 (09:39 -0600)]
ENGR00172375 MX6Q Sabresd: Enable camera sensors

1. Enable parallel csi camera sensor, default sensor is ov5640
2. Enable mipi csi2 camera sensor, default sensor is ov5640
3. Rename to sabresd

Signed-off-by: Even Xu <b21019@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172752-2 Remove usless code in pfuze100 regulator driver
Nancy Chen [Wed, 25 Jan 2012 15:01:36 +0000 (09:01 -0600)]
ENGR00172752-2 Remove usless code in pfuze100 regulator driver

Remove usless code in pfuze100 regulator driver

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172752-1 MX6Q: Add pfuze100 support for Sabre SD
Nancy Chen [Wed, 25 Jan 2012 15:00:48 +0000 (09:00 -0600)]
ENGR00172752-1 MX6Q: Add pfuze100 support for Sabre SD

  1. Add pfuze100's init fuction on board level
  2. Add mx6q_sabresd_pmic_pfuze100.c
  3. Rename to sabresd

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172676 MX6Q: Add suport for i.MX 6Q Sabre Smart Device
Nancy Chen [Tue, 24 Jan 2012 22:11:28 +0000 (16:11 -0600)]
ENGR00172676 MX6Q: Add suport for i.MX 6Q Sabre Smart Device

Add suport for i.MX 6Quad SABRE Smart Device.
Rename to SABRESD.

Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00172427 SPDIF: Add spdif build support.
Alan Tull [Thu, 12 Jan 2012 15:44:41 +0000 (09:44 -0600)]
ENGR00172427 SPDIF: Add spdif build support.

Add spdif to Makefile.

Signed-off-by: Alan Tull <r80115@freescale.com>
11 years agoENGR00172374-7 Sound: Asoc: fix the snd_soc_resume resume crash
Jason Liu [Tue, 10 Jan 2012 04:54:23 +0000 (12:54 +0800)]
ENGR00172374-7 Sound: Asoc: fix the snd_soc_resume resume crash

[  330.922320] [<800417e0>] (__bug+0x1c/0x24) from [<8007b4dc>] (__queue_work+0x24c/0x3f0)
[  330.930333] [<8007b4dc>] (__queue_work+0x24c/0x3f0) from [<8007b6e0>] (queue_work_on+0x38/0x40)
[  330.939039] [<8007b6e0>] (queue_work_on+0x38/0x40) from [<8007d568>] (queue_work+0x2c/0x58)
[  330.947401] [<8007d568>] (queue_work+0x2c/0x58) from [<803b83a4>] (snd_soc_resume+0x98/0xb8)
[  330.955852] [<803b83a4>] (snd_soc_resume+0x98/0xb8) from [<80280aa4>] (platform_pm_resume+0x2c/0x4c)
[  330.964996] [<80280aa4>] (platform_pm_resume+0x2c/0x4c) from [<80284388>] (pm_op+0xe4/0x11c)
[  330.973441] [<80284388>] (pm_op+0xe4/0x11c) from [<80284780>] (device_resume+0x78/0x13c)
[  330.981537] [<80284780>] (device_resume+0x78/0x13c) from [<802849d0>] (dpm_resume+0x144/0x194)
[  330.990154] [<802849d0>] (dpm_resume+0x144/0x194) from [<80284a2c>] (dpm_resume_end+0xc/0x18)
[  330.998692] [<80284a2c>] (dpm_resume_end+0xc/0x18) from [<8009cf18>] (suspend_devices_and_enter+0x78/0xb8)
[  331.008355] [<8009cf18>] (suspend_devices_and_enter+0x78/0xb8) from [<8009d010>] (enter_state+0xb8/0xe4)
[  331.017842] [<8009d010>] (enter_state+0xb8/0xe4) from [<8009c5b4>] (state_store+0x8c/0xc0)
[  331.026116] [<8009c5b4>] (state_store+0x8c/0xc0) from [<80223b20>] (kobj_attr_store+0x18/0x1c)
[  331.034740] [<80223b20>] (kobj_attr_store+0x18/0x1c) from [<801352ec>] (sysfs_write_file+0x104/0x184)
[  331.043969] [<801352ec>] (sysfs_write_file+0x104/0x184) from [<800e4ce8>] (vfs_write+0xb4/0x148)
[  331.052762] [<800e4ce8>] (vfs_write+0xb4/0x148) from [<800e4e4c>] (sys_write+0x40/0x70)
[  331.060781] [<800e4e4c>] (sys_write+0x40/0x70) from [<8003e380>] (ret_fast_syscall+0x0/0x30)

The commit:c4e133f ASoC: core: Don't schedule deferred_resume_work twice
commit c4e133f4e253b57e5d4409964a3b51f2d887e94b
Author: Stephen Warren <swarren@nvidia.com>
Date:   Wed May 25 14:06:41 2011 -0600

    ASoC: core: Don't schedule deferred_resume_work twice

    commit 82e14e8bdd88b69018fe757192b01dd98582905e upstream.

    For cards that have two or more DAIs, snd_soc_resume's loop over all
    DAIs ends up calling schedule_work(deferred_resume_work) once per DAI.
    Since this is the same work item each time, the 2nd and subsequent
    calls return 0 (work item already queued), and trigger the dev_err
    message below stating that a work item may have been lost.

    Solve this by adjusting the loop to simply calculate whether to run the
    resume work immediately or defer it, and then call schedule work (or not)
    one time based on that.

    Note: This has not been tested in mainline, but only in chromeos-2.6.38;
    mainline doesn't support suspend/resume on Tegra, nor does the mainline
    Tegra ASoC driver contain multiple DAIs. It has been compile-checked in
    mainline.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
changed the defaut behaviour for non-ac97 class which cause deferred_resume_work
was scheduled not by desire when card->num_rdt is zero.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00172374-6: fix the mlb modules build errors
Jason Liu [Mon, 9 Jan 2012 07:58:11 +0000 (15:58 +0800)]
ENGR00172374-6: fix the mlb modules build errors

/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mlb_tx_isr':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: (Each undeclared identifier is reported only once
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: for each function it appears in.)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mlb_rx_isr':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1400: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mxc_mlb150_read':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: implicit declaration of function 'signal_pending'
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: implicit declaration of function 'schedule'

missing one header file: sched.h, add it to fix it.

Signed-off-by: Jason Liu <r64343@freescale.com>